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Searched refs:pll (Results 1 - 25 of 604) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c422 * registers 0xC04 to 0xC08(pll[4] to pll[8]) will be
430 .pll[0] = 0xB4,
431 .pll[1] = 0,
432 .pll[2] = 0x30,
433 .pll[3] = 0x1,
434 .pll[4] = 0x26,
435 .pll[5] = 0x0C,
436 .pll[6] = 0x98,
437 .pll[
[all...]
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-pll.c16 #include "clk-pll.h"
35 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); in mtk_pll_is_prepared() local
37 return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0; in mtk_pll_is_prepared()
40 static unsigned long __mtk_pll_recalc_rate(struct mtk_clk_pll *pll, u32 fin, in __mtk_pll_recalc_rate() argument
43 int pcwbits = pll->data->pcwbits; in __mtk_pll_recalc_rate()
50 ibits = pll->data->pcwibits ? pll->data->pcwibits : INTEGER_BITS; in __mtk_pll_recalc_rate()
67 static void __mtk_pll_tuner_enable(struct mtk_clk_pll *pll) in __mtk_pll_tuner_enable() argument
71 if (pll in __mtk_pll_tuner_enable()
80 __mtk_pll_tuner_disable(struct mtk_clk_pll *pll) __mtk_pll_tuner_disable() argument
93 mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, int postdiv) mtk_pll_set_rate_regs() argument
137 mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, u32 freq, u32 fin) mtk_pll_calc_values() argument
177 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_set_rate() local
189 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_recalc_rate() local
205 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_round_rate() local
216 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_prepare() local
250 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_unprepare() local
285 mtk_clk_register_pll_ops(struct mtk_clk_pll *pll, const struct mtk_pll_data *data, void __iomem *base, const struct clk_ops *pll_ops) mtk_clk_register_pll_ops() argument
333 struct mtk_clk_pll *pll; mtk_clk_register_pll() local
349 struct mtk_clk_pll *pll; mtk_clk_unregister_pll() local
375 const struct mtk_pll_data *pll = &plls[i]; mtk_clk_register_plls() local
398 const struct mtk_pll_data *pll = &plls[i]; mtk_clk_register_plls() local
413 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_clk_pll_get_base() local
428 const struct mtk_pll_data *pll = &plls[i - 1]; mtk_clk_unregister_plls() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/tegra/
H A Dclk-pll.c276 static void clk_pll_enable_lock(struct tegra_clk_pll *pll) in clk_pll_enable_lock() argument
280 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) in clk_pll_enable_lock()
283 if (!(pll->params->flags & TEGRA_PLL_HAS_LOCK_ENABLE)) in clk_pll_enable_lock()
286 val = pll_readl_misc(pll); in clk_pll_enable_lock()
287 val |= BIT(pll->params->lock_enable_bit_idx); in clk_pll_enable_lock()
288 pll_writel_misc(val, pll); in clk_pll_enable_lock()
291 static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll) in clk_pll_wait_for_lock() argument
297 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) { in clk_pll_wait_for_lock()
298 udelay(pll->params->lock_delay); in clk_pll_wait_for_lock()
302 lock_addr = pll in clk_pll_wait_for_lock()
325 tegra_pll_wait_for_lock(struct tegra_clk_pll *pll) tegra_pll_wait_for_lock() argument
330 pllm_clk_is_gated_by_pmc(struct tegra_clk_pll *pll) pllm_clk_is_gated_by_pmc() argument
340 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_is_enabled() local
358 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pll_enable() local
391 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pll_disable() local
420 pll_clk_start_ss(struct tegra_clk_pll *pll) pll_clk_start_ss() argument
430 pll_clk_stop_ss(struct tegra_clk_pll *pll) pll_clk_stop_ss() argument
442 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_enable() local
466 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_disable() local
482 struct tegra_clk_pll *pll = to_clk_pll(hw); _p_div_to_hw() local
496 tegra_pll_p_div_to_hw(struct tegra_clk_pll *pll, u8 p_div) tegra_pll_p_div_to_hw() argument
503 struct tegra_clk_pll *pll = to_clk_pll(hw); _hw_to_p_div() local
522 struct tegra_clk_pll *pll = to_clk_pll(hw); _get_table_rate() local
556 struct tegra_clk_pll *pll = to_clk_pll(hw); _calc_rate() local
627 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_set_sdm_data() local
652 _update_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _update_pll_mnp() argument
689 _get_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _get_pll_mnp() argument
724 _update_pll_cpcon(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate) _update_pll_cpcon() argument
751 struct tegra_clk_pll *pll = to_clk_pll(hw); _program_pll() local
801 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_set_rate() local
843 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_round_rate() local
863 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_recalc_rate() local
911 clk_plle_training(struct tegra_clk_pll *pll) clk_plle_training() argument
954 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_enable() local
1016 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_recalc_rate() local
1033 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_clk_pll_restore_context() local
1115 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllu_enable() local
1221 struct tegra_clk_pll *pll = to_clk_pll(hw); _calc_dynamic_ramp_rate() local
1253 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_pll_get_fixed_mdiv() local
1304 struct tegra_clk_pll *pll = to_clk_pll(hw); _pll_ramp_calc_pll() local
1328 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllxc_set_rate() local
1356 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_ramp_round_rate() local
1378 _pllcx_strobe(struct tegra_clk_pll *pll) _pllcx_strobe() argument
1393 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_enable() local
1424 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pllc_disable() local
1437 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_disable() local
1449 _pllcx_update_dynamic_coef(struct tegra_clk_pll *pll, unsigned long input_rate, u32 n) _pllcx_update_dynamic_coef() argument
1487 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_set_rate() local
1528 _pllre_calc_rate(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _pllre_calc_rate() argument
1553 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_set_rate() local
1587 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_recalc_rate() local
1601 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_round_rate() local
1608 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra114_enable() local
1719 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra114_disable() local
1739 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllu_tegra114_enable() local
1844 _clk_plle_tegra_init_parent(struct tegra_clk_pll *pll) _clk_plle_tegra_init_parent() argument
1870 struct tegra_clk_pll *pll; _tegra_init_pll() local
1888 _tegra_clk_register_pll(struct tegra_clk_pll *pll, const char *name, const char *parent_name, unsigned long flags, const struct clk_ops *ops) _tegra_clk_register_pll() argument
1922 struct tegra_clk_pll *pll; tegra_clk_register_pll() local
1953 struct tegra_clk_pll *pll; tegra_clk_register_plle() local
1977 struct tegra_clk_pll *pll; tegra_clk_register_pllu() local
2045 struct tegra_clk_pll *pll; tegra_clk_register_pllxc() local
2110 struct tegra_clk_pll *pll; tegra_clk_register_pllre() local
2158 struct tegra_clk_pll *pll; tegra_clk_register_pllm() local
2202 struct tegra_clk_pll *pll; tegra_clk_register_pllc() local
2274 struct tegra_clk_pll *pll; tegra_clk_register_plle_tegra114() local
2297 struct tegra_clk_pll *pll; tegra_clk_register_pllu_tegra114() local
2331 struct tegra_clk_pll *pll; tegra_clk_register_pllss() local
2414 struct tegra_clk_pll *pll; tegra_clk_register_pllre_tegra210() local
2437 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_is_enabled() local
2447 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_enable() local
2538 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_disable() local
2570 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_clk_plle_t210_restore_context() local
2589 struct tegra_clk_pll *pll; tegra_clk_register_plle_tegra210() local
2614 struct tegra_clk_pll *pll; tegra_clk_register_pllc_tegra210() local
2654 struct tegra_clk_pll *pll; tegra_clk_register_pllss_tegra210() local
2703 struct tegra_clk_pll *pll; tegra_clk_register_pllmb() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/tegra/
H A Dclk-pll.c276 static void clk_pll_enable_lock(struct tegra_clk_pll *pll) in clk_pll_enable_lock() argument
280 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) in clk_pll_enable_lock()
283 if (!(pll->params->flags & TEGRA_PLL_HAS_LOCK_ENABLE)) in clk_pll_enable_lock()
286 val = pll_readl_misc(pll); in clk_pll_enable_lock()
287 val |= BIT(pll->params->lock_enable_bit_idx); in clk_pll_enable_lock()
288 pll_writel_misc(val, pll); in clk_pll_enable_lock()
291 static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll) in clk_pll_wait_for_lock() argument
297 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) { in clk_pll_wait_for_lock()
298 udelay(pll->params->lock_delay); in clk_pll_wait_for_lock()
302 lock_addr = pll in clk_pll_wait_for_lock()
325 tegra_pll_wait_for_lock(struct tegra_clk_pll *pll) tegra_pll_wait_for_lock() argument
330 pllm_clk_is_gated_by_pmc(struct tegra_clk_pll *pll) pllm_clk_is_gated_by_pmc() argument
340 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_is_enabled() local
358 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pll_enable() local
391 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pll_disable() local
420 pll_clk_start_ss(struct tegra_clk_pll *pll) pll_clk_start_ss() argument
430 pll_clk_stop_ss(struct tegra_clk_pll *pll) pll_clk_stop_ss() argument
442 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_enable() local
466 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_disable() local
482 struct tegra_clk_pll *pll = to_clk_pll(hw); _p_div_to_hw() local
496 tegra_pll_p_div_to_hw(struct tegra_clk_pll *pll, u8 p_div) tegra_pll_p_div_to_hw() argument
503 struct tegra_clk_pll *pll = to_clk_pll(hw); _hw_to_p_div() local
522 struct tegra_clk_pll *pll = to_clk_pll(hw); _get_table_rate() local
556 struct tegra_clk_pll *pll = to_clk_pll(hw); _calc_rate() local
630 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_set_sdm_data() local
655 _update_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _update_pll_mnp() argument
692 _get_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _get_pll_mnp() argument
727 _update_pll_cpcon(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate) _update_pll_cpcon() argument
754 struct tegra_clk_pll *pll = to_clk_pll(hw); _program_pll() local
804 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_set_rate() local
846 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_round_rate() local
866 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_recalc_rate() local
914 clk_plle_training(struct tegra_clk_pll *pll) clk_plle_training() argument
957 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_enable() local
1019 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_recalc_rate() local
1036 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_clk_pll_restore_context() local
1118 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllu_enable() local
1224 struct tegra_clk_pll *pll = to_clk_pll(hw); _calc_dynamic_ramp_rate() local
1256 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_pll_get_fixed_mdiv() local
1307 struct tegra_clk_pll *pll = to_clk_pll(hw); _pll_ramp_calc_pll() local
1331 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllxc_set_rate() local
1359 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pll_ramp_round_rate() local
1381 _pllcx_strobe(struct tegra_clk_pll *pll) _pllcx_strobe() argument
1396 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_enable() local
1427 struct tegra_clk_pll *pll = to_clk_pll(hw); _clk_pllc_disable() local
1440 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_disable() local
1452 _pllcx_update_dynamic_coef(struct tegra_clk_pll *pll, unsigned long input_rate, u32 n) _pllcx_update_dynamic_coef() argument
1490 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllc_set_rate() local
1531 _pllre_calc_rate(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _pllre_calc_rate() argument
1556 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_set_rate() local
1590 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_recalc_rate() local
1604 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllre_round_rate() local
1611 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra114_enable() local
1722 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra114_disable() local
1742 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_pllu_tegra114_enable() local
1847 _clk_plle_tegra_init_parent(struct tegra_clk_pll *pll) _clk_plle_tegra_init_parent() argument
1873 struct tegra_clk_pll *pll; _tegra_init_pll() local
1891 _tegra_clk_register_pll(struct tegra_clk_pll *pll, const char *name, const char *parent_name, unsigned long flags, const struct clk_ops *ops) _tegra_clk_register_pll() argument
1925 struct tegra_clk_pll *pll; tegra_clk_register_pll() local
1956 struct tegra_clk_pll *pll; tegra_clk_register_plle() local
1980 struct tegra_clk_pll *pll; tegra_clk_register_pllu() local
2048 struct tegra_clk_pll *pll; tegra_clk_register_pllxc() local
2113 struct tegra_clk_pll *pll; tegra_clk_register_pllre() local
2161 struct tegra_clk_pll *pll; tegra_clk_register_pllm() local
2205 struct tegra_clk_pll *pll; tegra_clk_register_pllc() local
2277 struct tegra_clk_pll *pll; tegra_clk_register_plle_tegra114() local
2300 struct tegra_clk_pll *pll; tegra_clk_register_pllu_tegra114() local
2334 struct tegra_clk_pll *pll; tegra_clk_register_pllss() local
2417 struct tegra_clk_pll *pll; tegra_clk_register_pllre_tegra210() local
2440 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_is_enabled() local
2450 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_enable() local
2529 struct tegra_clk_pll *pll = to_clk_pll(hw); clk_plle_tegra210_disable() local
2561 struct tegra_clk_pll *pll = to_clk_pll(hw); tegra_clk_plle_t210_restore_context() local
2580 struct tegra_clk_pll *pll; tegra_clk_register_plle_tegra210() local
2605 struct tegra_clk_pll *pll; tegra_clk_register_pllc_tegra210() local
2645 struct tegra_clk_pll *pll; tegra_clk_register_pllss_tegra210() local
2694 struct tegra_clk_pll *pll; tegra_clk_register_pllmb() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
H A Ddsi_pll.c8 static int dsi_pll_enable(struct msm_dsi_pll *pll) in dsi_pll_enable() argument
16 if (unlikely(pll->pll_on)) in dsi_pll_enable()
20 for (i = 0; i < pll->en_seq_cnt; i++) { in dsi_pll_enable()
21 ret = pll->enable_seqs[i](pll); in dsi_pll_enable()
33 pll->pll_on = true; in dsi_pll_enable()
38 static void dsi_pll_disable(struct msm_dsi_pll *pll) in dsi_pll_disable() argument
40 if (unlikely(!pll->pll_on)) in dsi_pll_disable()
43 pll->disable_seq(pll); in dsi_pll_disable()
54 struct msm_dsi_pll *pll = hw_clk_to_pll(hw); msm_dsi_pll_helper_clk_round_rate() local
66 struct msm_dsi_pll *pll = hw_clk_to_pll(hw); msm_dsi_pll_helper_clk_prepare() local
73 struct msm_dsi_pll *pll = hw_clk_to_pll(hw); msm_dsi_pll_helper_clk_unprepare() local
95 msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, struct clk **byte_clk_provider, struct clk **pixel_clk_provider) msm_dsi_pll_get_clk_provider() argument
106 msm_dsi_pll_destroy(struct msm_dsi_pll *pll) msm_dsi_pll_destroy() argument
112 msm_dsi_pll_save_state(struct msm_dsi_pll *pll) msm_dsi_pll_save_state() argument
120 msm_dsi_pll_restore_state(struct msm_dsi_pll *pll) msm_dsi_pll_restore_state() argument
135 msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, enum msm_dsi_phy_usecase uc) msm_dsi_pll_set_usecase() argument
148 struct msm_dsi_pll *pll; msm_dsi_pll_init() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/sprd/
H A Dpll.c3 // Spreadtrum pll clock driver
13 #include "pll.h"
18 #define pindex(pll, member) \
19 (pll->factors[member].shift / (8 * sizeof(pll->regs_num)))
21 #define pshift(pll, member) \
22 (pll->factors[member].shift % (8 * sizeof(pll->regs_num)))
24 #define pwidth(pll, member) \
25 pll
39 sprd_pll_read(const struct sprd_pll *pll, u8 index) sprd_pll_read() argument
53 sprd_pll_write(const struct sprd_pll *pll, u8 index, u32 msk, u32 val) sprd_pll_write() argument
69 pll_get_refin(const struct sprd_pll *pll) pll_get_refin() argument
98 _sprd_pll_recalc_rate(const struct sprd_pll *pll, unsigned long parent_rate) _sprd_pll_recalc_rate() argument
147 _sprd_pll_set_rate(const struct sprd_pll *pll, unsigned long rate, unsigned long parent_rate) _sprd_pll_set_rate() argument
234 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_recalc_rate() local
243 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_set_rate() local
250 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_clk_prepare() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/sprd/
H A Dpll.c3 // Spreadtrum pll clock driver
13 #include "pll.h"
18 #define pindex(pll, member) \
19 (pll->factors[member].shift / (8 * sizeof(pll->regs_num)))
21 #define pshift(pll, member) \
22 (pll->factors[member].shift % (8 * sizeof(pll->regs_num)))
24 #define pwidth(pll, member) \
25 pll
39 sprd_pll_read(const struct sprd_pll *pll, u8 index) sprd_pll_read() argument
53 sprd_pll_write(const struct sprd_pll *pll, u8 index, u32 msk, u32 val) sprd_pll_write() argument
69 pll_get_refin(const struct sprd_pll *pll) pll_get_refin() argument
98 _sprd_pll_recalc_rate(const struct sprd_pll *pll, unsigned long parent_rate) _sprd_pll_recalc_rate() argument
147 _sprd_pll_set_rate(const struct sprd_pll *pll, unsigned long rate, unsigned long parent_rate) _sprd_pll_set_rate() argument
234 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_recalc_rate() local
243 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_set_rate() local
250 struct sprd_pll *pll = hw_to_sprd_pll(hw); sprd_pll_clk_prepare() local
[all...]
/kernel/linux/linux-5.10/drivers/video/fbdev/aty/
H A Dmach64_ct.c18 static int aty_valid_pll_ct (const struct fb_info *info, u32 vclk_per, struct pll_ct *pll);
19 static int aty_dsp_gt (const struct fb_info *info, u32 bpp, struct pll_ct *pll);
20 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll);
21 static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll);
120 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) in aty_dsp_gt() argument
127 multiplier = ((u32)pll->mclk_fb_div) * pll->vclk_post_div_real; in aty_dsp_gt()
128 divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div; in aty_dsp_gt()
130 ras_multiplier = pll in aty_dsp_gt()
209 aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll_ct *pll) aty_valid_pll_ct() argument
251 aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) aty_var_to_pll_ct() argument
264 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll) aty_pll_to_var_ct() argument
281 aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll) aty_set_pll_ct() argument
377 aty_get_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_get_pll_ct() argument
400 aty_init_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_init_pll_ct() argument
605 aty_resume_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_resume_pll_ct() argument
[all...]
/kernel/linux/linux-6.6/drivers/video/fbdev/aty/
H A Dmach64_ct.c18 static int aty_valid_pll_ct (const struct fb_info *info, u32 vclk_per, struct pll_ct *pll);
19 static int aty_dsp_gt (const struct fb_info *info, u32 bpp, struct pll_ct *pll);
20 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll);
21 static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll);
118 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) in aty_dsp_gt() argument
125 multiplier = ((u32)pll->mclk_fb_div) * pll->vclk_post_div_real; in aty_dsp_gt()
126 divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div; in aty_dsp_gt()
128 ras_multiplier = pll in aty_dsp_gt()
207 aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll_ct *pll) aty_valid_pll_ct() argument
249 aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) aty_var_to_pll_ct() argument
262 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll) aty_pll_to_var_ct() argument
279 aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll) aty_set_pll_ct() argument
378 aty_get_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_get_pll_ct() argument
401 aty_init_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_init_pll_ct() argument
606 aty_resume_pll_ct(const struct fb_info *info, union aty_pll *pll) aty_resume_pll_ct() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dclk-alpha-pll.c13 #include "clk-alpha-pll.h"
292 static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, in wait_for_pll() argument
298 const char *name = clk_hw_get_name(&pll->clkr.hw); in wait_for_pll()
300 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
305 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
320 #define wait_for_pll_enable_active(pll) \
321 wait_for_pll(pll, PLL_ACTIVE_FLAG, 0, "enable")
323 #define wait_for_pll_enable_lock(pll) \
351 clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_alpha_pll_configure() argument
411 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_hwfsm_enable() local
436 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_hwfsm_disable() local
466 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); pll_is_enabled() local
489 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_enable() local
541 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_disable() local
600 alpha_pll_find_vco(const struct clk_alpha_pll *pll, unsigned long rate) alpha_pll_find_vco() argument
617 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_recalc_rate() local
641 __clk_alpha_pll_update_latch(struct clk_alpha_pll *pll) __clk_alpha_pll_update_latch() argument
684 clk_alpha_pll_update_latch(struct clk_alpha_pll *pll, int (*is_enabled)(struct clk_hw *)) clk_alpha_pll_update_latch() argument
698 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); __clk_alpha_pll_set_rate() local
750 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_round_rate() local
816 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_huayra_recalc_rate() local
869 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_huayra_set_rate() local
917 trion_pll_is_enabled(struct clk_alpha_pll *pll, struct regmap *regmap) trion_pll_is_enabled() argument
933 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_is_enabled() local
940 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_enable() local
977 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_disable() local
1011 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_recalc_rate() local
1070 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_recalc_rate() local
1101 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_round_rate() local
1117 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_round_ro_rate() local
1135 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_set_rate() local
1159 clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_fabia_pll_configure() argument
1199 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_enable() local
1256 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_disable() local
1286 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_recalc_rate() local
1316 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_set_rate() local
1336 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_prepare() local
1412 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_recalc_rate() local
1436 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_recalc_rate() local
1459 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_round_rate() local
1469 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_set_rate() local
1496 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_round_rate() local
1505 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_set_rate() local
1546 clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_trion_pll_configure() argument
1600 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); __alpha_pll_trion_prepare() local
1630 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); __alpha_pll_trion_set_rate() local
1709 clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_agera_pll_configure() argument
1730 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_agera_set_rate() local
1763 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_lucid_5lpe_enable() local
1805 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_lucid_5lpe_disable() local
1839 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_lucid_5lpe_prepare() local
1874 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); __clk_lucid_pll_postdiv_set_rate() local
1942 clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_zonda_pll_configure() argument
1972 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_zonda_pll_enable() local
2022 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_zonda_pll_disable() local
2050 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_zonda_pll_set_rate() local
2095 clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_lucid_evo_pll_configure() argument
2124 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_lucid_evo_enable() local
2178 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); _alpha_pll_lucid_evo_disable() local
2212 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); _alpha_pll_lucid_evo_prepare() local
2258 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_lucid_evo_recalc_rate() local
2313 clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_rivian_evo_pll_configure() argument
2336 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_rivian_evo_pll_recalc_rate() local
2347 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_rivian_evo_pll_round_rate() local
2371 clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_stromer_pll_configure() argument
2440 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_stromer_set_rate() local
2487 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_stromer_plus_set_rate() local
[all...]
H A Dclk-pll.c17 #include "clk-pll.h"
26 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable() local
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
61 return regmap_update_bits(pll->clkr.regmap, pll in clk_pll_enable()
67 struct clk_pll *pll = to_clk_pll(hw); clk_pll_disable() local
82 struct clk_pll *pll = to_clk_pll(hw); clk_pll_recalc_rate() local
128 struct clk_pll *pll = to_clk_pll(hw); clk_pll_determine_rate() local
143 struct clk_pll *pll = to_clk_pll(hw); clk_pll_set_rate() local
179 wait_for_pll(struct clk_pll *pll) wait_for_pll() argument
218 clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config) clk_pll_configure() argument
245 clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) clk_pll_configure_sr() argument
254 clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) clk_pll_configure_sr_hpm_lp() argument
265 struct clk_pll *pll = to_clk_pll(hw); clk_pll_sr2_enable() local
303 struct clk_pll *pll = to_clk_pll(hw); clk_pll_sr2_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-pll.c57 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); in mtk_pll_is_prepared() local
59 return (readl(pll->base_addr + REG_CON0) & CON0_BASE_EN) != 0; in mtk_pll_is_prepared()
62 static unsigned long __mtk_pll_recalc_rate(struct mtk_clk_pll *pll, u32 fin, in __mtk_pll_recalc_rate() argument
65 int pcwbits = pll->data->pcwbits; in __mtk_pll_recalc_rate()
72 ibits = pll->data->pcwibits ? pll->data->pcwibits : INTEGER_BITS; in __mtk_pll_recalc_rate()
89 static void __mtk_pll_tuner_enable(struct mtk_clk_pll *pll) in __mtk_pll_tuner_enable() argument
93 if (pll->tuner_en_addr) { in __mtk_pll_tuner_enable()
94 r = readl(pll->tuner_en_addr) | BIT(pll in __mtk_pll_tuner_enable()
102 __mtk_pll_tuner_disable(struct mtk_clk_pll *pll) __mtk_pll_tuner_disable() argument
115 mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, int postdiv) mtk_pll_set_rate_regs() argument
159 mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, u32 freq, u32 fin) mtk_pll_calc_values() argument
199 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_set_rate() local
212 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_recalc_rate() local
228 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_round_rate() local
239 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_prepare() local
269 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); mtk_pll_unprepare() local
303 struct mtk_clk_pll *pll; mtk_clk_register_pll() local
358 const struct mtk_pll_data *pll = &plls[i]; mtk_clk_register_plls() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dclk-pll.c17 #include "clk-pll.h"
26 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable() local
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
61 return regmap_update_bits(pll->clkr.regmap, pll in clk_pll_enable()
67 struct clk_pll *pll = to_clk_pll(hw); clk_pll_disable() local
82 struct clk_pll *pll = to_clk_pll(hw); clk_pll_recalc_rate() local
128 struct clk_pll *pll = to_clk_pll(hw); clk_pll_determine_rate() local
143 struct clk_pll *pll = to_clk_pll(hw); clk_pll_set_rate() local
179 wait_for_pll(struct clk_pll *pll) wait_for_pll() argument
218 clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config) clk_pll_configure() argument
245 clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) clk_pll_configure_sr() argument
254 clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) clk_pll_configure_sr_hpm_lp() argument
265 struct clk_pll *pll = to_clk_pll(hw); clk_pll_sr2_enable() local
303 struct clk_pll *pll = to_clk_pll(hw); clk_pll_sr2_set_rate() local
[all...]
H A Dclk-alpha-pll.c12 #include "clk-alpha-pll.h"
161 static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, in wait_for_pll() argument
167 const char *name = clk_hw_get_name(&pll->clkr.hw); in wait_for_pll()
169 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
174 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
189 #define wait_for_pll_enable_active(pll) \
190 wait_for_pll(pll, PLL_ACTIVE_FLAG, 0, "enable")
192 #define wait_for_pll_enable_lock(pll) \
210 clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_alpha_pll_configure() argument
254 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_hwfsm_enable() local
279 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_hwfsm_disable() local
309 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); pll_is_enabled() local
332 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_enable() local
384 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_disable() local
443 alpha_pll_find_vco(const struct clk_alpha_pll *pll, unsigned long rate) alpha_pll_find_vco() argument
460 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_recalc_rate() local
484 __clk_alpha_pll_update_latch(struct clk_alpha_pll *pll) __clk_alpha_pll_update_latch() argument
527 clk_alpha_pll_update_latch(struct clk_alpha_pll *pll, int (*is_enabled)(struct clk_hw *)) clk_alpha_pll_update_latch() argument
541 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); __clk_alpha_pll_set_rate() local
593 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_alpha_pll_round_rate() local
659 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_huayra_recalc_rate() local
712 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_huayra_set_rate() local
760 trion_pll_is_enabled(struct clk_alpha_pll *pll, struct regmap *regmap) trion_pll_is_enabled() argument
776 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_is_enabled() local
783 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_enable() local
820 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_disable() local
854 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); clk_trion_pll_recalc_rate() local
913 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_recalc_rate() local
944 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_round_rate() local
960 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_round_ro_rate() local
978 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_set_rate() local
1002 clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_fabia_pll_configure() argument
1052 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_enable() local
1109 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_disable() local
1139 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_recalc_rate() local
1151 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_set_rate() local
1176 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_fabia_prepare() local
1254 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_recalc_rate() local
1278 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_recalc_rate() local
1301 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_round_rate() local
1311 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_trion_pll_postdiv_set_rate() local
1338 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_round_rate() local
1347 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); clk_alpha_pll_postdiv_fabia_set_rate() local
1388 clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) clk_trion_pll_configure() argument
1455 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); __alpha_pll_trion_prepare() local
1485 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); alpha_pll_trion_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/bcm/
H A Dclk-iproc-pll.c85 struct iproc_pll *pll; member
128 static int pll_get_rate_index(struct iproc_pll *pll, unsigned int target_rate) in pll_get_rate_index() argument
132 for (i = 0; i < pll->num_vco_entries; i++) in pll_get_rate_index()
133 if (target_rate == pll->vco_param[i].rate) in pll_get_rate_index()
136 if (i >= pll->num_vco_entries) in pll_get_rate_index()
157 static int pll_wait_for_lock(struct iproc_pll *pll) in pll_wait_for_lock() argument
160 const struct iproc_pll_ctrl *ctrl = pll->ctrl; in pll_wait_for_lock()
163 u32 val = readl(pll->status_base + ctrl->status.offset); in pll_wait_for_lock()
173 static void iproc_pll_write(const struct iproc_pll *pll, void __iomem *base, in iproc_pll_write() argument
176 const struct iproc_pll_ctrl *ctrl = pll in iproc_pll_write()
185 __pll_disable(struct iproc_pll *pll) __pll_disable() argument
214 __pll_enable(struct iproc_pll *pll) __pll_enable() argument
243 __pll_put_in_reset(struct iproc_pll *pll) __pll_put_in_reset() argument
257 __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp, unsigned int ka, unsigned int ki) __pll_bring_out_reset() argument
286 pll_fractional_change_only(struct iproc_pll *pll, struct iproc_pll_vco_param *vco) pll_fractional_change_only() argument
318 struct iproc_pll *pll = clk->pll; pll_set_rate() local
440 struct iproc_pll *pll = clk->pll; iproc_pll_enable() local
448 struct iproc_pll *pll = clk->pll; iproc_pll_disable() local
461 struct iproc_pll *pll = clk->pll; iproc_pll_recalc_rate() local
511 struct iproc_pll *pll = clk->pll; iproc_pll_determine_rate() local
556 struct iproc_pll *pll = clk->pll; iproc_pll_set_rate() local
589 struct iproc_pll *pll = clk->pll; iproc_clk_enable() local
609 struct iproc_pll *pll = clk->pll; iproc_clk_disable() local
625 struct iproc_pll *pll = clk->pll; iproc_clk_recalc_rate() local
673 struct iproc_pll *pll = clk->pll; iproc_clk_set_rate() local
711 iproc_pll_sw_cfg(struct iproc_pll *pll) iproc_pll_sw_cfg() argument
733 struct iproc_pll *pll; iproc_pll_clk_setup() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A Dclk-iproc-pll.c75 struct iproc_pll *pll; member
118 static int pll_get_rate_index(struct iproc_pll *pll, unsigned int target_rate) in pll_get_rate_index() argument
122 for (i = 0; i < pll->num_vco_entries; i++) in pll_get_rate_index()
123 if (target_rate == pll->vco_param[i].rate) in pll_get_rate_index()
126 if (i >= pll->num_vco_entries) in pll_get_rate_index()
147 static int pll_wait_for_lock(struct iproc_pll *pll) in pll_wait_for_lock() argument
150 const struct iproc_pll_ctrl *ctrl = pll->ctrl; in pll_wait_for_lock()
153 u32 val = readl(pll->status_base + ctrl->status.offset); in pll_wait_for_lock()
163 static void iproc_pll_write(const struct iproc_pll *pll, void __iomem *base, in iproc_pll_write() argument
166 const struct iproc_pll_ctrl *ctrl = pll in iproc_pll_write()
175 __pll_disable(struct iproc_pll *pll) __pll_disable() argument
204 __pll_enable(struct iproc_pll *pll) __pll_enable() argument
233 __pll_put_in_reset(struct iproc_pll *pll) __pll_put_in_reset() argument
247 __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp, unsigned int ka, unsigned int ki) __pll_bring_out_reset() argument
276 pll_fractional_change_only(struct iproc_pll *pll, struct iproc_pll_vco_param *vco) pll_fractional_change_only() argument
308 struct iproc_pll *pll = clk->pll; pll_set_rate() local
430 struct iproc_pll *pll = clk->pll; iproc_pll_enable() local
438 struct iproc_pll *pll = clk->pll; iproc_pll_disable() local
451 struct iproc_pll *pll = clk->pll; iproc_pll_recalc_rate() local
501 struct iproc_pll *pll = clk->pll; iproc_pll_determine_rate() local
546 struct iproc_pll *pll = clk->pll; iproc_pll_set_rate() local
579 struct iproc_pll *pll = clk->pll; iproc_clk_enable() local
599 struct iproc_pll *pll = clk->pll; iproc_clk_disable() local
615 struct iproc_pll *pll = clk->pll; iproc_clk_recalc_rate() local
663 struct iproc_pll *pll = clk->pll; iproc_clk_set_rate() local
701 iproc_pll_sw_cfg(struct iproc_pll *pll) iproc_pll_sw_cfg() argument
723 struct iproc_pll *pll; iproc_pll_clk_setup() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/meson/
H A Dclk-pll.c38 #include "clk-pll.h"
46 static int __pll_round_closest_mult(struct meson_clk_pll_data *pll) in __pll_round_closest_mult() argument
48 if ((pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) && in __pll_round_closest_mult()
49 !MESON_PARM_APPLICABLE(&pll->frac)) in __pll_round_closest_mult()
58 struct meson_clk_pll_data *pll) in __pll_params_to_rate()
62 if (frac && MESON_PARM_APPLICABLE(&pll->frac)) { in __pll_params_to_rate()
66 (1 << pll->frac.width)); in __pll_params_to_rate()
76 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); in meson_clk_pll_recalc_rate() local
79 n = meson_parm_read(clk->map, &pll->n); in meson_clk_pll_recalc_rate()
89 m = meson_parm_read(clk->map, &pll in meson_clk_pll_recalc_rate()
55 __pll_params_to_rate(unsigned long parent_rate, unsigned int m, unsigned int n, unsigned int frac, struct meson_clk_pll_data *pll) __pll_params_to_rate() argument
98 __pll_params_with_frac(unsigned long rate, unsigned long parent_rate, unsigned int m, unsigned int n, struct meson_clk_pll_data *pll) __pll_params_with_frac() argument
121 meson_clk_pll_is_better(unsigned long rate, unsigned long best, unsigned long now, struct meson_clk_pll_data *pll) meson_clk_pll_is_better() argument
139 meson_clk_get_pll_table_index(unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_table_index() argument
153 meson_clk_get_pll_range_m(unsigned long rate, unsigned long parent_rate, unsigned int n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_m() argument
166 meson_clk_get_pll_range_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_index() argument
199 meson_clk_get_pll_get_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_get_index() argument
215 meson_clk_get_pll_settings(unsigned long rate, unsigned long parent_rate, unsigned int *best_m, unsigned int *best_n, struct meson_clk_pll_data *pll) meson_clk_get_pll_settings() argument
249 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_round_rate() local
275 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_wait_lock() local
292 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_init() local
307 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_is_enabled() local
330 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_enable() local
354 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_disable() local
367 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-pllv3.c35 * @power_bit: pll power bit mask
60 static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) in clk_pllv3_wait_lock() argument
62 u32 val = readl_relaxed(pll->base) & pll->power_bit; in clk_pllv3_wait_lock()
64 /* No need to wait for lock when pll is not powered up */ in clk_pllv3_wait_lock()
65 if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) in clk_pllv3_wait_lock()
68 return readl_relaxed_poll_timeout(pll->base, val, val & BM_PLL_LOCK, in clk_pllv3_wait_lock()
74 struct clk_pllv3 *pll = to_clk_pllv3(hw); in clk_pllv3_prepare() local
77 val = readl_relaxed(pll in clk_pllv3_prepare()
89 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_unprepare() local
102 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_is_prepared() local
113 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_recalc_rate() local
131 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_set_rate() local
161 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_sys_recalc_rate() local
187 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_sys_set_rate() local
216 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_av_recalc_rate() local
263 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_av_set_rate() local
347 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_vf610_recalc_rate() local
368 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_vf610_set_rate() local
398 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_enet_recalc_rate() local
414 struct clk_pllv3 *pll; imx_clk_hw_pllv3() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-pllv3.c36 * @power_bit: pll power bit mask
61 static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) in clk_pllv3_wait_lock() argument
63 u32 val = readl_relaxed(pll->base) & pll->power_bit; in clk_pllv3_wait_lock()
65 /* No need to wait for lock when pll is not powered up */ in clk_pllv3_wait_lock()
66 if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) in clk_pllv3_wait_lock()
69 return readl_relaxed_poll_timeout(pll->base, val, val & BM_PLL_LOCK, in clk_pllv3_wait_lock()
75 struct clk_pllv3 *pll = to_clk_pllv3(hw); in clk_pllv3_prepare() local
78 val = readl_relaxed(pll in clk_pllv3_prepare()
90 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_unprepare() local
103 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_is_prepared() local
114 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_recalc_rate() local
132 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_set_rate() local
162 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_sys_recalc_rate() local
188 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_sys_set_rate() local
217 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_av_recalc_rate() local
264 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_av_set_rate() local
348 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_vf610_recalc_rate() local
369 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_vf610_set_rate() local
399 struct clk_pllv3 *pll = to_clk_pllv3(hw); clk_pllv3_enet_recalc_rate() local
415 struct clk_pllv3 *pll; imx_clk_hw_pllv3() local
[all...]
H A Dclk-pllv4.c60 static inline int clk_pllv4_wait_lock(struct clk_pllv4 *pll) in clk_pllv4_wait_lock() argument
64 return readl_poll_timeout(pll->base + PLL_CSR_OFFSET, in clk_pllv4_wait_lock()
70 struct clk_pllv4 *pll = to_clk_pllv4(hw); in clk_pllv4_is_prepared() local
72 if (readl_relaxed(pll->base) & PLL_EN) in clk_pllv4_is_prepared()
81 struct clk_pllv4 *pll = to_clk_pllv4(hw); in clk_pllv4_recalc_rate() local
85 mult = readl_relaxed(pll->base + pll->cfg_offset); in clk_pllv4_recalc_rate()
89 mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv4_recalc_rate()
90 mfd = readl_relaxed(pll in clk_pllv4_recalc_rate()
101 struct clk_pllv4 *pll = to_clk_pllv4(hw); clk_pllv4_round_rate() local
158 clk_pllv4_is_valid_mult(struct clk_pllv4 *pll, unsigned int mult) clk_pllv4_is_valid_mult() argument
180 struct clk_pllv4 *pll = to_clk_pllv4(hw); clk_pllv4_set_rate() local
211 struct clk_pllv4 *pll = to_clk_pllv4(hw); clk_pllv4_prepare() local
223 struct clk_pllv4 *pll = to_clk_pllv4(hw); clk_pllv4_unprepare() local
242 struct clk_pllv4 *pll; imx_clk_hw_pllv4() local
[all...]
/kernel/linux/linux-6.6/drivers/media/i2c/
H A Dccs-pll.c3 * drivers/media/i2c/ccs-pll.c
17 #include "ccs-pll.h"
78 static void print_pll(struct device *dev, struct ccs_pll *pll) in print_pll() argument
85 { &pll->vt_fr, &pll->vt_bk, PLL_VT }, in print_pll()
86 { &pll->op_fr, &pll->op_bk, PLL_OP } in print_pll()
90 dev_dbg(dev, "ext_clk_freq_hz\t\t%u\n", pll->ext_clk_freq_hz); in print_pll()
95 if (pll->flags & CCS_PLL_FLAG_DUAL_PLL || in print_pll()
108 if (!(pll in print_pll()
151 check_fr_bounds(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, unsigned int which) check_fr_bounds() argument
191 check_bk_bounds(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, unsigned int which) check_bk_bounds() argument
233 check_ext_bounds(struct device *dev, struct ccs_pll *pll) check_ext_bounds() argument
251 ccs_pll_find_vt_sys_div(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, struct ccs_pll_branch_fr *pll_fr, u16 min_vt_div, u16 max_vt_div, u16 *min_sys_div, u16 *max_sys_div) ccs_pll_find_vt_sys_div() argument
290 __ccs_pll_calculate_vt_tree(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, u32 mul, u32 div) __ccs_pll_calculate_vt_tree() argument
376 ccs_pll_calculate_vt_tree(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll) ccs_pll_calculate_vt_tree() argument
439 ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim, const struct ccs_pll_branch_limits_bk *op_lim_bk, struct ccs_pll *pll, struct ccs_pll_branch_fr *pll_fr, struct ccs_pll_branch_bk *op_pll_bk, bool cphy, u32 phy_const) ccs_pll_calculate_vt() argument
587 ccs_pll_calculate_op(struct device *dev, const struct ccs_pll_limits *lim, const struct ccs_pll_branch_limits_fr *op_lim_fr, const struct ccs_pll_branch_limits_bk *op_lim_bk, struct ccs_pll *pll, struct ccs_pll_branch_fr *op_pll_fr, struct ccs_pll_branch_bk *op_pll_bk, u32 mul, u32 div, u32 op_sys_clk_freq_hz_sdr, u32 l, bool cphy, u32 phy_const) ccs_pll_calculate_op() argument
701 ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll) ccs_pll_calculate() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/visconti/
H A Dpll.c17 #include "pll.h"
56 static void visconti_pll_get_params(struct visconti_pll *pll, in visconti_pll_get_params() argument
61 val = readl(pll->pll_base + PLL_FRACMODE_REG); in visconti_pll_get_params()
66 rate_table->fracin = readl(pll->pll_base + PLL_FRACIN_REG) & PLL_FRACIN_MASK; in visconti_pll_get_params()
67 rate_table->intin = readl(pll->pll_base + PLL_INTIN_REG) & PLL_INTIN_MASK; in visconti_pll_get_params()
68 rate_table->refdiv = readl(pll->pll_base + PLL_REFDIV_REG) & PLL_REFDIV_MASK; in visconti_pll_get_params()
70 postdiv = readl(pll->pll_base + PLL_POSTDIV_REG); in visconti_pll_get_params()
75 static const struct visconti_pll_rate_table *visconti_get_pll_settings(struct visconti_pll *pll, in visconti_get_pll_settings() argument
78 const struct visconti_pll_rate_table *rate_table = pll->rate_table; in visconti_get_pll_settings()
81 for (i = 0; i < pll in visconti_get_pll_settings()
88 visconti_get_pll_rate_from_data(struct visconti_pll *pll, const struct visconti_pll_rate_table *rate) visconti_get_pll_rate_from_data() argument
106 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_round_rate() local
122 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_recalc_rate() local
131 visconti_pll_set_params(struct visconti_pll *pll, const struct visconti_pll_rate_table *rate_table) visconti_pll_set_params() argument
146 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_set_rate() local
158 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_is_enabled() local
168 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_enable() local
209 struct visconti_pll *pll = to_visconti_pll(hw); visconti_pll_disable() local
248 struct visconti_pll *pll; visconti_register_pll() local
[all...]
/kernel/linux/linux-5.10/drivers/media/i2c/
H A Dsmiapp-pll.c3 * drivers/media/i2c/smiapp-pll.c
16 #include "smiapp-pll.h"
53 static void print_pll(struct device *dev, struct smiapp_pll *pll) in print_pll() argument
55 dev_dbg(dev, "pre_pll_clk_div\t%u\n", pll->pre_pll_clk_div); in print_pll()
56 dev_dbg(dev, "pll_multiplier \t%u\n", pll->pll_multiplier); in print_pll()
57 if (!(pll->flags & SMIAPP_PLL_FLAG_NO_OP_CLOCKS)) { in print_pll()
58 dev_dbg(dev, "op_sys_clk_div \t%u\n", pll->op.sys_clk_div); in print_pll()
59 dev_dbg(dev, "op_pix_clk_div \t%u\n", pll->op.pix_clk_div); in print_pll()
61 dev_dbg(dev, "vt_sys_clk_div \t%u\n", pll->vt.sys_clk_div); in print_pll()
62 dev_dbg(dev, "vt_pix_clk_div \t%u\n", pll in print_pll()
77 check_all_bounds(struct device *dev, const struct smiapp_pll_limits *limits, const struct smiapp_pll_branch_limits *op_limits, struct smiapp_pll *pll, struct smiapp_pll_branch *op_pll) check_all_bounds() argument
151 __smiapp_pll_calculate( struct device *dev, const struct smiapp_pll_limits *limits, const struct smiapp_pll_branch_limits *op_limits, struct smiapp_pll *pll, struct smiapp_pll_branch *op_pll, uint32_t mul, uint32_t div, uint32_t lane_op_clock_ratio) __smiapp_pll_calculate() argument
386 smiapp_pll_calculate(struct device *dev, const struct smiapp_pll_limits *limits, struct smiapp_pll *pll) smiapp_pll_calculate() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/meson/
H A Dclk-pll.c37 #include "clk-pll.h"
45 static int __pll_round_closest_mult(struct meson_clk_pll_data *pll) in __pll_round_closest_mult() argument
47 if ((pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) && in __pll_round_closest_mult()
48 !MESON_PARM_APPLICABLE(&pll->frac)) in __pll_round_closest_mult()
57 struct meson_clk_pll_data *pll) in __pll_params_to_rate()
61 if (frac && MESON_PARM_APPLICABLE(&pll->frac)) { in __pll_params_to_rate()
65 (1 << pll->frac.width)); in __pll_params_to_rate()
75 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); in meson_clk_pll_recalc_rate() local
78 n = meson_parm_read(clk->map, &pll->n); in meson_clk_pll_recalc_rate()
88 m = meson_parm_read(clk->map, &pll in meson_clk_pll_recalc_rate()
54 __pll_params_to_rate(unsigned long parent_rate, unsigned int m, unsigned int n, unsigned int frac, struct meson_clk_pll_data *pll) __pll_params_to_rate() argument
97 __pll_params_with_frac(unsigned long rate, unsigned long parent_rate, unsigned int m, unsigned int n, struct meson_clk_pll_data *pll) __pll_params_with_frac() argument
120 meson_clk_pll_is_better(unsigned long rate, unsigned long best, unsigned long now, struct meson_clk_pll_data *pll) meson_clk_pll_is_better() argument
138 meson_clk_get_pll_table_index(unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_table_index() argument
152 meson_clk_get_pll_range_m(unsigned long rate, unsigned long parent_rate, unsigned int n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_m() argument
165 meson_clk_get_pll_range_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_index() argument
198 meson_clk_get_pll_get_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_get_index() argument
214 meson_clk_get_pll_settings(unsigned long rate, unsigned long parent_rate, unsigned int *best_m, unsigned int *best_n, struct meson_clk_pll_data *pll) meson_clk_get_pll_settings() argument
248 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_determine_rate() local
278 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_wait_lock() local
295 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_init() local
314 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_is_enabled() local
344 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_enable() local
389 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_disable() local
407 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); meson_clk_pll_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-pll.c51 struct rockchip_clk_pll *pll, unsigned long rate) in rockchip_get_pll_settings()
53 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_get_pll_settings()
56 for (i = 0; i < pll->rate_count; i++) { in rockchip_get_pll_settings()
67 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_pll_round_rate() local
68 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_pll_round_rate()
72 for (i = 0; i < pll->rate_count; i++) { in rockchip_pll_round_rate()
82 * Wait for the pll to reach the locked state.
86 static int rockchip_pll_wait_lock(struct rockchip_clk_pll *pll) in rockchip_pll_wait_lock() argument
88 struct regmap *grf = pll->ctx->grf; in rockchip_pll_wait_lock()
92 ret = regmap_read_poll_timeout(grf, pll in rockchip_pll_wait_lock()
50 rockchip_get_pll_settings( struct rockchip_clk_pll *pll, unsigned long rate) rockchip_get_pll_settings() argument
120 rockchip_rk3036_pll_wait_lock(struct rockchip_clk_pll *pll) rockchip_rk3036_pll_wait_lock() argument
139 rockchip_rk3036_pll_get_params(struct rockchip_clk_pll *pll, struct rockchip_pll_rate_table *rate) rockchip_rk3036_pll_get_params() argument
166 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_recalc_rate() local
189 rockchip_rk3036_pll_set_params(struct rockchip_clk_pll *pll, const struct rockchip_pll_rate_table *rate) rockchip_rk3036_pll_set_params() argument
251 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_set_rate() local
270 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_enable() local
281 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_disable() local
290 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_is_enabled() local
298 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3036_pll_init() local
380 rockchip_rk3066_pll_get_params(struct rockchip_clk_pll *pll, struct rockchip_pll_rate_table *rate) rockchip_rk3066_pll_get_params() argument
403 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_recalc_rate() local
424 rockchip_rk3066_pll_set_params(struct rockchip_clk_pll *pll, const struct rockchip_pll_rate_table *rate) rockchip_rk3066_pll_set_params() argument
486 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_set_rate() local
505 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_enable() local
516 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_disable() local
525 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_is_enabled() local
533 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3066_pll_init() local
600 rockchip_rk3399_pll_wait_lock(struct rockchip_clk_pll *pll) rockchip_rk3399_pll_wait_lock() argument
619 rockchip_rk3399_pll_get_params(struct rockchip_clk_pll *pll, struct rockchip_pll_rate_table *rate) rockchip_rk3399_pll_get_params() argument
648 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_recalc_rate() local
671 rockchip_rk3399_pll_set_params(struct rockchip_clk_pll *pll, const struct rockchip_pll_rate_table *rate) rockchip_rk3399_pll_set_params() argument
735 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_set_rate() local
754 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_enable() local
765 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_disable() local
774 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_is_enabled() local
782 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); rockchip_rk3399_pll_init() local
859 struct rockchip_clk_pll *pll; rockchip_clk_register_pll() local
[all...]

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