Home
last modified time | relevance | path

Searched refs:enable_reg (Results 1 - 25 of 518) sorted by relevance

12345678910>>...21

/kernel/linux/linux-5.10/arch/arm/mach-ep93xx/
H A Dclock.c32 void __iomem *enable_reg; member
53 .enable_reg = EP93XX_SYSCON_DEVCFG,
60 .enable_reg = EP93XX_SYSCON_DEVCFG,
67 .enable_reg = EP93XX_SYSCON_DEVCFG,
88 .enable_reg = EP93XX_SYSCON_PWRCNT,
94 .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
101 .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
116 .enable_reg = EP93XX_SYSCON_VIDCLKDIV,
123 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
131 .enable_reg
[all...]
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dgcc-ipq806x.c45 .enable_reg = 0x34c0,
72 .enable_reg = 0x34c0,
99 .enable_reg = 0x34c0,
204 .enable_reg = 0x34c0,
361 .enable_reg = 0x29d4,
377 .enable_reg = 0x29d4,
412 .enable_reg = 0x29f4,
428 .enable_reg = 0x29f4,
463 .enable_reg = 0x2a34,
479 .enable_reg
[all...]
H A Dgcc-msm8660.c44 .enable_reg = 0x34c0,
121 .enable_reg = 0x29d4,
137 .enable_reg = 0x29d4,
172 .enable_reg = 0x29f4,
188 .enable_reg = 0x29f4,
223 .enable_reg = 0x2a14,
239 .enable_reg = 0x2a14,
274 .enable_reg = 0x2a34,
290 .enable_reg = 0x2a34,
325 .enable_reg
[all...]
H A Dgcc-sdm845.c157 .enable_reg = 0x52000,
172 .enable_reg = 0x52000,
1020 .enable_reg = 0x90014,
1035 .enable_reg = 0x82028,
1055 .enable_reg = 0x82024,
1073 .enable_reg = 0x8201c,
1091 .enable_reg = 0x82020,
1109 .enable_reg = 0x7a050,
1129 .enable_reg = 0x52004,
1144 .enable_reg
[all...]
H A Dgcc-msm8960.c45 .enable_reg = 0x34c0,
72 .enable_reg = 0x34c0,
257 .enable_reg = 0x34c0,
347 .enable_reg = 0x29d4,
363 .enable_reg = 0x29d4,
398 .enable_reg = 0x29f4,
414 .enable_reg = 0x29f4,
449 .enable_reg = 0x2a14,
465 .enable_reg = 0x2a14,
500 .enable_reg
[all...]
H A Dgcc-mdm9615.c57 .enable_reg = 0x34c0,
68 .enable_reg = 0x34c0,
95 .enable_reg = 0x34c0,
122 .enable_reg = 0x34c0,
205 .enable_reg = 0x29d4,
221 .enable_reg = 0x29d4,
256 .enable_reg = 0x29f4,
272 .enable_reg = 0x29f4,
307 .enable_reg = 0x2a14,
323 .enable_reg
[all...]
H A Dgcc-msm8996.c186 .enable_reg = 0x52000,
222 .enable_reg = 0x5200c,
237 .enable_reg = 0x5200c,
253 .enable_reg = 0x52000,
1273 .enable_reg = 0x0f03c,
1288 .enable_reg = 0x75038,
1303 .enable_reg = 0x6010,
1318 .enable_reg = 0x9008,
1333 .enable_reg = 0x9010,
1346 .enable_reg
[all...]
H A Dgcc-sc7180.c40 .enable_reg = 0x52010,
93 .enable_reg = 0x52010,
111 .enable_reg = 0x52010,
129 .enable_reg = 0x52010,
147 .enable_reg = 0x52010,
847 .enable_reg = 0x82024,
865 .enable_reg = 0x8201c,
885 .enable_reg = 0x52000,
900 .enable_reg = 0xb008,
913 .enable_reg
[all...]
H A Dgcc-qcs404.c276 .enable_reg = 0x45008,
293 .enable_reg = 0x45000,
310 .enable_reg = 0x45000,
326 .enable_reg = 0x45000,
372 .enable_reg = 0x45000,
400 .enable_reg = 0x45000,
1221 .enable_reg = 0x45004,
1239 .enable_reg = 0x4500c,
1252 .enable_reg = 0x59034,
1269 .enable_reg
[all...]
H A Dgcc-apq8084.c118 .enable_reg = 0x1480,
181 .enable_reg = 0x1480,
208 .enable_reg = 0x1480,
280 .enable_reg = 0x1bd0,
297 .enable_reg = 0x1bcc,
1323 .enable_reg = 0x1f14,
1377 .enable_reg = 0x1484,
1394 .enable_reg = 0x1484,
1410 .enable_reg = 0x0648,
1427 .enable_reg
[all...]
H A Dmmcc-apq8084.c231 .enable_reg = 0x0100,
258 .enable_reg = 0x0100,
1105 .enable_reg = 0x5104,
1120 .enable_reg = 0x5100,
1137 .enable_reg = 0x2414,
1154 .enable_reg = 0x2418,
1171 .enable_reg = 0x2410,
1188 .enable_reg = 0x241c,
1205 .enable_reg = 0x2420,
1222 .enable_reg
[all...]
H A Dgcc-sm8150.c41 .enable_reg = 0x52000,
84 .enable_reg = 0x52000,
102 .enable_reg = 0x52000,
1113 .enable_reg = 0x90018,
1128 .enable_reg = 0x750c0,
1147 .enable_reg = 0x750c0,
1166 .enable_reg = 0x770c0,
1185 .enable_reg = 0x770c0,
1202 .enable_reg = 0xf07c,
1219 .enable_reg
[all...]
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dgcc-msm8660.c45 .enable_reg = 0x34c0,
124 .enable_reg = 0x29d4,
140 .enable_reg = 0x29d4,
175 .enable_reg = 0x29f4,
191 .enable_reg = 0x29f4,
226 .enable_reg = 0x2a14,
242 .enable_reg = 0x2a14,
277 .enable_reg = 0x2a34,
293 .enable_reg = 0x2a34,
328 .enable_reg
[all...]
H A Dgcc-sc8180x.c52 .enable_reg = 0x52000,
94 .enable_reg = 0x52000,
113 .enable_reg = 0x52000,
132 .enable_reg = 0x52000,
1364 .enable_reg = 0x90018,
1379 .enable_reg = 0x750c0,
1399 .enable_reg = 0x750c0,
1419 .enable_reg = 0x770c0,
1439 .enable_reg = 0x770c0,
1457 .enable_reg
[all...]
H A Dgcc-mdm9615.c64 .enable_reg = 0x34c0,
77 .enable_reg = 0x34c0,
106 .enable_reg = 0x34c0,
135 .enable_reg = 0x34c0,
206 .enable_reg = 0x29d4,
222 .enable_reg = 0x29d4,
257 .enable_reg = 0x29f4,
273 .enable_reg = 0x29f4,
308 .enable_reg = 0x2a14,
324 .enable_reg
[all...]
H A Dgcc-sm6350.c38 .enable_reg = 0x52010,
99 .enable_reg = 0x52010,
138 .enable_reg = 0x52010,
798 .enable_reg = 0x3e014,
818 .enable_reg = 0x3e014,
838 .enable_reg = 0x3e014,
858 .enable_reg = 0x3e010,
878 .enable_reg = 0x52000,
893 .enable_reg = 0x17008,
909 .enable_reg
[all...]
H A Dgcc-sa8775p.c79 .enable_reg = 0x4b028,
116 .enable_reg = 0x4b028,
131 .enable_reg = 0x4b028,
146 .enable_reg = 0x4b028,
161 .enable_reg = 0x4b028,
176 .enable_reg = 0x4b028,
1691 .enable_reg = 0x4b000,
1706 .enable_reg = 0x810d4,
1726 .enable_reg = 0x830d4,
1746 .enable_reg
[all...]
H A Dgcc-qdu1000.c54 .enable_reg = 0x62018,
92 .enable_reg = 0x62018,
126 .enable_reg = 0x62018,
160 .enable_reg = 0x62018,
177 .enable_reg = 0x62018,
194 .enable_reg = 0x62018,
228 .enable_reg = 0x62018,
245 .enable_reg = 0x62018,
262 .enable_reg = 0x62018,
1032 .enable_reg
[all...]
H A Dgcc-sc7280.c47 .enable_reg = 0x52010,
108 .enable_reg = 0x52010,
125 .enable_reg = 0x52010,
142 .enable_reg = 0x52010,
159 .enable_reg = 0x52010,
175 .enable_reg = 0x52000,
1233 .enable_reg = 0x8c004,
1246 .enable_reg = 0x8c008,
1261 .enable_reg = 0x52000,
1276 .enable_reg
[all...]
H A Dgcc-sc7180.c39 .enable_reg = 0x52010,
92 .enable_reg = 0x52010,
110 .enable_reg = 0x52010,
128 .enable_reg = 0x52010,
146 .enable_reg = 0x52010,
832 .enable_reg = 0x82024,
850 .enable_reg = 0x8201c,
870 .enable_reg = 0x52000,
883 .enable_reg = 0xb020,
898 .enable_reg
[all...]
H A Dgcc-ipq806x.c49 .enable_reg = 0x34c0,
78 .enable_reg = 0x34c0,
107 .enable_reg = 0x34c0,
214 .enable_reg = 0x34c0,
432 .enable_reg = 0x29d4,
448 .enable_reg = 0x29d4,
483 .enable_reg = 0x29f4,
499 .enable_reg = 0x29f4,
534 .enable_reg = 0x2a34,
550 .enable_reg
[all...]
H A Dgcc-sm8450.c43 .enable_reg = 0x62018,
82 .enable_reg = 0x62018,
99 .enable_reg = 0x62018,
1128 .enable_reg = 0x62000,
1143 .enable_reg = 0x62000,
1158 .enable_reg = 0x870d4,
1178 .enable_reg = 0x870d4,
1198 .enable_reg = 0x49088,
1218 .enable_reg = 0x62000,
1233 .enable_reg
[all...]
H A Dgcc-sm6125.c45 .enable_reg = 0x79000,
88 .enable_reg = 0x79000,
105 .enable_reg = 0x79000,
122 .enable_reg = 0x79000,
139 .enable_reg = 0x79000,
169 .enable_reg = 0x79000,
199 .enable_reg = 0x79000,
229 .enable_reg = 0x79000,
1362 .enable_reg = 0x1d004,
1377 .enable_reg
[all...]
H A Dgcc-sm8150.c39 .enable_reg = 0x52000,
82 .enable_reg = 0x52000,
100 .enable_reg = 0x52000,
1095 .enable_reg = 0x90018,
1110 .enable_reg = 0x750c0,
1129 .enable_reg = 0x750c0,
1148 .enable_reg = 0x770c0,
1167 .enable_reg = 0x770c0,
1184 .enable_reg = 0xf07c,
1201 .enable_reg
[all...]
/kernel/linux/linux-6.6/arch/arm/mach-omap1/
H A Dclock.c49 unsigned int val = __raw_readl(clk->enable_reg); in omap1_uart_recalc()
194 regval32 = __raw_readl(clk->enable_reg); in omap1_clk_is_enabled()
196 regval32 = __raw_readw(clk->enable_reg); in omap1_clk_is_enabled()
395 val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit); in omap1_set_uart_rate()
396 __raw_writel(val, clk->enable_reg); in omap1_set_uart_rate()
422 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; in omap1_set_ext_clk_rate()
423 __raw_writew(ratio_bits, clk->enable_reg); in omap1_set_ext_clk_rate()
489 ratio_bits = __raw_readw(clk->enable_reg) & ~1; in omap1_init_ext_clk()
490 __raw_writew(ratio_bits, clk->enable_reg); in omap1_init_ext_clk()
534 if (unlikely(clk->enable_reg in omap1_clk_enable_generic()
[all...]

Completed in 34 milliseconds

12345678910>>...21