Lines Matching refs:enable_reg
49 unsigned int val = __raw_readl(clk->enable_reg);
194 regval32 = __raw_readl(clk->enable_reg);
196 regval32 = __raw_readw(clk->enable_reg);
395 val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit);
396 __raw_writel(val, clk->enable_reg);
422 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
423 __raw_writew(ratio_bits, clk->enable_reg);
489 ratio_bits = __raw_readw(clk->enable_reg) & ~1;
490 __raw_writew(ratio_bits, clk->enable_reg);
534 if (unlikely(clk->enable_reg == NULL)) {
540 /* protect clk->enable_reg from concurrent access via clk_set_rate() */
541 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
543 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
545 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
547 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
549 else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
553 regval32 = __raw_readl(clk->enable_reg);
555 __raw_writel(regval32, clk->enable_reg);
557 regval16 = __raw_readw(clk->enable_reg);
559 __raw_writew(regval16, clk->enable_reg);
562 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
564 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
566 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
568 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
570 else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
582 if (clk->enable_reg == NULL)
585 /* protect clk->enable_reg from concurrent access via clk_set_rate() */
586 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
588 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
590 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
592 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
594 else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
598 regval32 = __raw_readl(clk->enable_reg);
600 __raw_writel(regval32, clk->enable_reg);
602 regval16 = __raw_readw(clk->enable_reg);
604 __raw_writew(regval16, clk->enable_reg);
607 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))
609 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))
611 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))
613 else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))
615 else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))
751 if (clk->enable_reg == DSP_IDLECT2) {