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/kernel/linux/linux-5.10/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_crtc.c33 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
52 writel(ctrl1, priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
59 u32 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_enable_controller()
60 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller()
65 writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1); in aspeed_gfx_enable_controller()
66 writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller()
71 u32 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_disable_controller()
72 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_disable_controller()
74 writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1); in aspeed_gfx_disable_controller()
75 writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base in aspeed_gfx_disable_controller()
[all...]
/kernel/linux/linux-6.6/drivers/mtd/maps/
H A Dpci.c31 void __iomem *base; member
41 val.x[0]= readb(map->base + map->translate(map, ofs)); in mtd_pci_read8()
49 val.x[0] = readl(map->base + map->translate(map, ofs)); in mtd_pci_read32()
56 memcpy_fromio(to, map->base + map->translate(map, from), len); in mtd_pci_copyfrom()
62 writeb(val.x[0], map->base + map->translate(map, ofs)); in mtd_pci_write8()
68 writel(val.x[0], map->base + map->translate(map, ofs)); in mtd_pci_write32()
74 memcpy_toio(map->base + map->translate(map, to), from, len); in mtd_pci_copyto()
97 map->base = ioremap(pci_resource_start(dev, 0), in intel_iq80310_init()
100 if (!map->base) in intel_iq80310_init()
104 * We want to base th in intel_iq80310_init()
158 unsigned long base, len; intel_dc21285_init() local
[all...]
/kernel/linux/linux-6.6/drivers/clocksource/
H A Dtimer-sp804.c83 static struct sp804_clkevt * __init sp804_clkevt_get(void __iomem *base) in sp804_clkevt_get() argument
88 if (sp804_clkevt[i].base == base) in sp804_clkevt_get()
105 static int __init sp804_clocksource_and_sched_clock_init(void __iomem *base, in sp804_clocksource_and_sched_clock_init() argument
117 clkevt = sp804_clkevt_get(base); in sp804_clocksource_and_sched_clock_init()
204 static int __init sp804_clockevents_init(void __iomem *base, unsigned int irq, in sp804_clockevents_init() argument
214 common_clkevt = sp804_clkevt_get(base); in sp804_clockevents_init()
230 static void __init sp804_clkevt_init(struct sp804_timer *timer, void __iomem *base) in sp804_clkevt_init() argument
238 timer_base = base + timer->timer_base[i]; in sp804_clkevt_init()
240 clkevt->base in sp804_clkevt_init()
254 void __iomem *base; sp804_of_init() local
344 void __iomem *base; integrator_cp_of_init() local
[all...]
/kernel/linux/linux-6.6/arch/x86/platform/intel-quark/
H A Dimr.c189 phys_addr_t base; in imr_dbgfs_state_show() local
211 base = imr_to_phys(imr.addr_lo); in imr_dbgfs_state_show()
213 size = end - base + 1; in imr_dbgfs_state_show()
215 base = 0; in imr_dbgfs_state_show()
219 seq_printf(s, "imr%02i: base=%pa, end=%pa, size=0x%08zx " in imr_dbgfs_state_show()
221 &base, &end, size, imr.rmask, imr.wmask, in imr_dbgfs_state_show()
245 * @base: base address of intended IMR.
247 * @return: zero on valid range -EINVAL on unaligned base/size.
249 static int imr_check_params(phys_addr_t base, size_ argument
298 imr_add_range(phys_addr_t base, size_t size, unsigned int rmask, unsigned int wmask) imr_add_range() argument
407 __imr_remove_range(int reg, phys_addr_t base, size_t size) __imr_remove_range() argument
499 imr_remove_range(phys_addr_t base, size_t size) imr_remove_range() argument
539 phys_addr_t base = virt_to_phys(&_text); imr_fixup_memmap() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_crtc.c33 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
52 writel(ctrl1, priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
59 u32 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_enable_controller()
60 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller()
65 writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1); in aspeed_gfx_enable_controller()
66 writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2); in aspeed_gfx_enable_controller()
71 u32 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_disable_controller()
72 u32 ctrl2 = readl(priv->base + CRT_CTRL2); in aspeed_gfx_disable_controller()
74 writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1); in aspeed_gfx_disable_controller()
75 writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base in aspeed_gfx_disable_controller()
[all...]
/third_party/libdrm/radeon/
H A Dradeon_bo_gem.c47 struct radeon_bo_int base; member
55 struct radeon_bo_manager base; member
75 bo->base.bom = bom; in bo_open()
76 bo->base.handle = 0; in bo_open()
77 bo->base.size = size; in bo_open()
78 bo->base.alignment = alignment; in bo_open()
79 bo->base.domains = domains; in bo_open()
80 bo->base.flags = flags; in bo_open()
81 bo->base.ptr = NULL; in bo_open()
94 bo->base in bo_open()
[all...]
/third_party/mesa3d/src/gallium/auxiliary/draw/
H A Ddraw_vs_variant.c45 struct draw_vs_variant base; member
111 ptr += vsvg->base.vs->position_output * 4 * sizeof(float); in do_rhw_viewport()
115 find_viewport(vsvg->base.vs->draw, (char*)output_buffer, in do_rhw_viewport()
137 ptr += vsvg->base.vs->position_output * 4 * sizeof(float); in do_viewport()
141 find_viewport(vsvg->base.vs->draw, (char*)output_buffer, in do_viewport()
176 vsvg->base.vs->run_linear( vsvg->base.vs, in vsvg_run_elts()
179 vsvg->base.vs->draw->pt.user.vs_constants, in vsvg_run_elts()
180 vsvg->base.vs->draw->pt.user.vs_constants_size, in vsvg_run_elts()
187 if (vsvg->base in vsvg_run_elts()
[all...]
/third_party/mesa3d/src/gallium/drivers/lima/
H A Dlima_texture.c170 switch (texture->base.target) { in lima_update_tex_desc()
188 if (!sampler->base.normalized_coords) in lima_update_tex_desc()
191 first_level = texture->base.u.tex.first_level; in lima_update_tex_desc()
192 last_level = texture->base.u.tex.last_level; in lima_update_tex_desc()
193 first_layer = texture->base.u.tex.first_layer; in lima_update_tex_desc()
197 desc->min_lod = lima_float_to_fixed8(sampler->base.min_lod); in lima_update_tex_desc()
198 max_lod = MIN2(sampler->base.max_lod, sampler->base.min_lod + in lima_update_tex_desc()
201 desc->lod_bias = lima_float_to_fixed8(sampler->base.lod_bias); in lima_update_tex_desc()
203 switch (sampler->base in lima_update_tex_desc()
[all...]
/kernel/linux/linux-5.10/drivers/i2c/busses/
H A Di2c-lpc2k.c73 void __iomem *base; member
87 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_reset()
88 writel(0, i2c->base + LPC24XX_I2ADDR); in i2c_lpc2k_reset()
89 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_reset()
100 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_clear_arb()
103 while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) { in i2c_lpc2k_clear_arb()
125 status = readl(i2c->base + LPC24XX_I2STAT); in i2c_lpc2k_pump_msg()
133 writel(data, i2c->base + LPC24XX_I2DAT); in i2c_lpc2k_pump_msg()
134 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_pump_msg()
145 i2c->base in i2c_lpc2k_pump_msg()
[all...]
/kernel/linux/linux-5.10/drivers/nvmem/
H A Dimx-ocotp.c26 #define IMX_OCOTP_OFFSET_B0W0 0x400 /* Offset from base address of the
81 void __iomem *base; member
105 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy() local
113 c = readl(base + IMX_OCOTP_ADDR_CTRL); in imx_ocotp_wait_for_busy()
145 void __iomem *base = priv->base; in imx_ocotp_clr_err_if_set() local
149 c = readl(base + IMX_OCOTP_ADDR_CTRL); in imx_ocotp_clr_err_if_set()
153 writel(bm_ctrl_error, base + IMX_OCOTP_ADDR_CTRL_CLR); in imx_ocotp_clr_err_if_set()
187 *buf++ = readl(priv->base in imx_ocotp_read()
[all...]
/kernel/linux/linux-6.6/drivers/nvmem/
H A Dimx-ocotp.c27 #define IMX_OCOTP_OFFSET_B0W0 0x400 /* Offset from base address of the
82 void __iomem *base; member
106 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy() local
114 c = readl(base + IMX_OCOTP_ADDR_CTRL); in imx_ocotp_wait_for_busy()
146 void __iomem *base = priv->base; in imx_ocotp_clr_err_if_set() local
150 c = readl(base + IMX_OCOTP_ADDR_CTRL); in imx_ocotp_clr_err_if_set()
154 writel(bm_ctrl_error, base + IMX_OCOTP_ADDR_CTRL_CLR); in imx_ocotp_clr_err_if_set()
196 *(u32 *)buf = readl(priv->base in imx_ocotp_read()
[all...]
/kernel/linux/linux-6.6/drivers/phy/socionext/
H A Dphy-uniphier-ahci.c21 void __iomem *base; member
79 val = readl(priv->base + CKCTRL0); in uniphier_ahciphy_pro4_init()
86 writel(val, priv->base + CKCTRL0); in uniphier_ahciphy_pro4_init()
89 val = readl(priv->base + CKCTRL1); in uniphier_ahciphy_pro4_init()
94 writel(val, priv->base + CKCTRL1); in uniphier_ahciphy_pro4_init()
96 val = readl(priv->base + RXTXCTRL); in uniphier_ahciphy_pro4_init()
107 writel(val, priv->base + RXTXCTRL); in uniphier_ahciphy_pro4_init()
118 val = readl(priv->base + CKCTRL0); in uniphier_ahciphy_pro4_power_on()
120 writel(val, priv->base + CKCTRL0); in uniphier_ahciphy_pro4_power_on()
123 val = readl(priv->base in uniphier_ahciphy_pro4_power_on()
[all...]
/kernel/linux/linux-6.6/drivers/i2c/busses/
H A Di2c-owl.c100 void __iomem *base; member
123 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, in owl_i2c_reset()
126 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, in owl_i2c_reset()
130 writel(0, i2c_dev->base + OWL_I2C_REG_STAT); in owl_i2c_reset()
138 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL, in owl_i2c_reset_fifo()
144 val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL); in owl_i2c_reset_fifo()
165 writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV); in owl_i2c_set_freq()
176 fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT); in owl_i2c_xfer_data()
180 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, in owl_i2c_xfer_data()
186 stat = readl(i2c_dev->base in owl_i2c_xfer_data()
[all...]
H A Di2c-lpc2k.c72 void __iomem *base; member
86 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_reset()
87 writel(0, i2c->base + LPC24XX_I2ADDR); in i2c_lpc2k_reset()
88 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_reset()
99 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_clear_arb()
102 while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) { in i2c_lpc2k_clear_arb()
124 status = readl(i2c->base + LPC24XX_I2STAT); in i2c_lpc2k_pump_msg()
132 writel(data, i2c->base + LPC24XX_I2DAT); in i2c_lpc2k_pump_msg()
133 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_pump_msg()
144 i2c->base in i2c_lpc2k_pump_msg()
[all...]
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dcs35l56-sdw.c169 pm_runtime_get_noresume(cs35l56->base.dev); in cs35l56_sdw_init()
171 regcache_cache_only(cs35l56->base.regmap, false); in cs35l56_sdw_init()
175 regcache_cache_only(cs35l56->base.regmap, true); in cs35l56_sdw_init()
183 if (cs35l56->base.init_done) { in cs35l56_sdw_init()
190 pm_runtime_mark_last_busy(cs35l56->base.dev); in cs35l56_sdw_init()
191 pm_runtime_put_autosuspend(cs35l56->base.dev); in cs35l56_sdw_init()
201 dev_dbg(cs35l56->base.dev, "int control_port=%#x\n", status->control_port); in cs35l56_sdw_interrupt()
210 pm_runtime_get_noresume(cs35l56->base.dev); in cs35l56_sdw_interrupt()
233 cs35l56_irq(-1, &cs35l56->base); in cs35l56_sdw_irq_work()
240 pm_runtime_put_autosuspend(cs35l56->base in cs35l56_sdw_irq_work()
[all...]
/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv_bo.c79 assert(aligment_out == srv_ws->base.page_size); in pvr_srv_alloc_display_pmr()
108 srv_ws = to_pvr_srv_winsys(srv_bo->base.ws); in buffer_release()
187 srv_bo->base.is_imported = true; in pvr_srv_winsys_buffer_create()
195 srv_ws->base.log2_page_size, in pvr_srv_winsys_buffer_create()
204 srv_bo->base.size = size; in pvr_srv_winsys_buffer_create()
205 srv_bo->base.ws = ws; in pvr_srv_winsys_buffer_create()
210 *bo_out = &srv_bo->base; in pvr_srv_winsys_buffer_create()
260 assert(aligment_out == srv_ws->base.page_size); in pvr_srv_winsys_buffer_create_from_fd()
262 srv_bo->base.ws = ws; in pvr_srv_winsys_buffer_create_from_fd()
263 srv_bo->base in pvr_srv_winsys_buffer_create_from_fd()
[all...]
/third_party/nghttp2/lib/
H A Dnghttp2_http.c108 if (nv->name->base[0] == ':') { in http_request_on_header()
127 if (lstreq("HEAD", nv->value->base, nv->value->len)) { in http_request_on_header()
132 switch (nv->value->base[6]) { in http_request_on_header()
134 if (lstreq("CONNECT", nv->value->base, nv->value->len)) { in http_request_on_header()
143 if (lstreq("OPTIONS", nv->value->base, nv->value->len)) { in http_request_on_header()
155 if (nv->value->base[0] == '/') { in http_request_on_header()
157 } else if (nv->value->len == 1 && nv->value->base[0] == '*') { in http_request_on_header()
165 if ((nv->value->len == 4 && memieq("http", nv->value->base, 4)) || in http_request_on_header()
166 (nv->value->len == 5 && memieq("https", nv->value->base, 5))) { in http_request_on_header()
188 stream->content_length = parse_uint(nv->value->base, n in http_request_on_header()
[all...]
/third_party/node/deps/nghttp2/lib/
H A Dnghttp2_http.c108 if (nv->name->base[0] == ':') { in http_request_on_header()
127 if (lstreq("HEAD", nv->value->base, nv->value->len)) { in http_request_on_header()
132 switch (nv->value->base[6]) { in http_request_on_header()
134 if (lstreq("CONNECT", nv->value->base, nv->value->len)) { in http_request_on_header()
143 if (lstreq("OPTIONS", nv->value->base, nv->value->len)) { in http_request_on_header()
155 if (nv->value->base[0] == '/') { in http_request_on_header()
157 } else if (nv->value->len == 1 && nv->value->base[0] == '*') { in http_request_on_header()
165 if ((nv->value->len == 4 && memieq("http", nv->value->base, 4)) || in http_request_on_header()
166 (nv->value->len == 5 && memieq("https", nv->value->base, 5))) { in http_request_on_header()
188 stream->content_length = parse_uint(nv->value->base, n in http_request_on_header()
[all...]
/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
H A Dnv50_context.c50 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf; in nv50_texture_barrier()
62 struct nouveau_pushbuf *push = nv50->base.pushbuf; in nv50_memory_barrier()
70 nv50->base.vbo_dirty = true; in nv50_memory_barrier()
108 nv50->base.vbo_dirty = true; in nv50_memory_barrier()
114 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf; in nv50_emit_string_marker()
141 nouveau_fence_next(&screen->base); in nv50_default_kick_notify()
142 nouveau_fence_update(&screen->base, true); in nv50_default_kick_notify()
193 if (nv50->base.pipe.stream_uploader) in nv50_destroy()
194 u_upload_destroy(nv50->base.pipe.stream_uploader); in nv50_destroy()
196 nouveau_pushbuf_bufctx(nv50->base in nv50_destroy()
[all...]
/kernel/linux/linux-5.10/drivers/pci/hotplug/
H A Dcpqphp_pci.c543 * Saves the length of all base address registers for the
556 u32 base; in cpqhp_save_base_addr_length() local
590 * IO and memory base lengths in cpqhp_save_base_addr_length()
595 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); in cpqhp_save_base_addr_length()
597 if (base) { in cpqhp_save_base_addr_length()
598 if (base & 0x01L) { in cpqhp_save_base_addr_length()
599 /* IO base in cpqhp_save_base_addr_length()
600 * set base = amount of IO space in cpqhp_save_base_addr_length()
603 base = base in cpqhp_save_base_addr_length()
699 u32 base; cpqhp_save_used_resources() local
1033 u32 base; cpqhp_valid_replace() local
[all...]
/kernel/linux/linux-6.6/drivers/pci/hotplug/
H A Dcpqphp_pci.c545 * Saves the length of all base address registers for the
558 u32 base; in cpqhp_save_base_addr_length() local
592 * IO and memory base lengths in cpqhp_save_base_addr_length()
597 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); in cpqhp_save_base_addr_length()
599 if (base) { in cpqhp_save_base_addr_length()
600 if (base & 0x01L) { in cpqhp_save_base_addr_length()
601 /* IO base in cpqhp_save_base_addr_length()
602 * set base = amount of IO space in cpqhp_save_base_addr_length()
605 base = base in cpqhp_save_base_addr_length()
701 u32 base; cpqhp_save_used_resources() local
1035 u32 base; cpqhp_valid_replace() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-apbc.c29 void __iomem *base; member
48 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
52 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
62 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
64 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
75 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
77 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
95 data = readl_relaxed(apbc->base); in clk_apbc_unprepare()
99 writel_relaxed(data, apbc->base); in clk_apbc_unprepare()
109 data = readl_relaxed(apbc->base); in clk_apbc_unprepare()
122 mmp_clk_register_apbc(const char *name, const char *parent_name, void __iomem *base, unsigned int delay, unsigned int apbc_flags, spinlock_t *lock) mmp_clk_register_apbc() argument
[all...]
/kernel/linux/linux-5.10/include/linux/
H A Dio-mapping.h24 resource_size_t base; member
43 resource_size_t base, in io_mapping_init_wc()
48 if (iomap_create_wc(base, size, &prot)) in io_mapping_init_wc()
51 iomap->base = base; in io_mapping_init_wc()
60 iomap_free(mapping->base, mapping->size); in io_mapping_fini()
71 phys_addr = mapping->base + offset; in io_mapping_map_atomic_wc()
89 phys_addr = mapping->base + offset; in io_mapping_map_wc()
107 resource_size_t base, in io_mapping_init_wc()
110 iomap->iomem = ioremap_wc(base, siz in io_mapping_init_wc()
42 io_mapping_init_wc(struct io_mapping *iomap, resource_size_t base, unsigned long size) io_mapping_init_wc() argument
106 io_mapping_init_wc(struct io_mapping *iomap, resource_size_t base, unsigned long size) io_mapping_init_wc() argument
168 io_mapping_create_wc(resource_size_t base, unsigned long size) io_mapping_create_wc() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-apbc.c26 void __iomem *base; member
45 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
49 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
59 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
61 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
72 data = readl_relaxed(apbc->base); in clk_apbc_prepare()
74 writel_relaxed(data, apbc->base); in clk_apbc_prepare()
92 data = readl_relaxed(apbc->base); in clk_apbc_unprepare()
96 writel_relaxed(data, apbc->base); in clk_apbc_unprepare()
106 data = readl_relaxed(apbc->base); in clk_apbc_unprepare()
119 mmp_clk_register_apbc(const char *name, const char *parent_name, void __iomem *base, unsigned int delay, unsigned int apbc_flags, spinlock_t *lock) mmp_clk_register_apbc() argument
[all...]
/kernel/linux/linux-6.6/arch/x86/crypto/
H A Dcamellia_aesni_avx2_glue.c72 .base.cra_name = "__ecb(camellia)",
73 .base.cra_driver_name = "__ecb-camellia-aesni-avx2",
74 .base.cra_priority = 500,
75 .base.cra_flags = CRYPTO_ALG_INTERNAL,
76 .base.cra_blocksize = CAMELLIA_BLOCK_SIZE,
77 .base.cra_ctxsize = sizeof(struct camellia_ctx),
78 .base.cra_module = THIS_MODULE,
85 .base.cra_name = "__cbc(camellia)",
86 .base.cra_driver_name = "__cbc-camellia-aesni-avx2",
87 .base
[all...]

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