Lines Matching refs:base
72 void __iomem *base;
86 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR);
87 writel(0, i2c->base + LPC24XX_I2ADDR);
88 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET);
99 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET);
102 while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) {
124 status = readl(i2c->base + LPC24XX_I2STAT);
132 writel(data, i2c->base + LPC24XX_I2DAT);
133 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
144 i2c->base + LPC24XX_I2DAT);
147 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
148 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
163 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
166 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
169 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
182 readl(i2c->base + LPC24XX_I2DAT);
187 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
188 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
204 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
207 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
210 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
218 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
228 writel(LPC24XX_STA | LPC24XX_STO, i2c->base + LPC24XX_I2CONCLR);
248 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
255 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
268 i2c->base + LPC24XX_I2DAT);
273 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
276 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
300 stat = readl(i2c->base + LPC24XX_I2STAT);
326 if (readl(i2c->base + LPC24XX_I2CONSET) & LPC24XX_SI) {
357 i2c->base = devm_platform_ioremap_resource(pdev, 0);
358 if (IS_ERR(i2c->base))
359 return PTR_ERR(i2c->base);
392 dev_err(&pdev->dev, "can't get I2C base clock\n");
405 writel(scl_high, i2c->base + LPC24XX_I2SCLH);
406 writel(clkrate - scl_high, i2c->base + LPC24XX_I2SCLL);