Lines Matching refs:base
26 #define IMX_OCOTP_OFFSET_B0W0 0x400 /* Offset from base address of the
81 void __iomem *base;
105 void __iomem *base = priv->base;
113 c = readl(base + IMX_OCOTP_ADDR_CTRL);
145 void __iomem *base = priv->base;
149 c = readl(base + IMX_OCOTP_ADDR_CTRL);
153 writel(bm_ctrl_error, base + IMX_OCOTP_ADDR_CTRL_CLR);
187 *buf++ = readl(priv->base + IMX_OCOTP_OFFSET_B0W0 +
250 timing = readl(priv->base + IMX_OCOTP_ADDR_TIMING) & 0x0FC00000;
255 writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING);
276 writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING);
344 ctrl = readl(priv->base + IMX_OCOTP_ADDR_CTRL);
349 writel(ctrl, priv->base + IMX_OCOTP_ADDR_CTRL);
377 writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
378 writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
379 writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
380 writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0);
383 writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA1);
384 writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
385 writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
386 writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
389 writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
390 writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA2);
391 writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
392 writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
395 writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
396 writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
397 writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA3);
398 writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
403 writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0);
434 priv->base + IMX_OCOTP_ADDR_CTRL_SET);
567 priv->base = devm_platform_ioremap_resource(pdev, 0);
568 if (IS_ERR(priv->base))
569 return PTR_ERR(priv->base);