Lines Matching refs:base
73 void __iomem *base;
87 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR);
88 writel(0, i2c->base + LPC24XX_I2ADDR);
89 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET);
100 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET);
103 while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) {
125 status = readl(i2c->base + LPC24XX_I2STAT);
133 writel(data, i2c->base + LPC24XX_I2DAT);
134 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
145 i2c->base + LPC24XX_I2DAT);
148 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
149 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
164 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
167 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
170 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
183 readl(i2c->base + LPC24XX_I2DAT);
188 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
189 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
205 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
208 writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
211 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
219 writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
229 writel(LPC24XX_STA | LPC24XX_STO, i2c->base + LPC24XX_I2CONCLR);
249 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
256 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
269 i2c->base + LPC24XX_I2DAT);
274 writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
277 writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
301 stat = readl(i2c->base + LPC24XX_I2STAT);
327 if (readl(i2c->base + LPC24XX_I2CONSET) & LPC24XX_SI) {
358 i2c->base = devm_platform_ioremap_resource(pdev, 0);
359 if (IS_ERR(i2c->base))
360 return PTR_ERR(i2c->base);
399 dev_err(&pdev->dev, "can't get I2C base clock\n");
413 writel(scl_high, i2c->base + LPC24XX_I2SCLH);
414 writel(clkrate - scl_high, i2c->base + LPC24XX_I2SCLL);