Lines Matching refs:base
100 void __iomem *base;
123 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
126 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
130 writel(0, i2c_dev->base + OWL_I2C_REG_STAT);
138 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
144 val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL);
165 writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV);
176 fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
180 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT,
186 stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
190 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT,
197 while ((readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
199 msg->buf[i2c_dev->msg_ptr++] = readl(i2c_dev->base +
204 while (!(readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
207 i2c_dev->base + OWL_I2C_REG_TXDAT);
221 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT,
242 while (readl(i2c_dev->base + OWL_I2C_REG_STAT) & OWL_I2C_STAT_BBB) {
289 val = readl(i2c_dev->base + OWL_I2C_REG_STAT);
292 writel(val, i2c_dev->base + OWL_I2C_REG_STAT);
301 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
319 writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
324 i2c_dev->base + OWL_I2C_REG_TXDAT);
337 writel(msg->len, i2c_dev->base + OWL_I2C_REG_DATCNT);
340 writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
346 if (readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
351 i2c_dev->base + OWL_I2C_REG_TXDAT);
359 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
362 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
366 writel(i2c_cmd, i2c_dev->base + OWL_I2C_REG_CMD);
372 ret = readl_poll_timeout_atomic(i2c_dev->base + OWL_I2C_REG_FIFOSTAT,
388 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
404 owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
446 i2c_dev->base = devm_platform_ioremap_resource(pdev, 0);
447 if (IS_ERR(i2c_dev->base))
448 return PTR_ERR(i2c_dev->base);