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Searched refs:hwirq (Results 251 - 275 of 716) sorted by relevance

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/kernel/linux/linux-5.10/arch/powerpc/platforms/powernv/
H A Dvas.c57 uint32_t chipid, hwirq; in init_vas_instance() local
106 hwirq = xive_native_alloc_irq_on_chip(chipid); in init_vas_instance()
107 if (!hwirq) { in init_vas_instance()
113 vinst->virq = irq_create_mapping(NULL, hwirq); in init_vas_instance()
116 vinst->vas_id, hwirq); in init_vas_instance()
/kernel/linux/linux-6.6/arch/arm/mach-imx/
H A Dtzic.c52 static int tzic_set_irq_fiq(unsigned int hwirq, unsigned int type) in tzic_set_irq_fiq() argument
56 index = hwirq >> 5; in tzic_set_irq_fiq()
59 mask = 1U << (hwirq & 0x1F); in tzic_set_irq_fiq()
76 int idx = d->hwirq >> 5; in tzic_irq_suspend()
83 int idx = d->hwirq >> 5; in tzic_irq_resume()
/kernel/linux/linux-6.6/arch/powerpc/platforms/powernv/
H A Dvas.c55 uint32_t chipid, hwirq; in init_vas_instance() local
110 hwirq = xive_native_alloc_irq_on_chip(chipid); in init_vas_instance()
111 if (!hwirq) { in init_vas_instance()
117 vinst->virq = irq_create_mapping(NULL, hwirq); in init_vas_instance()
120 vinst->vas_id, hwirq); in init_vas_instance()
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-davinci-cp-intc.c57 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR); in davinci_cp_intc_ack_irq()
64 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR); in davinci_cp_intc_mask_irq()
70 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET); in davinci_cp_intc_unmask_irq()
78 reg = BIT_WORD(d->hwirq); in davinci_cp_intc_set_irq_type()
79 mask = BIT_MASK(d->hwirq); in davinci_cp_intc_set_irq_type()
H A Dirq-atmel-aic-common.c116 u32 hwirq; in aic_common_ext_irq_of_init() local
123 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, hwirq) { in aic_common_ext_irq_of_init()
124 gc = irq_get_domain_generic_chip(domain, hwirq); in aic_common_ext_irq_of_init()
127 hwirq, domain->revmap_size); in aic_common_ext_irq_of_init()
132 aic->ext_irqs |= (1 << (hwirq % 32)); in aic_common_ext_irq_of_init()
H A Dirq-gic-v3.c149 static enum gic_intid_range __get_intid_range(irq_hw_number_t hwirq) in __get_intid_range() argument
151 switch (hwirq) { in __get_intid_range()
171 return __get_intid_range(d->hwirq); in get_intid_range()
176 return d->hwirq; in gic_irq()
294 *index = d->hwirq; in convert_offset_index()
302 *index = d->hwirq - EPPI_BASE_INTID + 32; in convert_offset_index()
305 *index = d->hwirq - ESPI_BASE_INTID; in convert_offset_index()
334 *index = d->hwirq; in convert_offset_index()
411 if (d->hwirq >= 8192) /* SGI/PPI/SPI only */ in gic_irq_set_irqchip_state()
438 if (d->hwirq > in gic_irq_get_irqchip_state()
1414 gic_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) gic_irq_domain_translate() argument
1491 irq_hw_number_t hwirq; gic_irq_domain_alloc() local
1551 partition_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) partition_domain_translate() argument
[all...]
H A Dirq-mvebu-pic.c46 writel(1 << d->hwirq, pic->base + PIC_CAUSE); in mvebu_pic_eoi_irq()
55 reg |= (1 << d->hwirq); in mvebu_pic_mask_irq()
65 reg &= ~(1 << d->hwirq); in mvebu_pic_unmask_irq()
70 irq_hw_number_t hwirq) in mvebu_pic_irq_map()
69 mvebu_pic_irq_map(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) mvebu_pic_irq_map() argument
H A Dirq-gic.c166 return d->hwirq; in gic_irq()
222 u32 hwirq = gic_irq(d); in gic_eoi_irq() local
224 if (hwirq < 16) in gic_eoi_irq()
225 hwirq = this_cpu_read(sgi_intid); in gic_eoi_irq()
227 writel_relaxed(hwirq, gic_cpu_base(d) + GIC_CPU_EOI); in gic_eoi_irq()
232 u32 hwirq = gic_irq(d); in gic_eoimode1_eoi_irq() local
238 if (hwirq < 16) in gic_eoimode1_eoi_irq()
239 hwirq = this_cpu_read(sgi_intid); in gic_eoimode1_eoi_irq()
241 writel_relaxed(hwirq, gic_cpu_base(d) + GIC_CPU_DEACTIVATE); in gic_eoimode1_eoi_irq()
831 writel_relaxed(2 << 24 | d->hwirq, in gic_ipi_send_mask()
1060 gic_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) gic_irq_domain_translate() argument
1117 irq_hw_number_t hwirq; gic_irq_domain_alloc() local
[all...]
H A Dirq-renesas-rza1.c107 unsigned int hwirq = fwspec->param[0]; in rza1_irqc_alloc() local
112 ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &priv->chip, in rza1_irqc_alloc()
118 spec.param_count = priv->map[hwirq].args_count; in rza1_irqc_alloc()
120 spec.param[i] = priv->map[hwirq].args[i]; in rza1_irqc_alloc()
126 struct irq_fwspec *fwspec, unsigned long *hwirq, in rza1_irqc_translate()
132 *hwirq = fwspec->param[0]; in rza1_irqc_translate()
125 rza1_irqc_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) rza1_irqc_translate() argument
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-idt3243x.c64 ilevel |= BIT(d->hwirq); in idt_gpio_irq_set_type()
66 ilevel &= ~BIT(d->hwirq); in idt_gpio_irq_set_type()
80 writel(~BIT(d->hwirq), ctrl->gpio + IDT_GPIO_ISTAT); in idt_gpio_ack()
91 ctrl->mask_cache |= BIT(d->hwirq); in idt_gpio_mask()
108 ctrl->mask_cache &= ~BIT(d->hwirq); in idt_gpio_unmask()
H A Dgpio-tegra.c279 unsigned int gpio = d->hwirq; in tegra_gpio_irq_ack()
288 unsigned int gpio = d->hwirq; in tegra_gpio_irq_mask()
298 unsigned int gpio = d->hwirq; in tegra_gpio_irq_unmask()
306 unsigned int gpio = d->hwirq, port = GPIO_PORT(gpio), lvl_type; in tegra_gpio_irq_set_type()
314 bank = &tgi->bank_info[GPIO_BANK(d->hwirq)]; in tegra_gpio_irq_set_type()
376 unsigned int gpio = d->hwirq; in tegra_gpio_irq_shutdown()
428 WARN_RATELIMIT(ret, "hwirq = %d", gpio + pin); in tegra_gpio_irq_handler()
437 unsigned int hwirq, in tegra_gpio_child_to_parent_hwirq()
442 *parent_hwirq = chip->irq.child_offset_to_irq(chip, hwirq); in tegra_gpio_child_to_parent_hwirq()
543 unsigned int gpio = d->hwirq; in tegra_gpio_irq_set_wake()
436 tegra_gpio_child_to_parent_hwirq(struct gpio_chip *chip, unsigned int hwirq, unsigned int type, unsigned int *parent_hwirq, unsigned int *parent_type) tegra_gpio_child_to_parent_hwirq() argument
[all...]
H A Dgpio-cadence.c72 iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_DIS); in cdns_gpio_irq_mask()
82 iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_EN); in cdns_gpio_irq_unmask()
92 u32 mask = BIT(d->hwirq); in cdns_gpio_irq_set_type()
130 int hwirq; in cdns_gpio_irq_handler() local
137 for_each_set_bit(hwirq, &status, chip->ngpio) in cdns_gpio_irq_handler()
138 generic_handle_domain_irq(chip->irq.domain, hwirq); in cdns_gpio_irq_handler()
H A Dgpio-max77620.c56 gpio->irq_enabled[data->hwirq] = false; in max77620_gpio_irq_mask()
57 gpiochip_disable_irq(chip, data->hwirq); in max77620_gpio_irq_mask()
65 gpiochip_enable_irq(chip, data->hwirq); in max77620_gpio_irq_unmask()
66 gpio->irq_enabled[data->hwirq] = true; in max77620_gpio_irq_unmask()
93 gpio->irq_type[data->hwirq] = irq_type; in max77620_gpio_set_irq_type()
110 unsigned int value, offset = data->hwirq; in max77620_gpio_bus_sync_unlock()
/kernel/linux/linux-6.6/drivers/clocksource/
H A Djcore-pit.c137 unsigned long hwirq; in jcore_pit_init() local
209 hwirq = irq_get_irq_data(pit_irq)->hwirq; in jcore_pit_init()
210 irqprio = (hwirq >> 2) & PIT_PRIO_MASK; in jcore_pit_init()
212 | (hwirq << PIT_IRQ_SHIFT) in jcore_pit_init()
/kernel/linux/linux-6.6/drivers/irqchip/
H A Dirq-davinci-cp-intc.c57 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR); in davinci_cp_intc_ack_irq()
64 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR); in davinci_cp_intc_mask_irq()
70 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET); in davinci_cp_intc_unmask_irq()
78 reg = BIT_WORD(d->hwirq); in davinci_cp_intc_set_irq_type()
79 mask = BIT_MASK(d->hwirq); in davinci_cp_intc_set_irq_type()
H A Dirq-atmel-aic-common.c116 u32 hwirq; in aic_common_ext_irq_of_init() local
123 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, hwirq) { in aic_common_ext_irq_of_init()
124 gc = irq_get_domain_generic_chip(domain, hwirq); in aic_common_ext_irq_of_init()
127 hwirq, domain->revmap_size); in aic_common_ext_irq_of_init()
132 aic->ext_irqs |= (1 << (hwirq % 32)); in aic_common_ext_irq_of_init()
H A Dirq-mvebu-pic.c47 writel(1 << d->hwirq, pic->base + PIC_CAUSE); in mvebu_pic_eoi_irq()
56 reg |= (1 << d->hwirq); in mvebu_pic_mask_irq()
66 reg &= ~(1 << d->hwirq); in mvebu_pic_unmask_irq()
85 irq_hw_number_t hwirq) in mvebu_pic_irq_map()
84 mvebu_pic_irq_map(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) mvebu_pic_irq_map() argument
/kernel/linux/linux-5.10/drivers/pci/controller/
H A Dpcie-rcar-host.c562 int hwirq; in rcar_msi_setup_irq() local
564 hwirq = rcar_msi_alloc(msi); in rcar_msi_setup_irq()
565 if (hwirq < 0) in rcar_msi_setup_irq()
566 return hwirq; in rcar_msi_setup_irq()
568 irq = irq_find_mapping(msi->domain, hwirq); in rcar_msi_setup_irq()
570 rcar_msi_free(msi, hwirq); in rcar_msi_setup_irq()
578 msg.data = hwirq; in rcar_msi_setup_irq()
595 int hwirq; in rcar_msi_setup_irqs() local
605 hwirq = rcar_msi_alloc_region(msi, nvec); in rcar_msi_setup_irqs()
606 if (hwirq < in rcar_msi_setup_irqs()
655 rcar_msi_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) rcar_msi_map() argument
[all...]
H A Dpcie-tango.c51 u32 offset = (d->hwirq / 32) * 4; in tango_ack()
52 u32 bit = BIT(d->hwirq % 32); in tango_ack()
61 u32 offset = (d->hwirq / 32) * 4; in update_msi_enable()
62 u32 bit = BIT(d->hwirq % 32); in update_msi_enable()
93 msg->data = d->hwirq; in tango_compose_msi_msg()
164 __clear_bit(d->hwirq, pcie->used_msi); in tango_irq_domain_free()
/kernel/linux/linux-5.10/drivers/pinctrl/intel/
H A Dpinctrl-lynxpoint.c668 u32 hwirq = irqd_to_hwirq(d); in lp_irq_ack() local
669 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_STAT); in lp_irq_ack()
673 iowrite32(BIT(hwirq % 32), reg); in lp_irq_ack()
689 u32 hwirq = irqd_to_hwirq(d); in lp_irq_enable() local
690 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); in lp_irq_enable()
694 iowrite32(ioread32(reg) | BIT(hwirq % 32), reg); in lp_irq_enable()
702 u32 hwirq = irqd_to_hwirq(d); in lp_irq_disable() local
703 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); in lp_irq_disable()
707 iowrite32(ioread32(reg) & ~BIT(hwirq % 32), reg); in lp_irq_disable()
715 u32 hwirq in lp_irq_set_type() local
[all...]
/kernel/linux/linux-5.10/drivers/mfd/
H A Dlp8788-irq.c66 irqd->enabled[data->hwirq] = 1; in lp8788_irq_enable()
73 irqd->enabled[data->hwirq] = 0; in lp8788_irq_disable()
86 enum lp8788_int_id irq = data->hwirq; in lp8788_irq_bus_sync_unlock()
132 irq_hw_number_t hwirq) in lp8788_irq_map()
131 lp8788_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) lp8788_irq_map() argument
/kernel/linux/linux-6.6/drivers/mfd/
H A Dlp8788-irq.c66 irqd->enabled[data->hwirq] = 1; in lp8788_irq_enable()
73 irqd->enabled[data->hwirq] = 0; in lp8788_irq_disable()
86 enum lp8788_int_id irq = data->hwirq; in lp8788_irq_bus_sync_unlock()
132 irq_hw_number_t hwirq) in lp8788_irq_map()
131 lp8788_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) lp8788_irq_map() argument
/kernel/linux/linux-6.6/kernel/irq/
H A Dirq_sim.c56 irq_hw_number_t hwirq = irqd_to_hwirq(data); in irq_sim_get_irqchip_state() local
61 *state = test_bit(hwirq, irq_ctx->work_ctx->pending); in irq_sim_get_irqchip_state()
74 irq_hw_number_t hwirq = irqd_to_hwirq(data); in irq_sim_set_irqchip_state() local
79 assign_bit(hwirq, irq_ctx->work_ctx->pending, state); in irq_sim_set_irqchip_state()
/kernel/linux/linux-5.10/arch/arc/kernel/
H A Dirq.c40 void arch_do_IRQ(unsigned int hwirq, struct pt_regs *regs) in arch_do_IRQ() argument
42 handle_domain_irq(NULL, hwirq, regs); in arch_do_IRQ()
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-cadence.c72 iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_DIS); in cdns_gpio_irq_mask()
80 iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_EN); in cdns_gpio_irq_unmask()
90 u32 mask = BIT(d->hwirq); in cdns_gpio_irq_set_type()
128 int hwirq; in cdns_gpio_irq_handler() local
135 for_each_set_bit(hwirq, &status, chip->ngpio) in cdns_gpio_irq_handler()
136 generic_handle_irq(irq_find_mapping(chip->irq.domain, hwirq)); in cdns_gpio_irq_handler()

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