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/kernel/linux/linux-5.10/arch/mips/kernel/
H A Dcps-vec.S174 move a1, t9
305 * struct vpe_boot_config in v1, VPE ID in t9
318 li t9, 0
327 mfc0 t9, CP0_GLOBALNUMBER
328 andi t9, t9, MIPS_GLOBALNUMBER_VP
347 mfc0 t9, $15, 1
348 and t9, t9, t1
353 mul v1, t9, t
[all...]
H A Docteon_switch.S49 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
54 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
66 LONG_L t9, TASK_STACK_CANARY(a1)
67 LONG_S t9, 0(t8)
100 dmfc0 t9, $9,7 /* CvmCtl register. */
109 bbit1 t9, 28, 1f
117 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
263 dmfc0 t9, $9,7 /* CvmCtl register. */
274 bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
284 bbit1 t9, 2
[all...]
H A Dcps-vec-ns16550.S34 * @t9: UART base address
37 1: UART_L t0, UART_LSR_OFS(t9)
40 UART_S a0, UART_TX_OFS(t9)
47 * @t9: UART base address
67 * @t9: UART base address
84 * @t9: UART base address
101 * @t9: UART base address
118 * @t9: UART base address
137 * @t9: UART base address
176 li t9, CKSEG1ADD
[all...]
/kernel/linux/linux-6.6/arch/mips/kernel/
H A Dcps-vec.S171 move a1, t9
302 * struct vpe_boot_config in v1, VPE ID in t9
314 li t9, 0
323 mfc0 t9, CP0_GLOBALNUMBER
324 andi t9, t9, MIPS_GLOBALNUMBER_VP
343 mfc0 t9, $15, 1
344 and t9, t9, t1
349 mul v1, t9, t
[all...]
H A Docteon_switch.S48 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
53 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
65 LONG_L t9, TASK_STACK_CANARY(a1)
66 LONG_S t9, 0(t8)
99 dmfc0 t9, $9,7 /* CvmCtl register. */
108 bbit1 t9, 28, 1f
116 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
262 dmfc0 t9, $9,7 /* CvmCtl register. */
273 bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
283 bbit1 t9, 2
[all...]
H A Dcps-vec-ns16550.S34 * @t9: UART base address
37 1: UART_L t0, UART_LSR_OFS(t9)
40 UART_S a0, UART_TX_OFS(t9)
47 * @t9: UART base address
67 * @t9: UART base address
84 * @t9: UART base address
101 * @t9: UART base address
118 * @t9: UART base address
137 * @t9: UART base address
176 li t9, CKSEG1ADD
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h81 /* a0:base t1:cpuid t2:node t9:count */
93 2: li t9, 0x100 /* wait for init loop */ variable
94 3: addiu t9, -1 /* limit mailbox access */ variable
95 bnez t9, 3b
/kernel/linux/linux-5.10/arch/mips/include/asm/
H A Dregdef.h51 #define t9 $25 macro
94 #define t9 $25 /* callee address for PIC/temp */ macro
/kernel/linux/linux-6.6/arch/mips/include/asm/
H A Dregdef.h51 #define t9 $25 macro
94 #define t9 $25 /* callee address for PIC/temp */ macro
/kernel/linux/linux-5.10/arch/ia64/lib/
H A Dcopy_page_mck.S53 * | n[y] | t9 | | (L2 cache line)
84 #define t9 t5 // alias! define
163 (p[D]) ld8 t9 = [src0], 3*8
170 (p[D]) st8 [dst0] = t9, 3*8
H A Dmemcpy_mck.S53 #define t9 t5 // alias! define
243 EX(.ex_handler, (p[D]) ld8 t9 = [src0], 3*8)
250 EX(.ex_handler, (p[D]) st8 [dst0] = t9, 3*8)
/kernel/linux/linux-6.6/arch/ia64/lib/
H A Dcopy_page_mck.S53 * | n[y] | t9 | | (L2 cache line)
84 #define t9 t5 // alias! define
163 (p[D]) ld8 t9 = [src0], 3*8
170 (p[D]) st8 [dst0] = t9, 3*8
H A Dmemcpy_mck.S53 #define t9 t5 // alias! define
243 EX(.ex_handler, (p[D]) ld8 t9 = [src0], 3*8)
250 EX(.ex_handler, (p[D]) st8 [dst0] = t9, 3*8)
/kernel/linux/linux-5.10/arch/alpha/lib/
H A Dstxncpy.S14 * t9 = return address
47 .frame sp, 0, t9, 0
105 ret (t9) # e1 :
118 .frame sp, 0, t9, 0
266 ret (t9) # .. e1 :
344 ret (t9) # .. e1 :
H A Dstxcpy.S13 * t9 = return address
39 .frame sp, 0, t9
91 ret (t9) # .. e1 :
99 .frame sp, 0, t9
230 ret (t9) # .. e1 :
288 ret (t9) # e1 :
H A Dev6-stxcpy.S13 * t9 = return address
50 .frame sp, 0, t9
109 ret (t9) # L0 : Latency=3
119 .frame sp, 0, t9
259 ret (t9) # L0 : Latency=3
318 ret (t9) # e1 :
H A Dev6-stxncpy.S14 * t9 = return address
58 .frame sp, 0, t9, 0
133 ret (t9) # L0 : Latency=3
150 .frame sp, 0, t9, 0
312 ret (t9) # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
/kernel/linux/linux-6.6/arch/alpha/lib/
H A Dstxncpy.S14 * t9 = return address
47 .frame sp, 0, t9, 0
105 ret (t9) # e1 :
118 .frame sp, 0, t9, 0
266 ret (t9) # .. e1 :
344 ret (t9) # .. e1 :
H A Dstxcpy.S13 * t9 = return address
39 .frame sp, 0, t9
91 ret (t9) # .. e1 :
99 .frame sp, 0, t9
230 ret (t9) # .. e1 :
288 ret (t9) # e1 :
H A Dev6-stxcpy.S13 * t9 = return address
50 .frame sp, 0, t9
109 ret (t9) # L0 : Latency=3
119 .frame sp, 0, t9
259 ret (t9) # L0 : Latency=3
318 ret (t9) # e1 :
H A Dev6-stxncpy.S14 * t9 = return address
58 .frame sp, 0, t9, 0
133 ret (t9) # L0 : Latency=3
150 .frame sp, 0, t9, 0
312 ret (t9) # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
/kernel/linux/linux-6.6/tools/perf/util/hisi-ptt-decoder/
H A Dhisi-ptt-pkt-decoder.c80 uint32_t t9 : 1; member
138 "Format", dw0.format, "Type", dw0.type, "T9", dw0.t9, in hisi_ptt_4dw_print_dw0()
/kernel/linux/linux-5.10/arch/alpha/include/uapi/asm/
H A Dregdef.h33 #define t9 $23 macro
/kernel/linux/linux-6.6/arch/alpha/include/uapi/asm/
H A Dregdef.h33 #define t9 $23 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_pps.c1288 seq->t9 = REG_FIELD_GET(PANEL_LIGHT_OFF_DELAY_MASK, pp_off); in intel_pps_readout_hw_state()
1308 drm_dbg_kms(&i915->drm, "%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n", in intel_pps_dump_state()
1310 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12); in intel_pps_dump_state()
1322 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || in intel_pps_verify_state()
1332 return delays->t1_t3 || delays->t8 || delays->t9 || in pps_delays_valid()
1394 spec->t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */ in pps_init_delays_spec()
1428 assign_final(t9); in pps_init_delays()
1436 intel_dp->pps.backlight_off_delay = get_delay(t9); in pps_init_delays()
[all...]

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