162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public
362306a36Sopenharmony_ci * License.  See the file "COPYING" in the main directory of this archive
462306a36Sopenharmony_ci * for more details.
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Copyright (C) 1985 MIPS Computer Systems, Inc.
762306a36Sopenharmony_ci * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
862306a36Sopenharmony_ci * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
962306a36Sopenharmony_ci * Copyright (C) 2011 Wind River Systems,
1062306a36Sopenharmony_ci *   written by Ralf Baechle <ralf@linux-mips.org>
1162306a36Sopenharmony_ci */
1262306a36Sopenharmony_ci#ifndef _ASM_REGDEF_H
1362306a36Sopenharmony_ci#define _ASM_REGDEF_H
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#include <asm/sgidefs.h>
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci#if _MIPS_SIM == _MIPS_SIM_ABI32
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci/*
2062306a36Sopenharmony_ci * Symbolic register names for 32 bit ABI
2162306a36Sopenharmony_ci */
2262306a36Sopenharmony_ci#define zero	$0	/* wired zero */
2362306a36Sopenharmony_ci#define AT	$1	/* assembler temp  - uppercase because of ".set at" */
2462306a36Sopenharmony_ci#define v0	$2	/* return value */
2562306a36Sopenharmony_ci#define v1	$3
2662306a36Sopenharmony_ci#define a0	$4	/* argument registers */
2762306a36Sopenharmony_ci#define a1	$5
2862306a36Sopenharmony_ci#define a2	$6
2962306a36Sopenharmony_ci#define a3	$7
3062306a36Sopenharmony_ci#define t0	$8	/* caller saved */
3162306a36Sopenharmony_ci#define t1	$9
3262306a36Sopenharmony_ci#define t2	$10
3362306a36Sopenharmony_ci#define t3	$11
3462306a36Sopenharmony_ci#define t4	$12
3562306a36Sopenharmony_ci#define ta0	$12
3662306a36Sopenharmony_ci#define t5	$13
3762306a36Sopenharmony_ci#define ta1	$13
3862306a36Sopenharmony_ci#define t6	$14
3962306a36Sopenharmony_ci#define ta2	$14
4062306a36Sopenharmony_ci#define t7	$15
4162306a36Sopenharmony_ci#define ta3	$15
4262306a36Sopenharmony_ci#define s0	$16	/* callee saved */
4362306a36Sopenharmony_ci#define s1	$17
4462306a36Sopenharmony_ci#define s2	$18
4562306a36Sopenharmony_ci#define s3	$19
4662306a36Sopenharmony_ci#define s4	$20
4762306a36Sopenharmony_ci#define s5	$21
4862306a36Sopenharmony_ci#define s6	$22
4962306a36Sopenharmony_ci#define s7	$23
5062306a36Sopenharmony_ci#define t8	$24	/* caller saved */
5162306a36Sopenharmony_ci#define t9	$25
5262306a36Sopenharmony_ci#define jp	$25	/* PIC jump register */
5362306a36Sopenharmony_ci#define k0	$26	/* kernel scratch */
5462306a36Sopenharmony_ci#define k1	$27
5562306a36Sopenharmony_ci#define gp	$28	/* global pointer */
5662306a36Sopenharmony_ci#define sp	$29	/* stack pointer */
5762306a36Sopenharmony_ci#define fp	$30	/* frame pointer */
5862306a36Sopenharmony_ci#define s8	$30	/* same like fp! */
5962306a36Sopenharmony_ci#define ra	$31	/* return address */
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci#define zero	$0	/* wired zero */
6662306a36Sopenharmony_ci#define AT	$at	/* assembler temp - uppercase because of ".set at" */
6762306a36Sopenharmony_ci#define v0	$2	/* return value - caller saved */
6862306a36Sopenharmony_ci#define v1	$3
6962306a36Sopenharmony_ci#define a0	$4	/* argument registers */
7062306a36Sopenharmony_ci#define a1	$5
7162306a36Sopenharmony_ci#define a2	$6
7262306a36Sopenharmony_ci#define a3	$7
7362306a36Sopenharmony_ci#define a4	$8	/* arg reg 64 bit; caller saved in 32 bit */
7462306a36Sopenharmony_ci#define ta0	$8
7562306a36Sopenharmony_ci#define a5	$9
7662306a36Sopenharmony_ci#define ta1	$9
7762306a36Sopenharmony_ci#define a6	$10
7862306a36Sopenharmony_ci#define ta2	$10
7962306a36Sopenharmony_ci#define a7	$11
8062306a36Sopenharmony_ci#define ta3	$11
8162306a36Sopenharmony_ci#define t0	$12	/* caller saved */
8262306a36Sopenharmony_ci#define t1	$13
8362306a36Sopenharmony_ci#define t2	$14
8462306a36Sopenharmony_ci#define t3	$15
8562306a36Sopenharmony_ci#define s0	$16	/* callee saved */
8662306a36Sopenharmony_ci#define s1	$17
8762306a36Sopenharmony_ci#define s2	$18
8862306a36Sopenharmony_ci#define s3	$19
8962306a36Sopenharmony_ci#define s4	$20
9062306a36Sopenharmony_ci#define s5	$21
9162306a36Sopenharmony_ci#define s6	$22
9262306a36Sopenharmony_ci#define s7	$23
9362306a36Sopenharmony_ci#define t8	$24	/* caller saved */
9462306a36Sopenharmony_ci#define t9	$25	/* callee address for PIC/temp */
9562306a36Sopenharmony_ci#define jp	$25	/* PIC jump register */
9662306a36Sopenharmony_ci#define k0	$26	/* kernel temporary */
9762306a36Sopenharmony_ci#define k1	$27
9862306a36Sopenharmony_ci#define gp	$28	/* global pointer - caller saved for PIC */
9962306a36Sopenharmony_ci#define sp	$29	/* stack pointer */
10062306a36Sopenharmony_ci#define fp	$30	/* frame pointer */
10162306a36Sopenharmony_ci#define s8	$30	/* callee saved */
10262306a36Sopenharmony_ci#define ra	$31	/* return address */
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci#endif /* _ASM_REGDEF_H */
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