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Searched refs:clk_id (Results 1 - 25 of 570) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clk/zynqmp/
H A Dpll.c16 * @clk_id: PLL clock ID
21 u32 clk_id; member
51 u32 clk_id = clk->clk_id; in zynqmp_pll_get_mode() local
56 ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); in zynqmp_pll_get_mode()
72 u32 clk_id = clk->clk_id; in zynqmp_pll_set_mode() local
82 ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); in zynqmp_pll_set_mode()
134 u32 clk_id = clk->clk_id; in zynqmp_pll_recalc_rate() local
171 u32 clk_id = clk->clk_id; zynqmp_pll_set_rate() local
219 u32 clk_id = clk->clk_id; zynqmp_pll_is_enabled() local
243 u32 clk_id = clk->clk_id; zynqmp_pll_enable() local
271 u32 clk_id = clk->clk_id; zynqmp_pll_disable() local
302 zynqmp_clk_register_pll(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_pll() argument
[all...]
H A Dclk-gate-zynqmp.c18 * @clk_id: Id of clock
23 u32 clk_id; member
38 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_enable() local
41 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_clk_gate_enable()
58 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_disable() local
61 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_clk_gate_disable()
78 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_is_enabled() local
107 zynqmp_clk_register_gate(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_gate() argument
[all...]
H A Dclk-mux-zynqmp.c27 * @clk_id: Id of clock
32 u32 clk_id; member
47 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_get_parent() local
51 ret = zynqmp_pm_clock_getparent(clk_id, &val); in zynqmp_clk_mux_get_parent()
71 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_set_parent() local
74 ret = zynqmp_pm_clock_setparent(clk_id, index); in zynqmp_clk_mux_set_parent()
97 * @clk_id: Id of this clock
104 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, in zynqmp_clk_register_mux() argument
[all...]
H A Dclkc.c68 * @clk_id: Clock id
78 u32 clk_id; member
121 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
141 * @clk_id: Clock index
145 static inline int zynqmp_is_valid_clock(u32 clk_id) in zynqmp_is_valid_clock() argument
147 if (clk_id >= clock_max_idx) in zynqmp_is_valid_clock()
150 return clock[clk_id].valid; in zynqmp_is_valid_clock()
155 * @clk_id: Clock index
160 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name) in zynqmp_get_clock_name() argument
164 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_name()
180 zynqmp_get_clock_type(u32 clk_id, u32 *type) zynqmp_get_clock_type() argument
285 zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_fixed_factor() argument
417 zynqmp_clock_get_topology(u32 clk_id, struct clock_topology *topology, u32 *num_nodes) zynqmp_clock_get_topology() argument
484 zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, u32 *num_parents) zynqmp_clock_get_parents() argument
517 zynqmp_get_parent_list(struct device_node *np, u32 clk_id, const char **parent_list, u32 *num_parents) zynqmp_get_parent_list() argument
558 zynqmp_register_clk_topology(int clk_id, char *clk_name, int num_parents, const char **parent_names) zynqmp_register_clk_topology() argument
[all...]
H A Ddivider.c36 * @clk_id: Id of clock
43 u32 clk_id; member
83 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_recalc_rate() local
88 ret = zynqmp_pm_clock_getdivider(clk_id, &div); in zynqmp_clk_divider_recalc_rate()
126 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_round_rate() local
134 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); in zynqmp_clk_divider_round_rate()
173 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_set_rate() local
213 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) zynqmp_clk_get_max_divisor() argument
243 zynqmp_clk_register_divider(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_divider() argument
[all...]
H A Dclk-zynqmp.h36 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
41 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
47 u32 clk_id,
52 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
58 u32 clk_id,
/kernel/linux/linux-6.6/drivers/clk/zynqmp/
H A Dpll.c16 * @clk_id: PLL clock ID
21 u32 clk_id; member
52 u32 clk_id = clk->clk_id; in zynqmp_pll_get_mode() local
57 ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); in zynqmp_pll_get_mode()
75 u32 clk_id = clk->clk_id; in zynqmp_pll_set_mode() local
85 ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); in zynqmp_pll_set_mode()
137 u32 clk_id = clk->clk_id; in zynqmp_pll_recalc_rate() local
181 u32 clk_id = clk->clk_id; zynqmp_pll_set_rate() local
229 u32 clk_id = clk->clk_id; zynqmp_pll_is_enabled() local
253 u32 clk_id = clk->clk_id; zynqmp_pll_enable() local
281 u32 clk_id = clk->clk_id; zynqmp_pll_disable() local
312 zynqmp_clk_register_pll(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_pll() argument
[all...]
H A Dclk-gate-zynqmp.c18 * @clk_id: Id of clock
23 u32 clk_id; member
38 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_enable() local
41 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_clk_gate_enable()
45 __func__, clk_name, clk_id, ret); in zynqmp_clk_gate_enable()
58 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_disable() local
61 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_clk_gate_disable()
65 __func__, clk_name, clk_id, re in zynqmp_clk_gate_disable()
78 u32 clk_id = gate->clk_id; zynqmp_clk_gate_is_enabled() local
107 zynqmp_clk_register_gate(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_gate() argument
[all...]
H A Dclkc.c69 * @clk_id: Clock id
79 u32 clk_id; member
122 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
142 * @clk_id: Clock index
146 static inline int zynqmp_is_valid_clock(u32 clk_id) in zynqmp_is_valid_clock() argument
148 if (clk_id >= clock_max_idx) in zynqmp_is_valid_clock()
151 return clock[clk_id].valid; in zynqmp_is_valid_clock()
156 * @clk_id: Clock index
161 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name) in zynqmp_get_clock_name() argument
165 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_name()
181 zynqmp_get_clock_type(u32 clk_id, u32 *type) zynqmp_get_clock_type() argument
310 zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_fixed_factor() argument
445 zynqmp_clock_get_topology(u32 clk_id, struct clock_topology *topology, u32 *num_nodes) zynqmp_clock_get_topology() argument
512 zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, u32 *num_parents) zynqmp_clock_get_parents() argument
545 zynqmp_get_parent_list(struct device_node *np, u32 clk_id, const char **parent_list, u32 *num_parents) zynqmp_get_parent_list() argument
586 zynqmp_register_clk_topology(int clk_id, char *clk_name, int num_parents, const char **parent_names) zynqmp_register_clk_topology() argument
[all...]
H A Ddivider.c36 * @clk_id: Id of clock
44 u32 clk_id; member
84 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_recalc_rate() local
89 ret = zynqmp_pm_clock_getdivider(clk_id, &div); in zynqmp_clk_divider_recalc_rate()
127 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_round_rate() local
135 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); in zynqmp_clk_divider_round_rate()
174 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_set_rate() local
219 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) zynqmp_clk_get_max_divisor() argument
272 zynqmp_clk_register_divider(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) zynqmp_clk_register_divider() argument
[all...]
H A Dclk-mux-zynqmp.c27 * @clk_id: Id of clock
32 u32 clk_id; member
47 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_get_parent() local
51 ret = zynqmp_pm_clock_getparent(clk_id, &val); in zynqmp_clk_mux_get_parent()
77 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_set_parent() local
80 ret = zynqmp_pm_clock_setparent(clk_id, index); in zynqmp_clk_mux_set_parent()
124 * @clk_id: Id of this clock
131 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, in zynqmp_clk_register_mux() argument
[all...]
H A Dclk-zynqmp.h70 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
75 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
81 u32 clk_id,
86 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
92 u32 clk_id,
/kernel/linux/linux-5.10/drivers/clk/keystone/
H A Dsci-clk.c52 * @clk_id: Clock index
63 u32 clk_id; member
88 clk->clk_id, enable_ssc, in sci_clk_prepare()
105 clk->clk_id); in sci_clk_unprepare()
109 clk->dev_id, clk->clk_id, ret); in sci_clk_unprepare()
126 clk->clk_id, &req_state, in sci_clk_is_prepared()
131 clk->dev_id, clk->clk_id, ret); in sci_clk_is_prepared()
154 clk->clk_id, &freq); in sci_clk_recalc_rate()
158 clk->dev_id, clk->clk_id, ret); in sci_clk_recalc_rate()
189 clk->clk_id, in sci_clk_determine_rate()
437 int clk_id = 0; ti_sci_scan_clocks_from_fw() local
528 int clk_id; ti_sci_scan_clocks_from_dt() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/keystone/
H A Dsci-clk.c43 * @clk_id: Clock index
54 u32 clk_id; member
79 clk->clk_id, enable_ssc, in sci_clk_prepare()
96 clk->clk_id); in sci_clk_unprepare()
100 clk->dev_id, clk->clk_id, ret); in sci_clk_unprepare()
117 clk->clk_id, &req_state, in sci_clk_is_prepared()
122 clk->dev_id, clk->clk_id, ret); in sci_clk_is_prepared()
145 clk->clk_id, &freq); in sci_clk_recalc_rate()
149 clk->dev_id, clk->clk_id, ret); in sci_clk_recalc_rate()
180 clk->clk_id, in sci_clk_determine_rate()
428 int clk_id = 0; ti_sci_scan_clocks_from_fw() local
519 int clk_id; ti_sci_scan_clocks_from_dt() local
[all...]
/kernel/linux/linux-5.10/tools/testing/selftests/timens/
H A Dtimens.h64 static inline int _settime(clockid_t clk_id, time_t offset) in _settime() argument
69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) in _settime()
70 clk_id = CLOCK_MONOTONIC; in _settime()
72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); in _settime()
86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) in _gettime() argument
91 if (clock_gettime(clk_id, res)) { in _gettime()
92 pr_perror("clock_gettime(%d)", (int)clk_id); in _gettime()
98 err = syscall(SYS_clock_gettime, clk_id, res); in _gettime()
100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); in _gettime()
[all...]
/kernel/linux/linux-6.6/tools/testing/selftests/timens/
H A Dtimens.h64 static inline int _settime(clockid_t clk_id, time_t offset) in _settime() argument
69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) in _settime()
70 clk_id = CLOCK_MONOTONIC; in _settime()
72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); in _settime()
86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) in _gettime() argument
91 if (clock_gettime(clk_id, res)) { in _gettime()
92 pr_perror("clock_gettime(%d)", (int)clk_id); in _gettime()
98 err = syscall(SYS_clock_gettime, clk_id, res); in _gettime()
100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); in _gettime()
[all...]
/kernel/linux/linux-5.10/drivers/soc/mediatek/
H A Dmtk-scpsys.c81 enum clk_id { enum
119 * @clk_id: The basic clocks required by this power domain.
129 enum clk_id clk_id[MAX_CLKS]; member
496 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { in init_scp()
497 struct clk *c = clk[data->clk_id[j]]; in init_scp()
564 .clk_id = {CLK_NONE},
572 .clk_id = {CLK_MM},
582 .clk_id = {CLK_MFG},
591 .clk_id
[all...]
/kernel/linux/linux-6.6/drivers/pmdomain/mediatek/
H A Dmtk-scpsys.c81 enum clk_id { enum
119 * @clk_id: The basic clocks required by this power domain.
129 enum clk_id clk_id[MAX_CLKS]; member
496 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { in init_scp()
497 struct clk *c = clk[data->clk_id[j]]; in init_scp()
564 .clk_id = {CLK_NONE},
572 .clk_id = {CLK_MM},
582 .clk_id = {CLK_MFG},
591 .clk_id
[all...]
/kernel/linux/linux-6.6/drivers/firmware/arm_scmi/
H A Dclock.c86 __le32 clk_id; member
136 u32 clk_id, struct scmi_clock_info *clk, in scmi_clock_attributes_get()
145 sizeof(clk_id), sizeof(*attr), &t); in scmi_clock_attributes_get()
149 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
171 ph->hops->extended_name_get(ph, CLOCK_NAME_GET, clk_id, in scmi_clock_attributes_get()
198 u32 clk_id; member
209 msg->id = cpu_to_le32(p->clk_id); in iter_clk_describe_prepare_message()
288 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, in scmi_clock_describe_rates_get() argument
299 .clk_id = clk_id, in scmi_clock_describe_rates_get()
135 scmi_clock_attributes_get(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk, u32 version) scmi_clock_attributes_get() argument
328 scmi_clock_rate_get(const struct scmi_protocol_handle *ph, u32 clk_id, u64 *value) scmi_clock_rate_get() argument
349 scmi_clock_rate_set(const struct scmi_protocol_handle *ph, u32 clk_id, u64 rate) scmi_clock_rate_set() argument
397 scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, u32 config, bool atomic) scmi_clock_config_set() argument
421 scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id) scmi_clock_enable() argument
426 scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id) scmi_clock_disable() argument
431 scmi_clock_enable_atomic(const struct scmi_protocol_handle *ph, u32 clk_id) scmi_clock_enable_atomic() argument
437 scmi_clock_disable_atomic(const struct scmi_protocol_handle *ph, u32 clk_id) scmi_clock_disable_atomic() argument
451 scmi_clock_info_get(const struct scmi_protocol_handle *ph, u32 clk_id) scmi_clock_info_get() argument
477 scmi_clk_rate_notify(const struct scmi_protocol_handle *ph, u32 clk_id, int message_id, bool enable) scmi_clk_rate_notify() argument
[all...]
/kernel/linux/linux-5.10/drivers/firmware/arm_scmi/
H A Dclock.c102 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get()
109 sizeof(clk_id), sizeof(*attr), &t); in scmi_clock_attributes_get()
113 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
139 scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id, in scmi_clock_describe_rates_get() argument
160 clk_desc->id = cpu_to_le32(clk_id); in scmi_clock_describe_rates_get()
217 scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value) in scmi_clock_rate_get() argument
227 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_rate_get()
237 static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id, in scmi_clock_rate_set() argument
257 cfg->id = cpu_to_le32(clk_id); in scmi_clock_rate_set()
274 scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u3 argument
101 scmi_clock_attributes_get(const struct scmi_handle *handle, u32 clk_id, struct scmi_clock_info *clk) scmi_clock_attributes_get() argument
295 scmi_clock_enable(const struct scmi_handle *handle, u32 clk_id) scmi_clock_enable() argument
300 scmi_clock_disable(const struct scmi_handle *handle, u32 clk_id) scmi_clock_disable() argument
313 scmi_clock_info_get(const struct scmi_handle *handle, u32 clk_id) scmi_clock_info_get() argument
[all...]
/kernel/linux/linux-6.6/tools/testing/selftests/vDSO/
H A Dvdso_test_abi.c32 typedef long (*vdso_clock_gettime_t)(clockid_t clk_id, struct timespec *ts);
33 typedef long (*vdso_clock_getres_t)(clockid_t clk_id, struct timespec *ts);
63 static void vdso_test_clock_gettime(clockid_t clk_id) in vdso_test_clock_gettime() argument
75 long ret = vdso_clock_gettime(clk_id, &ts); in vdso_test_clock_gettime()
108 static void vdso_test_clock_getres(clockid_t clk_id) in vdso_test_clock_getres() argument
122 long ret = vdso_clock_getres(clk_id, &ts); in vdso_test_clock_getres()
131 ret = syscall(SYS_clock_getres, clk_id, &sys_ts); in vdso_test_clock_getres()
/kernel/linux/linux-5.10/drivers/firmware/
H A Dti_sci.c918 * @clk_id: Clock identifier for the device for this request.
927 u32 dev_id, u32 clk_id, in ti_sci_set_clock_state()
955 if (clk_id < 255) { in ti_sci_set_clock_state()
956 req->clk_id = clk_id; in ti_sci_set_clock_state()
958 req->clk_id = 255; in ti_sci_set_clock_state()
959 req->clk_id_32 = clk_id; in ti_sci_set_clock_state()
983 * @clk_id: Clock identifier for the device for this request.
992 u32 dev_id, u32 clk_id, in ti_sci_cmd_get_clock_state()
1023 if (clk_id < 25 in ti_sci_cmd_get_clock_state()
926 ti_sci_set_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 flags, u8 state) ti_sci_set_clock_state() argument
991 ti_sci_cmd_get_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u8 *programmed_state, u8 *current_state) ti_sci_cmd_get_clock_state() argument
1067 ti_sci_cmd_get_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool needs_ssc, bool can_change_freq, bool enable_input_term) ti_sci_cmd_get_clock() argument
1093 ti_sci_cmd_idle_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) ti_sci_cmd_idle_clock() argument
1113 ti_sci_cmd_put_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) ti_sci_cmd_put_clock() argument
1132 ti_sci_cmd_clk_is_auto(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state) ti_sci_cmd_clk_is_auto() argument
1161 ti_sci_cmd_clk_is_on(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) ti_sci_cmd_clk_is_on() argument
1194 ti_sci_cmd_clk_is_off(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) ti_sci_cmd_clk_is_off() argument
1226 ti_sci_cmd_clk_set_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 parent_id) ti_sci_cmd_clk_set_parent() argument
1294 ti_sci_cmd_clk_get_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *parent_id) ti_sci_cmd_clk_get_parent() argument
1363 ti_sci_cmd_clk_get_num_parents(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *num_parents) ti_sci_cmd_clk_get_num_parents() argument
1441 ti_sci_cmd_clk_get_match_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq, u64 *match_freq) ti_sci_cmd_clk_get_match_freq() argument
1518 ti_sci_cmd_clk_set_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq) ti_sci_cmd_clk_set_freq() argument
1584 ti_sci_cmd_clk_get_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 *freq) ti_sci_cmd_clk_get_freq() argument
[all...]
/kernel/linux/linux-6.6/drivers/firmware/
H A Dti_sci.c934 * @clk_id: Clock identifier for the device for this request.
943 u32 dev_id, u32 clk_id, in ti_sci_set_clock_state()
971 if (clk_id < 255) { in ti_sci_set_clock_state()
972 req->clk_id = clk_id; in ti_sci_set_clock_state()
974 req->clk_id = 255; in ti_sci_set_clock_state()
975 req->clk_id_32 = clk_id; in ti_sci_set_clock_state()
999 * @clk_id: Clock identifier for the device for this request.
1008 u32 dev_id, u32 clk_id, in ti_sci_cmd_get_clock_state()
1039 if (clk_id < 25 in ti_sci_cmd_get_clock_state()
942 ti_sci_set_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 flags, u8 state) ti_sci_set_clock_state() argument
1007 ti_sci_cmd_get_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u8 *programmed_state, u8 *current_state) ti_sci_cmd_get_clock_state() argument
1083 ti_sci_cmd_get_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool needs_ssc, bool can_change_freq, bool enable_input_term) ti_sci_cmd_get_clock() argument
1109 ti_sci_cmd_idle_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) ti_sci_cmd_idle_clock() argument
1129 ti_sci_cmd_put_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) ti_sci_cmd_put_clock() argument
1148 ti_sci_cmd_clk_is_auto(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state) ti_sci_cmd_clk_is_auto() argument
1177 ti_sci_cmd_clk_is_on(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) ti_sci_cmd_clk_is_on() argument
1210 ti_sci_cmd_clk_is_off(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) ti_sci_cmd_clk_is_off() argument
1242 ti_sci_cmd_clk_set_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 parent_id) ti_sci_cmd_clk_set_parent() argument
1310 ti_sci_cmd_clk_get_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *parent_id) ti_sci_cmd_clk_get_parent() argument
1379 ti_sci_cmd_clk_get_num_parents(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *num_parents) ti_sci_cmd_clk_get_num_parents() argument
1457 ti_sci_cmd_clk_get_match_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq, u64 *match_freq) ti_sci_cmd_clk_get_match_freq() argument
1534 ti_sci_cmd_clk_set_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq) ti_sci_cmd_clk_set_freq() argument
1600 ti_sci_cmd_clk_get_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 *freq) ti_sci_cmd_clk_get_freq() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/baikal-t1/
H A Dclk-ccu-pll.c82 unsigned int clk_id) in ccu_pll_find_desc()
89 if (pll && pll->id == clk_id) in ccu_pll_find_desc()
131 unsigned int clk_id; in ccu_pll_of_clk_hw_get() local
133 clk_id = clkspec->args[0]; in ccu_pll_of_clk_hw_get()
134 pll = ccu_pll_find_desc(data, clk_id); in ccu_pll_of_clk_hw_get()
136 pr_info("Invalid PLL clock ID %d specified\n", clk_id); in ccu_pll_of_clk_hw_get()
81 ccu_pll_find_desc(struct ccu_pll_data *data, unsigned int clk_id) ccu_pll_find_desc() argument
/kernel/linux/linux-5.10/drivers/clk/tegra/
H A Dclk-tegra-audio.c35 int clk_id; member
41 .clk_id = tegra_clk_ ## _name,\
66 int clk_id; member
77 .clk_id = tegra_clk_ ## _name ## _2x,\
181 dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks); in tegra_audio_clk_init()
207 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
231 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()

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