Lines Matching refs:clk_id
69 * @clk_id: Clock id
79 u32 clk_id;
122 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
142 * @clk_id: Clock index
146 static inline int zynqmp_is_valid_clock(u32 clk_id)
148 if (clk_id >= clock_max_idx)
151 return clock[clk_id].valid;
156 * @clk_id: Clock index
161 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name)
165 ret = zynqmp_is_valid_clock(clk_id);
167 strscpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN);
176 * @clk_id: Clock index
181 static int zynqmp_get_clock_type(u32 clk_id, u32 *type)
185 ret = zynqmp_is_valid_clock(clk_id);
187 *type = clock[clk_id].type;
303 * @clk_id: Clock ID
310 struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id,
323 qdata.arg1 = clk_id;
439 * @clk_id: Clock index
445 static int zynqmp_clock_get_topology(u32 clk_id,
454 ret = zynqmp_pm_clock_get_topology(clock[clk_id].clk_id, j,
506 * @clk_id: Clock index
512 static int zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents,
521 ret = zynqmp_pm_clock_get_parents(clock[clk_id].clk_id, j,
539 * @clk_id: Clock index
545 static int zynqmp_get_parent_list(struct device_node *np, u32 clk_id,
549 u32 total_parents = clock[clk_id].num_parents;
553 clk_nodes = clock[clk_id].node;
554 parents = clock[clk_id].parent;
579 * @clk_id: Clock index
586 static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name,
596 nodes = clock[clk_id].node;
597 num_nodes = clock[clk_id].num_nodes;
598 clk_dev_id = clock[clk_id].clk_id;
712 clock[i].clk_id = FIELD_PREP(CLK_ATTR_NODE_CLASS, class) |
717 zynqmp_pm_clock_get_name(clock[i].clk_id, &name);