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/kernel/linux/linux-5.10/arch/arm/mm/
H A Dabort-lv4t.S15 * abort here if the I-TLB and D-TLB aren't seeing the same
23 bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
33 and r7, r8, #15 << 24
67 and r6, r8, r7
68 and r9, r8, r7, lsl #1
70 and r9, r8, r7, lsl #2
72 and r9, r8, r7, lsl #3
76 and r6, r6, #15 @ r6 = no. of registers to transfer.
77 and r9, r8, #15 << 16 @ Extract 'n' from instruction
91 and r
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/kernel/linux/linux-6.6/arch/arm/mm/
H A Dabort-lv4t.S15 * abort here if the I-TLB and D-TLB aren't seeing the same
23 bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
33 and r7, r8, #15 << 24
67 and r6, r8, r7
68 and r9, r8, r7, lsl #1
70 and r9, r8, r7, lsl #2
72 and r9, r8, r7, lsl #3
76 and r6, r6, #15 @ r6 = no. of registers to transfer.
77 and r9, r8, #15 << 16 @ Extract 'n' from instruction
91 and r
[all...]
/kernel/liteos_a/arch/arm/arm/src/
H A Dlos_hw_exc.S5 * Redistribution and use in source and binary forms, with or without modification,
9 * conditions and the following disclaimer.
12 * of conditions and the following disclaimer in the documentation and/or other materials
176 SRSFD #CPSR_SVC_MODE! @ Save pc and cpsr to svc sp, ARMv6 and above support
177 MSR CPSR_c, #(CPSR_INT_DISABLE | CPSR_SVC_MODE) @ Switch to svc mode, and disable all interrupt
179 STMFD SP, {R13, R14}^ @ push user sp and lr
183 STMFD SP!, {R2-R3} @ far and fs
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/kernel/linux/linux-5.10/arch/m68k/fpsp040/
H A Dx_operr.S10 | NAN is stored in the dest reg. If the dest format is b, w, or l and
13 | the dest format is integer (b, w, l) and the operr is caused by
21 | overflow -> OPERR, the exponent in wbte (and fpte) is:
28 | So, wbtemp and fptemp will contain the following on erroneously
93 | kernel handler. Set the operr bits and clean up, leaving
94 | only the integer exception frame on the stack, and the
116 bsr check_upper |check if exp and ms mant are special
121 bra not_enabled |clean and exit
163 bsr check_upper |check if exp and ms mant are special
168 bra not_enabled |clean and exi
[all...]
H A Dbugfix.S18 | * and so on.
53 | xu conflict and NOT an nu conflict */
93 | FRESTORE and return;
100 | xu conflict and NOT an nu conflict */
143 | FRESTORE and return;
148 | FRESTORE and return;
172 | Simply branch to fix_done and exit normally.
191 | Check for opclass 0. If not, go and check for opclass 2 and sgl.
197 | Check for cu and n
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H A Dget_op.S7 | type exception handler ('unsupp' - vector 55) and the unimplemented
9 | determines the opclass (0, 2, or 3) and branches to the
13 | For UNSUPPORTED data/format (exception vector 55) and for
18 | number(s) is normalized and the operand type tag is updated.
20 | - For a packed number (opclass 2) the number is unpacked and the
31 | number is packed and written to user memory. For the other
33 | and the instruction is then restored back into the '040. The
38 | The '040 takes an unsupported data trap and gets to this
39 | routine. The number is normalized, put back on the stack and
42 | a normalized number in the source and th
[all...]
H A Ddecbin.S11 | Saves and Modifies: D2-D5
21 | and NaN operands are dispatched without entering this routine)
24 | A1. Convert the bcd exponent to binary by successive adds and muls.
27 | digits, rather than 1 integer and 16 fraction digits.
31 | adds and muls in FP0. Set the sign according to SM.
39 | exponent equal to the exponent from A1 and the zero count
40 | added if SM = 1 and subtracted if SM = 0. Scale the
53 | tables rounded to RN, RM, and RP, according to the table
59 | exponent sign is positive, and dividing FP0 by FP1 if
62 | Clean up and retur
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/kernel/linux/linux-6.6/arch/m68k/fpsp040/
H A Dx_operr.S10 | NAN is stored in the dest reg. If the dest format is b, w, or l and
13 | the dest format is integer (b, w, l) and the operr is caused by
21 | overflow -> OPERR, the exponent in wbte (and fpte) is:
28 | So, wbtemp and fptemp will contain the following on erroneously
93 | kernel handler. Set the operr bits and clean up, leaving
94 | only the integer exception frame on the stack, and the
116 bsr check_upper |check if exp and ms mant are special
121 bra not_enabled |clean and exit
163 bsr check_upper |check if exp and ms mant are special
168 bra not_enabled |clean and exi
[all...]
H A Dbugfix.S18 | * and so on.
53 | xu conflict and NOT an nu conflict */
93 | FRESTORE and return;
100 | xu conflict and NOT an nu conflict */
143 | FRESTORE and return;
148 | FRESTORE and return;
172 | Simply branch to fix_done and exit normally.
191 | Check for opclass 0. If not, go and check for opclass 2 and sgl.
197 | Check for cu and n
[all...]
H A Dget_op.S7 | type exception handler ('unsupp' - vector 55) and the unimplemented
9 | determines the opclass (0, 2, or 3) and branches to the
13 | For UNSUPPORTED data/format (exception vector 55) and for
18 | number(s) is normalized and the operand type tag is updated.
20 | - For a packed number (opclass 2) the number is unpacked and the
31 | number is packed and written to user memory. For the other
33 | and the instruction is then restored back into the '040. The
38 | The '040 takes an unsupported data trap and gets to this
39 | routine. The number is normalized, put back on the stack and
42 | a normalized number in the source and th
[all...]
H A Ddecbin.S11 | Saves and Modifies: D2-D5
21 | and NaN operands are dispatched without entering this routine)
24 | A1. Convert the bcd exponent to binary by successive adds and muls.
27 | digits, rather than 1 integer and 16 fraction digits.
31 | adds and muls in FP0. Set the sign according to SM.
39 | exponent equal to the exponent from A1 and the zero count
40 | added if SM = 1 and subtracted if SM = 0. Scale the
53 | tables rounded to RN, RM, and RP, according to the table
59 | exponent sign is positive, and dividing FP0 by FP1 if
62 | Clean up and retur
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/kernel/linux/linux-5.10/arch/mips/kernel/
H A Dentry.S2 * This file is subject to the terms and conditions of the GNU General Public
50 # between sampling and return
85 local_irq_disable # make sure need_resched and
87 # sampling and return
90 and t0, a2, t0
105 and v0, ST0_IEP
107 and v0, ST0_IE
129 local_irq_disable # make sure need_resched and
131 # sampling and return
139 work_notifysig: # deal with pending signals and
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H A Drelocate_kernel.S34 and s3, s2, 0x1
36 and s4, s2, ~0x1 /* store destination addr in s4 */
41 and s3, s2, 0x2
43 and s0, s2, ~0x2
48 and s3, s2, 0x4
53 and s3, s2, 0x8
55 and s2, s2, ~0x8
103 * Other CPUs should wait until code is relocated and
113 /* Non-relocated address works for args and kexec_start_address ( old
/kernel/linux/linux-6.6/arch/mips/kernel/
H A Dentry.S2 * This file is subject to the terms and conditions of the GNU General Public
49 # between sampling and return
84 local_irq_disable # make sure need_resched and
86 # sampling and return
89 and t0, a2, t0
104 and v0, ST0_IEP
106 and v0, ST0_IE
128 local_irq_disable # make sure need_resched and
130 # sampling and return
138 work_notifysig: # deal with pending signals and
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H A Drelocate_kernel.S36 and s3, s2, 0x1
38 and s4, s2, ~0x1 /* store destination addr in s4 */
43 and s3, s2, 0x2
45 and s0, s2, ~0x2
50 and s3, s2, 0x4
55 and s3, s2, 0x8
57 and s2, s2, ~0x8
105 * Other CPUs should wait until code is relocated and
115 /* Non-relocated address works for args and kexec_start_address ( old
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h2 * This file is subject to the terms and conditions of the GNU General Public
21 # addresses, and need to have the appropriate memory region set
40 # First clear off CvmCtl[IPPCI] bit and move the performance
43 and v0, v0, v1
47 and t1, v1, 0xfff8
50 and t1, v1, 0xfff8
53 and t1, v1, 0xfff8
56 and t1, v1, 0xff00
59 and t1, v1, 0x00ff
60 slti t1, t1, 2 # 66-P1.2 and late
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/kernel/linux/linux-6.6/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h2 * This file is subject to the terms and conditions of the GNU General Public
21 # addresses, and need to have the appropriate memory region set
40 # First clear off CvmCtl[IPPCI] bit and move the performance
43 and v0, v0, v1
47 and t1, v1, 0xfff8
50 and t1, v1, 0xfff8
53 and t1, v1, 0xfff8
56 and t1, v1, 0xff00
59 and t1, v1, 0x00ff
60 slti t1, t1, 2 # 66-P1.2 and late
[all...]
/kernel/linux/linux-5.10/arch/alpha/lib/
H A Dstrncat.S11 * implementation in lib/string.c and is, IMHO, more sensible.
42 and $2, $3, $2
44 and $2, 0xf0, $3 # binary search for that set bit
45 and $2, 0xcc, $4
46 and $2, 0xaa, $5
68 and $24, 0x80, $2 # no zero next byte
77 1: /* Here we must read the next DST word and clear the first byte. */
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/
H A Dfskeleton.S9 |THE SOFTWARE is provided on an "AS IS" basis and without warranty.
13 |and any warranty against infringement with regard to the SOFTWARE
14 |(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
21 |Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
23 |You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
24 |so long as this entire notice is retained without alteration in any modified and/or
25 |redistributed versions, and that such modified versions are clearly identified as such.
75 | The sample routine below simply clears the exception status bit and
94 | The sample routine below simply clears the exception status bit and
113 | The sample routine below simply clears the exception status bit and
[all...]
/kernel/linux/linux-6.6/arch/m68k/ifpsp060/
H A Dfskeleton.S9 |THE SOFTWARE is provided on an "AS IS" basis and without warranty.
13 |and any warranty against infringement with regard to the SOFTWARE
14 |(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
21 |Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
23 |You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
24 |so long as this entire notice is retained without alteration in any modified and/or
25 |redistributed versions, and that such modified versions are clearly identified as such.
75 | The sample routine below simply clears the exception status bit and
94 | The sample routine below simply clears the exception status bit and
113 | The sample routine below simply clears the exception status bit and
[all...]
/kernel/linux/linux-5.10/arch/ia64/lib/
H A Ddo_csum.S19 * More cleanup and tuning.
21 * Clean up and optimize and the software pipeline, loading two
37 // allows us to commute operations. So we do the "head" and "tail"
38 // first to finish at full speed in the body. Once we get the head and
45 // possible load latency and also to accommodate for head and tail.
88 // nfs read/write, the L1 cache hit rate is at 60% and L2 cache hit rate is at 99.8%
123 #define ELD_1 p[LOAD_LATENCY+1] // and next stage
143 and first
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/kernel/linux/linux-5.10/arch/sparc/kernel/
H A Detrap_32.S38 tsetup_7win_patch2: and %g2, 0x7f, %g2
39 tsetup_7win_patch3: and %g2, 0x7f, %g2
40 tsetup_7win_patch4: and %g1, 0x7f, %g1
42 tsetup_7win_patch6: and %g2, 0x7f, %g2
45 /* At trap time, interrupts and all generic traps do the
54 * to call c-code and the trap cannot be handled in-window)
71 * %l0 contains trap time %psr, %l1 and %l2 contain the
72 * trap pc and npc, and %l3 contains the trap time %wim.
80 * or kernel and branc
[all...]
/kernel/linux/linux-6.6/arch/ia64/lib/
H A Ddo_csum.S19 * More cleanup and tuning.
21 * Clean up and optimize and the software pipeline, loading two
37 // allows us to commute operations. So we do the "head" and "tail"
38 // first to finish at full speed in the body. Once we get the head and
45 // possible load latency and also to accommodate for head and tail.
88 // nfs read/write, the L1 cache hit rate is at 60% and L2 cache hit rate is at 99.8%
123 #define ELD_1 p[LOAD_LATENCY+1] // and next stage
143 and first
[all...]
/kernel/linux/linux-6.6/arch/sparc/kernel/
H A Detrap_32.S38 tsetup_7win_patch2: and %g2, 0x7f, %g2
39 tsetup_7win_patch3: and %g2, 0x7f, %g2
40 tsetup_7win_patch4: and %g1, 0x7f, %g1
42 tsetup_7win_patch6: and %g2, 0x7f, %g2
45 /* At trap time, interrupts and all generic traps do the
54 * to call c-code and the trap cannot be handled in-window)
71 * %l0 contains trap time %psr, %l1 and %l2 contain the
72 * trap pc and npc, and %l3 contains the trap time %wim.
80 * or kernel and branc
[all...]
/kernel/linux/linux-6.6/arch/alpha/lib/
H A Dstrncat.S11 * implementation in lib/string.c and is, IMHO, more sensible.
42 and $2, $3, $2
44 and $2, 0xf0, $3 # binary search for that set bit
45 and $2, 0xcc, $4
46 and $2, 0xaa, $5
68 and $24, 0x80, $2 # no zero next byte
77 1: /* Here we must read the next DST word and clear the first byte. */

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