| /kernel/linux/linux-5.10/drivers/clk/versatile/ |
| H A D | clk-icst.c | 64 u32 val; in vco_get() local
67 ret = regmap_read(icst->map, icst->vcoreg_off, &val); in vco_get()
80 vco->v = val & INTEGRATOR_AP_CM_BITS; in vco_get()
95 vco->v = val & INTEGRATOR_AP_SYS_BITS; in vco_get()
110 bool divxy = !!(val & INTEGRATOR_AP_PCI_25_33_MHZ); in vco_get()
127 vco->v = val & 0xFF; in vco_get()
129 vco->s = (val >> 8) & 7; in vco_get()
134 vco->v = (val >> 12) & 0xFF; in vco_get()
136 vco->s = (val >> 20) & 7; in vco_get()
140 vco->v = val in vco_get()
154 u32 val; vco_set() local
294 unsigned int val; icst_set_rate() local
[all...] |
| /kernel/linux/linux-5.10/arch/c6x/platforms/ |
| H A D | dscr.c | 129 static void dscr_write_locked1(u32 reg, u32 val, in dscr_write_locked1() argument
148 : "a"(reg_addr), "b"(val), "a"(lock_addr), "b"(key) in dscr_write_locked1()
158 static void dscr_write_locked2(u32 reg, u32 val, in dscr_write_locked2() argument
164 soc_writel(val, dscr.base + reg); in dscr_write_locked2()
169 static void dscr_write(u32 reg, u32 val) in dscr_write() argument
175 dscr_write_locked1(reg, val, lock->lockreg, lock->key); in dscr_write()
177 dscr_write_locked2(reg, val, dscr.kick_reg[0], dscr.kick_key[0], in dscr_write()
180 soc_writel(val, dscr.base + reg); in dscr_write()
192 u32 ctl_val, val; in dscr_set_devstate() local
227 val in dscr_set_devstate()
260 u32 val; dscr_rmii_reset() local
284 u32 val; dscr_parse_devstat() local
[all...] |
| /kernel/linux/linux-5.10/arch/arm64/kvm/vgic/ |
| H A D | vgic-v2.c | 14 static inline void vgic_v2_write_lr(int lr, u32 val) in vgic_v2_write_lr() argument
18 writel_relaxed(val, base + GICH_LR0 + (lr * 4)); in vgic_v2_write_lr()
60 u32 val = cpuif->vgic_lr[lr]; in vgic_v2_fold_lr_state() local
61 u32 cpuid, intid = val & GICH_LR_VIRTUALID; in vgic_v2_fold_lr_state()
65 cpuid = val & GICH_LR_PHYSID_CPUID; in vgic_v2_fold_lr_state()
70 if (lr_signals_eoi_mi(val) && vgic_valid_spi(vcpu->kvm, intid)) in vgic_v2_fold_lr_state()
79 irq->active = !!(val & GICH_LR_ACTIVE_BIT); in vgic_v2_fold_lr_state()
86 (val & GICH_LR_PENDING_BIT)) { in vgic_v2_fold_lr_state()
96 if (irq->config == VGIC_CONFIG_LEVEL && !(val & GICH_LR_STATE)) in vgic_v2_fold_lr_state()
112 if (vgic_irq_is_mapped_level(irq) && (val in vgic_v2_fold_lr_state()
139 u32 val = irq->intid; vgic_v2_populate_lr() local
[all...] |
| /kernel/linux/linux-5.10/arch/mips/pci/ |
| H A D | ops-tx4927.c | 112 static void icd_writeb(u8 val, int offset, in icd_writeb() argument
118 __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset); in icd_writeb()
120 static void icd_writew(u16 val, int offset, in icd_writew() argument
126 __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset); in icd_writew()
128 static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr) in icd_writel() argument
130 __raw_writel(val, &pcicptr->g2pcfgdata); in icd_writel()
140 int where, int size, u32 *val) in tx4927_pci_config_read()
145 *val = 0xffffffff; in tx4927_pci_config_read()
150 *val = icd_readb(where & 3, pcicptr); in tx4927_pci_config_read()
153 *val in tx4927_pci_config_read()
139 tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) tx4927_pci_config_read() argument
161 tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) tx4927_pci_config_write() argument
199 u8 val = 0; tx4927_pcibios_setup() local
205 u8 val = 0; tx4927_pcibios_setup() local
211 u16 val; tx4927_pcibios_setup() local
[all...] |
| /kernel/linux/linux-5.10/arch/powerpc/mm/ptdump/ |
| H A D | hashpagetable.c | 54 u64 val; member
64 .val = SLB_VSID_B_256M,
69 .val = HPTE_V_SECONDARY,
74 .val = HPTE_V_VALID,
79 .val = HPTE_V_BOLTED,
88 .val = PP_RWXX,
92 .val = PP_RWRX,
96 .val = PP_RWRW,
100 .val = PP_RXRX,
104 .val
161 u64 val; dump_flag_info() local
[all...] |
| /kernel/linux/linux-5.10/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 142 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
159 type val; \
161 : "=&r" (val) : "m" (*addr)); \
162 return val; \
166 static inline void store_##type(type *addr, type val) \
169 : : "r" (val), "m" (*addr)); \
195 static inline void store_u64(u64 *addr, u64 val)
197 store_u32((u32 *)addr, val);
198 store_u32((u32 *)addr + 1, val >> 3
205 ulong val, rvc_mask = 3, tmp; get_insn() local
242 union reg_data val; handle_misaligned_load() local
325 union reg_data val; handle_misaligned_store() local
[all...] |
| /kernel/linux/linux-5.10/drivers/net/ethernet/ibm/emac/ |
| H A D | phy.c | 40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument
42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write()
50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument
52 phy->mdio_write(phy->dev, phy->gpcs_address, reg, val); in gpcs_phy_write()
57 int val; in emac_mii_reset_phy() local
60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
61 val &= ~(BMCR_ISOLATE | BMCR_ANENABLE); in emac_mii_reset_phy()
62 val |= BMCR_RESET; in emac_mii_reset_phy()
63 phy_write(phy, MII_BMCR, val); in emac_mii_reset_phy()
68 val in emac_mii_reset_phy()
81 int val; emac_mii_reset_gpcs() local
[all...] |
| /kernel/linux/linux-6.6/arch/powerpc/mm/ptdump/ |
| H A D | hashpagetable.c | 54 u64 val; member
64 .val = SLB_VSID_B_256M,
69 .val = HPTE_V_SECONDARY,
74 .val = HPTE_V_VALID,
79 .val = HPTE_V_BOLTED,
88 .val = PP_RWXX,
92 .val = PP_RWRX,
96 .val = PP_RWRW,
100 .val = PP_RXRX,
104 .val
161 u64 val; dump_flag_info() local
[all...] |
| /kernel/linux/linux-6.6/arch/mips/pci/ |
| H A D | ops-tx4927.c | 112 static void icd_writeb(u8 val, int offset, in icd_writeb() argument
118 __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset); in icd_writeb()
120 static void icd_writew(u16 val, int offset, in icd_writew() argument
126 __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset); in icd_writew()
128 static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr) in icd_writel() argument
130 __raw_writel(val, &pcicptr->g2pcfgdata); in icd_writel()
140 int where, int size, u32 *val) in tx4927_pci_config_read()
145 *val = 0xffffffff; in tx4927_pci_config_read()
150 *val = icd_readb(where & 3, pcicptr); in tx4927_pci_config_read()
153 *val in tx4927_pci_config_read()
139 tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) tx4927_pci_config_read() argument
161 tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) tx4927_pci_config_write() argument
199 u8 val = 0; tx4927_pcibios_setup() local
205 u8 val = 0; tx4927_pcibios_setup() local
211 u16 val; tx4927_pcibios_setup() local
[all...] |
| /kernel/linux/linux-6.6/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 143 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
157 type val; \
159 : "=&r" (val) : "m" (*addr)); \
160 return val; \
164 static inline void store_##type(type *addr, type val) \
167 : : "r" (val), "m" (*addr)); \
193 static inline void store_u64(u64 *addr, u64 val)
195 store_u32((u32 *)addr, val);
196 store_u32((u32 *)addr + 1, val >> 3
203 ulong val, rvc_mask = 3, tmp; get_insn() local
240 union reg_data val; handle_misaligned_load() local
323 union reg_data val; handle_misaligned_store() local
[all...] |
| /kernel/linux/linux-5.10/drivers/media/platform/rockchip/rga/ |
| H A D | rga-hw.c | 189 src_info.val = dest[(RGA_SRC_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
190 dst_info.val = dest[(RGA_DST_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
191 x_factor.val = dest[(RGA_SRC_X_FACTOR - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
192 y_factor.val = dest[(RGA_SRC_Y_FACTOR - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
193 src_vir_info.val = dest[(RGA_SRC_VIR_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
194 src_act_info.val = dest[(RGA_SRC_ACT_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
195 dst_vir_info.val = dest[(RGA_DST_VIR_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
196 dst_act_info.val = dest[(RGA_DST_ACT_INFO - RGA_MODE_BASE_REG) >> 2]; in rga_cmd_set_trans_info()
277 x_factor.val = 0; in rga_cmd_set_trans_info()
290 y_factor.val in rga_cmd_set_trans_info()
[all...] |
| /kernel/linux/linux-5.10/drivers/iio/dac/ |
| H A D | ad5421.c | 135 unsigned int reg, unsigned int val) in ad5421_write_unlocked()
139 st->data[0].d32 = cpu_to_be32((reg << 16) | val); in ad5421_write_unlocked()
145 unsigned int val) in ad5421_write()
151 ret = ad5421_write_unlocked(indio_dev, reg, val); in ad5421_write()
315 struct iio_chan_spec const *chan, int *val, int *val2, long m) in ad5421_read_raw()
329 *val = ret; in ad5421_read_raw()
333 *val = max - min; in ad5421_read_raw()
337 *val = ad5421_get_offset(st); in ad5421_read_raw()
343 *val = ret - 32768; in ad5421_read_raw()
349 *val in ad5421_read_raw()
134 ad5421_write_unlocked(struct iio_dev *indio_dev, unsigned int reg, unsigned int val) ad5421_write_unlocked() argument
144 ad5421_write(struct iio_dev *indio_dev, unsigned int reg, unsigned int val) ad5421_write() argument
314 ad5421_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) ad5421_read_raw() argument
356 ad5421_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) ad5421_write_raw() argument
440 ad5421_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) ad5421_read_event_value() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| H A D | bcm_iproc_adc.c | 103 u32 val; \
104 regmap_read(priv->regmap, reg, &val); \
105 dev_dbg(dev, "%20s= 0x%08x\n", #reg, val); \
229 u32 val; in iproc_adc_do_read() local
252 val = (BIT(IPROC_ADC_CHANNEL_ROUNDS) | in iproc_adc_do_read()
260 mask, val); in iproc_adc_do_read()
274 regmap_read(adc_priv->regmap, IPROC_INTERRUPT_MASK, &val); in iproc_adc_do_read()
277 val |= (BIT(channel) << IPROC_ADC_INTR); in iproc_adc_do_read()
278 regmap_write(adc_priv->regmap, IPROC_INTERRUPT_MASK, val); in iproc_adc_do_read()
288 while (val_check != val) { in iproc_adc_do_read()
354 u32 val; iproc_adc_enable() local
432 u32 val; iproc_adc_disable() local
452 iproc_adc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) iproc_adc_read_raw() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt7601u/ |
| H A D | usb.c | 89 const u8 direction, const u16 val, const u16 offset, in mt7601u_vendor_request()
100 val, offset, buf, buflen, in mt7601u_vendor_request()
102 trace_mt_vend_req(dev, pipe, req, req_type, val, offset, in mt7601u_vendor_request()
129 u32 val = ~0; in __mt7601u_rr() local
136 val = get_unaligned_le32(dev->vend_buf); in __mt7601u_rr()
141 trace_reg_read(dev, offset, val); in __mt7601u_rr()
142 return val; in __mt7601u_rr()
158 const u16 offset, const u32 val) in __mt7601u_vendor_single_wr()
161 val & 0xffff, offset, NULL, 0); in __mt7601u_vendor_single_wr()
164 val >> 1 in __mt7601u_vendor_single_wr()
88 mt7601u_vendor_request(struct mt7601u_dev *dev, const u8 req, const u8 direction, const u16 val, const u16 offset, void *buf, const size_t buflen) mt7601u_vendor_request() argument
157 __mt7601u_vendor_single_wr(struct mt7601u_dev *dev, const u8 req, const u16 offset, const u32 val) __mt7601u_vendor_single_wr() argument
169 mt7601u_vendor_single_wr(struct mt7601u_dev *dev, const u8 req, const u16 offset, const u32 val) mt7601u_vendor_single_wr() argument
181 mt7601u_wr(struct mt7601u_dev *dev, u32 offset, u32 val) mt7601u_wr() argument
188 mt7601u_rmw(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val) mt7601u_rmw() argument
198 mt7601u_rmc(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val) mt7601u_rmc() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/net/ethernet/ti/ |
| H A D | am65-cpsw-qos.c | 63 u32 val; in am65_cpsw_est_enable() local
65 val = readl(common->cpsw_base + AM65_CPSW_REG_CTL); in am65_cpsw_est_enable()
68 val |= AM65_CPSW_CTL_EST_EN; in am65_cpsw_est_enable()
70 val &= ~AM65_CPSW_CTL_EST_EN; in am65_cpsw_est_enable()
72 writel(val, common->cpsw_base + AM65_CPSW_REG_CTL); in am65_cpsw_est_enable()
78 u32 val; in am65_cpsw_port_est_enable() local
80 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_est_enable()
82 val |= AM65_CPSW_PN_CTL_EST_PORT_EN; in am65_cpsw_port_est_enable()
84 val &= ~AM65_CPSW_PN_CTL_EST_PORT_EN; in am65_cpsw_port_est_enable()
86 writel(val, por in am65_cpsw_port_est_enable()
94 u32 val; am65_cpsw_port_est_assign_buf_num() local
118 u32 val; am65_cpsw_port_est_is_swapped() local
178 u32 val; am65_cpsw_port_est_get_buf_num() local
[all...] |
| /kernel/linux/linux-5.10/sound/soc/tegra/ |
| H A D | tegra30_i2s.c | 69 unsigned int mask = 0, val = 0; in tegra30_i2s_set_fmt() local
81 val |= TEGRA30_I2S_CTRL_MASTER_ENABLE; in tegra30_i2s_set_fmt()
93 val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC; in tegra30_i2s_set_fmt()
94 val |= TEGRA30_I2S_CTRL_LRCK_L_LOW; in tegra30_i2s_set_fmt()
97 val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC; in tegra30_i2s_set_fmt()
98 val |= TEGRA30_I2S_CTRL_LRCK_R_LOW; in tegra30_i2s_set_fmt()
101 val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_LRCK; in tegra30_i2s_set_fmt()
102 val |= TEGRA30_I2S_CTRL_LRCK_L_LOW; in tegra30_i2s_set_fmt()
105 val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_LRCK; in tegra30_i2s_set_fmt()
106 val | in tegra30_i2s_set_fmt()
129 unsigned int mask, val, reg; tegra30_i2s_hw_params() local
262 unsigned int mask, val; tegra30_i2s_set_tdm() local
[all...] |
| /kernel/linux/linux-5.10/drivers/mfd/ |
| H A D | lm3533-core.c | 83 int lm3533_read(struct lm3533 *lm3533, u8 reg, u8 *val) in lm3533_read() argument
95 *val = tmp; in lm3533_read()
97 dev_dbg(lm3533->dev, "read [%02x]: %02x\n", reg, *val); in lm3533_read()
103 int lm3533_write(struct lm3533 *lm3533, u8 reg, u8 val) in lm3533_write() argument
107 dev_dbg(lm3533->dev, "write [%02x]: %02x\n", reg, val); in lm3533_write()
109 ret = regmap_write(lm3533->regmap, reg, val); in lm3533_write()
119 int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask) in lm3533_update() argument
123 dev_dbg(lm3533->dev, "update [%02x]: %02x/%02x\n", reg, val, mask); in lm3533_update()
125 ret = regmap_update_bits(lm3533->regmap, reg, mask, val); in lm3533_update()
169 u8 val; in lm3533_set_hvled_config() local
197 u8 val; lm3533_set_lvled_config() local
263 u8 val; show_output() local
299 u8 val; store_output() local
[all...] |
| /kernel/linux/linux-5.10/drivers/pwm/ |
| H A D | pwm-img.c | 81 u32 reg, u32 val) in img_pwm_writel()
83 writel(val, chip->base + reg); in img_pwm_writel()
95 u32 val, div, duty, timebase; in img_pwm_config() local
137 val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG); in img_pwm_config()
138 val &= ~(PWM_CTRL_CFG_DIV_MASK << PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm)); in img_pwm_config()
139 val |= (div & PWM_CTRL_CFG_DIV_MASK) << in img_pwm_config()
141 img_pwm_writel(pwm_chip, PWM_CTRL_CFG, val); in img_pwm_config()
143 val = (duty << PWM_CH_CFG_DUTY_SHIFT) | in img_pwm_config()
145 img_pwm_writel(pwm_chip, PWM_CH_CFG(pwm->hwpwm), val); in img_pwm_config()
155 u32 val; in img_pwm_enable() local
80 img_pwm_writel(struct img_pwm_chip *chip, u32 reg, u32 val) img_pwm_writel() argument
176 u32 val; img_pwm_disable() local
241 u64 val; img_pwm_probe() local
[all...] |
| /kernel/linux/linux-5.10/drivers/rtc/ |
| H A D | rtc-m48t59.c | 26 #define M48T59_WRITE(val, reg) \
27 (pdata->write_byte(dev, pdata->offset + reg, val))
45 m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) in m48t59_mem_writeb() argument
49 writeb(val, m48t59->ioaddr+ofs); in m48t59_mem_writeb()
68 u8 val; in m48t59_rtc_read_time() local
79 val = M48T59_READ(M48T59_WDAY); in m48t59_rtc_read_time()
81 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { in m48t59_rtc_read_time()
90 tm->tm_wday = bcd2bin(val & 0x07); in m48t59_rtc_read_time()
108 u8 val in m48t59_rtc_set_time() local
155 u8 val; m48t59_rtc_readalarm() local
274 u8 val; m48t59_rtc_proc() local
321 m48t59_nvram_read(void *priv, unsigned int offset, void *val, size_t size) m48t59_nvram_read() argument
342 m48t59_nvram_write(void *priv, unsigned int offset, void *val, size_t size) m48t59_nvram_write() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/mfd/ |
| H A D | lm3533-core.c | 83 int lm3533_read(struct lm3533 *lm3533, u8 reg, u8 *val) in lm3533_read() argument
95 *val = tmp; in lm3533_read()
97 dev_dbg(lm3533->dev, "read [%02x]: %02x\n", reg, *val); in lm3533_read()
103 int lm3533_write(struct lm3533 *lm3533, u8 reg, u8 val) in lm3533_write() argument
107 dev_dbg(lm3533->dev, "write [%02x]: %02x\n", reg, val); in lm3533_write()
109 ret = regmap_write(lm3533->regmap, reg, val); in lm3533_write()
119 int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask) in lm3533_update() argument
123 dev_dbg(lm3533->dev, "update [%02x]: %02x/%02x\n", reg, val, mask); in lm3533_update()
125 ret = regmap_update_bits(lm3533->regmap, reg, mask, val); in lm3533_update()
169 u8 val; in lm3533_set_hvled_config() local
197 u8 val; lm3533_set_lvled_config() local
263 u8 val; show_output() local
299 u8 val; store_output() local
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_switchdev.c | 44 u32 val = lan_rd(port->lan966x, ANA_PGID(PGID_MC)); in lan966x_port_set_mcast_flood() local
46 val = ANA_PGID_PGID_GET(val); in lan966x_port_set_mcast_flood()
48 val |= BIT(port->chip_port); in lan966x_port_set_mcast_flood()
50 val &= ~BIT(port->chip_port); in lan966x_port_set_mcast_flood()
52 lan_rmw(ANA_PGID_PGID_SET(val), in lan966x_port_set_mcast_flood()
65 u32 val = lan_rd(port->lan966x, ANA_PGID(PGID_UC)); in lan966x_port_set_ucast_flood() local
67 val = ANA_PGID_PGID_GET(val); in lan966x_port_set_ucast_flood()
69 val | in lan966x_port_set_ucast_flood()
81 u32 val = lan_rd(port->lan966x, ANA_PGID(PGID_BC)); lan966x_port_set_bcast_flood() local
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/ibm/emac/ |
| H A D | phy.c | 40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument
42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write()
50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument
52 phy->mdio_write(phy->dev, phy->gpcs_address, reg, val); in gpcs_phy_write()
57 int val; in emac_mii_reset_phy() local
60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
61 val &= ~(BMCR_ISOLATE | BMCR_ANENABLE); in emac_mii_reset_phy()
62 val |= BMCR_RESET; in emac_mii_reset_phy()
63 phy_write(phy, MII_BMCR, val); in emac_mii_reset_phy()
68 val in emac_mii_reset_phy()
81 int val; emac_mii_reset_gpcs() local
[all...] |
| /kernel/linux/linux-6.6/drivers/rtc/ |
| H A D | rtc-m48t59.c | 26 #define M48T59_WRITE(val, reg) \
27 (pdata->write_byte(dev, pdata->offset + reg, val))
45 m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) in m48t59_mem_writeb() argument
49 writeb(val, m48t59->ioaddr+ofs); in m48t59_mem_writeb()
68 u8 val; in m48t59_rtc_read_time() local
79 val = M48T59_READ(M48T59_WDAY); in m48t59_rtc_read_time()
81 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { in m48t59_rtc_read_time()
90 tm->tm_wday = bcd2bin(val & 0x07); in m48t59_rtc_read_time()
108 u8 val in m48t59_rtc_set_time() local
155 u8 val; m48t59_rtc_readalarm() local
274 u8 val; m48t59_rtc_proc() local
316 m48t59_nvram_read(void *priv, unsigned int offset, void *val, size_t size) m48t59_nvram_read() argument
337 m48t59_nvram_write(void *priv, unsigned int offset, void *val, size_t size) m48t59_nvram_write() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/soc/qcom/ |
| H A D | smsm.c | 147 u32 val; in smsm_update_bits() local
152 val = orig = readl(smsm->local_state); in smsm_update_bits()
153 val &= ~mask; in smsm_update_bits()
154 val |= value; in smsm_update_bits()
157 changes = val ^ orig; in smsm_update_bits()
164 writel(val, smsm->local_state); in smsm_update_bits()
174 val = readl(smsm->subscription + host); in smsm_update_bits()
175 if (val & changes && hostp->ipc_regmap) { in smsm_update_bits()
204 u32 val; in smsm_intr() local
206 val in smsm_intr()
241 u32 val; smsm_mask_irq() local
264 u32 val; smsm_unmask_irq() local
312 u32 val; smsm_get_irqchip_state() local
[all...] |
| /kernel/linux/linux-6.6/drivers/spi/ |
| H A D | spi-omap-uwire.c | 105 static inline void uwire_write_reg(int idx, u16 val) in uwire_write_reg() argument
107 __raw_writew(val, uwire_base + (idx << uwire_idx_shift)); in uwire_write_reg()
117 u16 w, val = 0; in omap_uwire_configure_mode() local
121 val ^= 0x03; in omap_uwire_configure_mode()
122 val = flags & 0x3f; in omap_uwire_configure_mode()
134 w |= val << shift; in omap_uwire_configure_mode()
138 static int wait_uwire_csr_flag(u16 mask, u16 val, int might_not_catch) in wait_uwire_csr_flag() argument
146 if ((w & mask) == val) in wait_uwire_csr_flag()
150 "mask=%#06x val=%#06x\n", in wait_uwire_csr_flag()
151 __func__, w, mask, val); in wait_uwire_csr_flag()
207 u16 val, w; uwire_txrx() local
[all...] |