| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_spill.c | 166 /* We don't create an interval, etc. for the base reg, so just lower the in add_base_reg()
335 can_rematerialize(struct ir3_register *reg) in can_rematerialize() argument
337 if (reg->flags & IR3_REG_ARRAY) in can_rematerialize()
339 if (reg->instr->opc != OPC_MOV) in can_rematerialize()
341 if (!(reg->instr->srcs[0]->flags & (IR3_REG_IMMED | IR3_REG_CONST))) in can_rematerialize()
343 if (reg->instr->srcs[0]->flags & IR3_REG_RELATIV) in can_rematerialize()
349 rematerialize(struct ir3_register *reg, struct ir3_instruction *after, in rematerialize() argument
352 d("rematerializing ssa_%u:%u", reg->instr->serialno, reg->name); in rematerialize()
355 ir3_instr_create(block, reg in rematerialize()
378 ra_spill_interval_init(struct ra_spill_interval *interval, struct ir3_register *reg) ra_spill_interval_init() argument
671 get_spill_slot(struct ra_spill_ctx *ctx, struct ir3_register *reg) get_spill_slot() argument
728 struct ir3_register *reg; spill() local
899 reload(struct ra_spill_ctx *ctx, struct ir3_register *reg, struct ir3_instruction *after, struct ir3_block *block) reload() argument
1122 struct ir3_register *reg = rzalloc(ctx, struct ir3_register); create_temp_interval() local
1612 struct ir3_register *reg = ctx->live->definitions[name]; spill_single_pred_live_in() local
1690 struct ir3_register *reg = ctx->live->definitions[name]; reload_live_outs() local
1799 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
1824 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
[all...] |
| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/mtrr/ |
| H A D | cyrix.c | 14 cyrix_get_arr(unsigned int reg, unsigned long *base, in cyrix_get_arr() argument
20 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */ in cyrix_get_arr()
29 rcr = getCx86(CX86_RCR_BASE + reg); in cyrix_get_arr()
42 *size = (reg < 7 ? 0x1UL : 0x40UL) << (shift - 1); in cyrix_get_arr()
47 if (reg < 7) { in cyrix_get_arr()
179 static void cyrix_set_arr(unsigned int reg, unsigned long base, in cyrix_set_arr() argument
184 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */ in cyrix_set_arr()
187 if (reg > in cyrix_set_arr()
[all...] |
| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-divider.c | 39 u32 reg; in clk_frac_div_recalc_rate() local
43 reg = readl_relaxed(divider->reg); in clk_frac_div_recalc_rate()
46 !(reg & PERIPH_CLK_UART_DIV_ENB)) in clk_frac_div_recalc_rate()
49 div = (reg >> divider->shift) & div_mask(divider); in clk_frac_div_recalc_rate()
95 val = readl_relaxed(divider->reg); in clk_frac_div_set_rate()
109 writel_relaxed(val, divider->reg); in clk_frac_div_set_rate()
135 const char *parent_name, void __iomem *reg, in tegra_clk_register_divider()
156 divider->reg = reg; in tegra_clk_register_divider()
134 tegra_clk_register_divider(const char *name, const char *parent_name, void __iomem *reg, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock) tegra_clk_register_divider() argument
179 tegra_clk_register_mc(const char *name, const char *parent_name, void __iomem *reg, spinlock_t *lock) tegra_clk_register_mc() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpio/ |
| H A D | gpio-ts4900.c | 43 unsigned int reg; in ts4900_gpio_get_direction() local
45 regmap_read(priv->regmap, offset, ®); in ts4900_gpio_get_direction()
47 if (reg & TS4900_GPIO_OE) in ts4900_gpio_get_direction()
68 unsigned int reg; in ts4900_gpio_direction_output() local
75 regmap_read(priv->regmap, offset, ®); in ts4900_gpio_direction_output()
76 if (!(reg & TS4900_GPIO_OE)) { in ts4900_gpio_direction_output()
78 reg = TS4900_GPIO_OUT; in ts4900_gpio_direction_output()
80 reg &= ~TS4900_GPIO_OUT; in ts4900_gpio_direction_output()
82 regmap_write(priv->regmap, offset, reg); in ts4900_gpio_direction_output()
97 unsigned int reg; in ts4900_gpio_get() local
[all...] |
| H A D | gpio-adnp.c | 68 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_get() local
73 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &value); in adnp_gpio_get()
82 unsigned int reg = offset >> adnp->reg_shift; in __adnp_gpio_set() local
87 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &val); in __adnp_gpio_set()
96 adnp_write(adnp, GPIO_PLR(adnp) + reg, val); in __adnp_gpio_set()
111 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_input() local
118 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value); in adnp_gpio_direction_input()
124 err = adnp_write(adnp, GPIO_DDR(adnp) + reg, value); in adnp_gpio_direction_input()
128 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value); in adnp_gpio_direction_input()
148 unsigned int reg in adnp_gpio_direction_output() local
305 unsigned int reg = d->hwirq >> adnp->reg_shift; adnp_irq_mask() local
315 unsigned int reg = d->hwirq >> adnp->reg_shift; adnp_irq_unmask() local
325 unsigned int reg = d->hwirq >> adnp->reg_shift; adnp_irq_set_type() local
[all...] |
| /kernel/linux/linux-6.6/arch/arc/include/asm/ |
| H A D | entry-compact.h | 121 * For early Exception/ISR Prologue, a core reg is temporarily needed to
125 * Before saving the full regfile - this reg is restored back, only
128 .macro PROLOG_FREEUP_REG reg, mem
129 st \reg, [\mem] variable
132 .macro PROLOG_RESTORE_REG reg, mem
133 ld \reg, [\mem] variable
145 /* Need at least 1 reg to code the early exception prologue */
199 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
267 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
291 .macro GET_CURR_THR_INFO_FROM_SP reg
298 lsr \\reg, \\reg, 8 global() variable
299 bmsk \\reg, \\reg, 7 global() variable
[all...] |
| /kernel/linux/linux-5.10/sound/pci/hda/ |
| H A D | hda_controller.h | 37 #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
172 #define azx_writel(chip, reg, value) \
173 snd_hdac_chip_writel(azx_bus(chip), reg, value)
174 #define azx_readl(chip, reg) \
175 snd_hdac_chip_readl(azx_bus(chip), reg)
176 #define azx_writew(chip, reg, value) \
177 snd_hdac_chip_writew(azx_bus(chip), reg, value)
178 #define azx_readw(chip, reg) \
179 snd_hdac_chip_readw(azx_bus(chip), reg)
180 #define azx_writeb(chip, reg, valu
[all...] |
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
| H A D | sp_private.h | 27 const hrt_address reg, in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
38 const hrt_address reg)
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
47 const hrt_address reg,
50 hrt_data val = sp_ctrl_load(ID, reg);
57 const hrt_address reg,
60 hrt_data data = sp_ctrl_load(ID, reg);
62 sp_ctrl_store(ID, reg, (data | (1UL << bit)));
68 const hrt_address reg,
25 sp_ctrl_store( const sp_ID_t ID, const hrt_address reg, const hrt_data value) sp_ctrl_store() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
| H A D | sp_private.h | 27 const hrt_address reg, in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
38 const hrt_address reg)
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
47 const hrt_address reg,
50 hrt_data val = sp_ctrl_load(ID, reg);
57 const hrt_address reg,
60 hrt_data data = sp_ctrl_load(ID, reg);
62 sp_ctrl_store(ID, reg, (data | (1UL << bit)));
68 const hrt_address reg,
25 sp_ctrl_store( const sp_ID_t ID, const hrt_address reg, const hrt_data value) sp_ctrl_store() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/pwm/ |
| H A D | pwm-sl28cpld.c | 73 #define SL28CPLD_PWM_TO_DUTY_CYCLE(reg) \
74 (NSEC_PER_SEC / SL28CPLD_PWM_CLK * (reg))
78 #define sl28cpld_pwm_read(priv, reg, val) \
79 regmap_read((priv)->regmap, (priv)->offset + (reg), (val))
80 #define sl28cpld_pwm_write(priv, reg, val) \
81 regmap_write((priv)->regmap, (priv)->offset + (reg), (val))
99 unsigned int reg; in sl28cpld_pwm_get_state() local
102 sl28cpld_pwm_read(priv, SL28CPLD_PWM_CTRL, ®); in sl28cpld_pwm_get_state()
104 state->enabled = reg & SL28CPLD_PWM_CTRL_ENABLE; in sl28cpld_pwm_get_state()
106 prescaler = FIELD_GET(SL28CPLD_PWM_CTRL_PRESCALER_MASK, reg); in sl28cpld_pwm_get_state()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpio/ |
| H A D | gpio-ts4900.c | 35 unsigned int reg; in ts4900_gpio_get_direction() local
37 regmap_read(priv->regmap, offset, ®); in ts4900_gpio_get_direction()
39 if (reg & TS4900_GPIO_OE) in ts4900_gpio_get_direction()
61 unsigned int reg; in ts4900_gpio_direction_output() local
69 regmap_read(priv->regmap, offset, ®); in ts4900_gpio_direction_output()
70 if (!(reg & TS4900_GPIO_OE)) { in ts4900_gpio_direction_output()
72 reg = TS4900_GPIO_OUT; in ts4900_gpio_direction_output()
74 reg &= ~TS4900_GPIO_OUT; in ts4900_gpio_direction_output()
76 regmap_write(priv->regmap, offset, reg); in ts4900_gpio_direction_output()
91 unsigned int reg; in ts4900_gpio_get() local
[all...] |
| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| H A D | clk-divider.c | 39 u32 reg; in clk_frac_div_recalc_rate() local
43 reg = readl_relaxed(divider->reg); in clk_frac_div_recalc_rate()
46 !(reg & PERIPH_CLK_UART_DIV_ENB)) in clk_frac_div_recalc_rate()
49 div = (reg >> divider->shift) & div_mask(divider); in clk_frac_div_recalc_rate()
95 val = readl_relaxed(divider->reg); in clk_frac_div_set_rate()
109 writel_relaxed(val, divider->reg); in clk_frac_div_set_rate()
135 const char *parent_name, void __iomem *reg, in tegra_clk_register_divider()
156 divider->reg = reg; in tegra_clk_register_divider()
134 tegra_clk_register_divider(const char *name, const char *parent_name, void __iomem *reg, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock) tegra_clk_register_divider() argument
179 tegra_clk_register_mc(const char *name, const char *parent_name, void __iomem *reg, spinlock_t *lock) tegra_clk_register_mc() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/net/phy/ |
| H A D | bcm-phy-lib.h | 33 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
34 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
35 int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
36 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
37 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
38 int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
41 u16 reg, u16 val) in bcm_phy_write_exp_sel()
43 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); in bcm_phy_write_exp_sel()
46 static inline int bcm_phy_read_exp_sel(struct phy_device *phydev, u16 reg) in bcm_phy_read_exp_sel() argument
48 return bcm_phy_read_exp(phydev, reg | MII_BCM54XX_EXP_SEL_E in bcm_phy_read_exp_sel()
40 bcm_phy_write_exp_sel(struct phy_device *phydev, u16 reg, u16 val) bcm_phy_write_exp_sel() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/ |
| H A D | arm-smmu-impl.c | 112 u32 reg, major; in arm_mmu500_reset() local
119 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID7); in arm_mmu500_reset()
120 major = FIELD_GET(ARM_SMMU_ID7_MAJOR, reg); in arm_mmu500_reset()
121 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sACR); in arm_mmu500_reset()
123 reg &= ~ARM_MMU500_ACR_CACHE_LOCK; in arm_mmu500_reset()
128 reg |= ARM_MMU500_ACR_SMTNMB_TLBEN | ARM_MMU500_ACR_S2CRB_TLBEN; in arm_mmu500_reset()
129 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sACR, reg); in arm_mmu500_reset()
136 reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR); in arm_mmu500_reset()
137 reg &= ~ARM_MMU500_ACTLR_CPRE; in arm_mmu500_reset()
138 arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg); in arm_mmu500_reset()
[all...] |
| /kernel/linux/linux-6.6/sound/pci/hda/ |
| H A D | hda_controller.h | 37 #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
166 #define azx_writel(chip, reg, value) \
167 snd_hdac_chip_writel(azx_bus(chip), reg, value)
168 #define azx_readl(chip, reg) \
169 snd_hdac_chip_readl(azx_bus(chip), reg)
170 #define azx_writew(chip, reg, value) \
171 snd_hdac_chip_writew(azx_bus(chip), reg, value)
172 #define azx_readw(chip, reg) \
173 snd_hdac_chip_readw(azx_bus(chip), reg)
174 #define azx_writeb(chip, reg, valu
[all...] |
| /third_party/backends/sanei/ |
| H A D | sanei_lm983x.c | 81 sanei_lm983x_write_byte( SANE_Int fd, SANE_Byte reg, SANE_Byte value ) in sanei_lm983x_write_byte() argument
83 return sanei_lm983x_write( fd, reg, &value, 1, SANE_FALSE ); in sanei_lm983x_write_byte()
87 sanei_lm983x_write( SANE_Int fd, SANE_Byte reg, in sanei_lm983x_write() argument
95 DBG( 15, "sanei_lm983x_write: fd=%d, reg=%d, len=%d, increment=%d\n", fd, in sanei_lm983x_write()
96 reg, len, increment); in sanei_lm983x_write()
98 if( reg > _LM9831_MAX_REG ) { in sanei_lm983x_write()
100 reg, _LM9831_MAX_REG ); in sanei_lm983x_write()
109 command_buffer[1] = reg; /* LM983x register */ in sanei_lm983x_write()
112 command_buffer[0] += 0x02; /* increase reg? */ in sanei_lm983x_write()
145 sanei_lm983x_read( SANE_Int fd, SANE_Byte reg, in sanei_lm983x_read() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_ipsec.c | 24 u32 reg; in ixgbe_ipsec_set_tx_sa() local
33 reg = IXGBE_READ_REG(hw, IXGBE_IPSTXIDX); in ixgbe_ipsec_set_tx_sa()
34 reg &= IXGBE_RXTXIDX_IPS_EN; in ixgbe_ipsec_set_tx_sa()
35 reg |= idx << IXGBE_RXTXIDX_IDX_SHIFT | IXGBE_RXTXIDX_WRITE; in ixgbe_ipsec_set_tx_sa()
36 IXGBE_WRITE_REG(hw, IXGBE_IPSTXIDX, reg); in ixgbe_ipsec_set_tx_sa()
52 u32 reg; in ixgbe_ipsec_set_rx_item() local
54 reg = IXGBE_READ_REG(hw, IXGBE_IPSRXIDX); in ixgbe_ipsec_set_rx_item()
55 reg &= IXGBE_RXTXIDX_IPS_EN; in ixgbe_ipsec_set_rx_item()
56 reg |= tbl << IXGBE_RXIDX_TBL_SHIFT | in ixgbe_ipsec_set_rx_item()
59 IXGBE_WRITE_REG(hw, IXGBE_IPSRXIDX, reg); in ixgbe_ipsec_set_rx_item()
152 u32 reg; ixgbe_ipsec_stop_data() local
222 u32 reg; ixgbe_ipsec_stop_engine() local
264 u32 reg; ixgbe_ipsec_start_engine() local
483 u32 mfval, manc, reg; ixgbe_ipsec_check_mgmt_ip() local
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_ipsec.c | 24 u32 reg; in ixgbe_ipsec_set_tx_sa() local
33 reg = IXGBE_READ_REG(hw, IXGBE_IPSTXIDX); in ixgbe_ipsec_set_tx_sa()
34 reg &= IXGBE_RXTXIDX_IPS_EN; in ixgbe_ipsec_set_tx_sa()
35 reg |= idx << IXGBE_RXTXIDX_IDX_SHIFT | IXGBE_RXTXIDX_WRITE; in ixgbe_ipsec_set_tx_sa()
36 IXGBE_WRITE_REG(hw, IXGBE_IPSTXIDX, reg); in ixgbe_ipsec_set_tx_sa()
52 u32 reg; in ixgbe_ipsec_set_rx_item() local
54 reg = IXGBE_READ_REG(hw, IXGBE_IPSRXIDX); in ixgbe_ipsec_set_rx_item()
55 reg &= IXGBE_RXTXIDX_IPS_EN; in ixgbe_ipsec_set_rx_item()
56 reg |= tbl << IXGBE_RXIDX_TBL_SHIFT | in ixgbe_ipsec_set_rx_item()
59 IXGBE_WRITE_REG(hw, IXGBE_IPSRXIDX, reg); in ixgbe_ipsec_set_rx_item()
152 u32 reg; ixgbe_ipsec_stop_data() local
222 u32 reg; ixgbe_ipsec_stop_engine() local
264 u32 reg; ixgbe_ipsec_start_engine() local
483 u32 mfval, manc, reg; ixgbe_ipsec_check_mgmt_ip() local
[all...] |
| /kernel/linux/linux-6.6/drivers/media/pci/zoran/ |
| H A D | zr36060.c | 41 static u8 zr36060_read(struct zr36060 *ptr, u16 reg) in zr36060_read() argument
48 value = (ptr->codec->master_data->readreg(ptr->codec, reg)) & 0xff; in zr36060_read()
55 static void zr36060_write(struct zr36060 *ptr, u16 reg, u8 value) in zr36060_write() argument
59 zrdev_dbg(zr, "0x%02x @0x%04x\n", value, reg); in zr36060_write()
63 ptr->codec->master_data->writereg(ptr->codec, reg, value); in zr36060_write()
488 u32 reg; in zr36060_set_video() local
508 reg = (!pol->vsync_pol ? ZR060_VPR_VS_POL : 0) in zr36060_set_video()
516 zr36060_write(ptr, ZR060_VPR, reg); in zr36060_set_video()
518 reg = 0; in zr36060_set_video()
525 reg | in zr36060_set_video()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/phy/mscc/ |
| H A D | mscc_main.c | 26 .reg = MSCC_PHY_ERR_RX_CNT,
31 .reg = MSCC_PHY_ERR_FALSE_CARRIER_CNT,
36 .reg = MSCC_PHY_ERR_LINK_DISCONNECT_CNT,
41 .reg = MSCC_PHY_CU_MEDIA_CRC_VALID_CNT,
46 .reg = MSCC_PHY_EXT_PHY_CNTL_4,
55 .reg = MSCC_PHY_ERR_RX_CNT,
60 .reg = MSCC_PHY_ERR_FALSE_CARRIER_CNT,
65 .reg = MSCC_PHY_ERR_LINK_DISCONNECT_CNT,
70 .reg = MSCC_PHY_CU_MEDIA_CRC_VALID_CNT,
75 .reg
728 vsc85xx_csr_read(struct phy_device *phydev, enum csr_target target, u32 reg) vsc85xx_csr_read() argument
782 vsc85xx_csr_write(struct phy_device *phydev, enum csr_target target, u32 reg, u32 val) vsc85xx_csr_write() argument
909 u16 reg; vsc8584_micro_assert_reset() local
1015 u16 reg; vsc8574_is_serdes_init() local
1123 u16 crc, reg; vsc8574_config_pre_init() local
1377 u16 crc, reg; vsc8584_config_pre_init() local
1870 __phy_write_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb, u32 op) __phy_write_mcb_s6g() argument
1899 phy_update_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) phy_update_mcb_s6g() argument
1905 phy_commit_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) phy_commit_mcb_s6g() argument
1994 u16 reg; vsc8514_config_pre_init() local
[all...] |
| /kernel/linux/linux-5.10/arch/c6x/platforms/ |
| H A D | dscr.c | 42 u32 reg; member
51 u32 reg; /* offset from base */ member
64 u32 reg; /* register holding the control bits */ member
83 u32 reg; /* register holding the status bits */ member
116 static struct locked_reg *find_locked_reg(u32 reg) in find_locked_reg() argument
121 if (dscr.locked[i].key && reg == dscr.locked[i].reg) in find_locked_reg()
129 static void dscr_write_locked1(u32 reg, u32 val, in dscr_write_locked1() argument
132 void __iomem *reg_addr = dscr.base + reg; in dscr_write_locked1()
158 static void dscr_write_locked2(u32 reg, u3 argument
169 dscr_write(u32 reg, u32 val) dscr_write() argument
[all...] |
| /kernel/linux/linux-5.10/arch/s390/kvm/ |
| H A D | sigp.c | 21 u64 *reg) in __sigp_sense()
31 *reg &= 0xffffffff00000000UL; in __sigp_sense()
33 *reg |= SIGP_STATUS_EXT_CALL_PENDING; in __sigp_sense()
35 *reg |= SIGP_STATUS_STOPPED; in __sigp_sense()
68 u16 asn, u64 *reg) in __sigp_conditional_emergency()
87 *reg &= 0xffffffff00000000UL; in __sigp_conditional_emergency()
88 *reg |= SIGP_STATUS_INCORRECT_STATE; in __sigp_conditional_emergency()
94 struct kvm_vcpu *dst_vcpu, u64 *reg) in __sigp_external_call()
104 *reg &= 0xffffffff00000000UL; in __sigp_external_call()
105 *reg | in __sigp_external_call()
20 __sigp_sense(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u64 *reg) __sigp_sense() argument
66 __sigp_conditional_emergency(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u16 asn, u64 *reg) __sigp_conditional_emergency() argument
93 __sigp_external_call(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u64 *reg) __sigp_external_call() argument
132 __sigp_stop_and_store_status(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u64 *reg) __sigp_stop_and_store_status() argument
173 __sigp_set_prefix(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u32 address, u64 *reg) __sigp_set_prefix() argument
203 __sigp_store_status_at_addr(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u32 addr, u64 *reg) __sigp_store_status_at_addr() argument
225 __sigp_sense_running(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, u64 *reg) __sigp_sense_running() argument
[all...] |
| /kernel/linux/linux-5.10/arch/arm/mach-imx/ |
| H A D | mmdc.c | 186 void __iomem *mmdc_base, *reg; in mmdc_pmu_read_counter() local
192 reg = mmdc_base + MMDC_MADPSR0; in mmdc_pmu_read_counter()
195 reg = mmdc_base + MMDC_MADPSR1; in mmdc_pmu_read_counter()
198 reg = mmdc_base + MMDC_MADPSR2; in mmdc_pmu_read_counter()
201 reg = mmdc_base + MMDC_MADPSR3; in mmdc_pmu_read_counter()
204 reg = mmdc_base + MMDC_MADPSR4; in mmdc_pmu_read_counter()
207 reg = mmdc_base + MMDC_MADPSR5; in mmdc_pmu_read_counter()
213 return readl(reg); in mmdc_pmu_read_counter()
328 void __iomem *mmdc_base, *reg; in mmdc_pmu_event_start() local
332 reg in mmdc_pmu_event_start()
384 void __iomem *mmdc_base, *reg; mmdc_pmu_event_stop() local
548 void __iomem *mmdc_base, *reg; imx_mmdc_probe() local
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| H A D | clk.c | 48 static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg) in clk_memmap_writel() argument
50 struct clk_iomap *io = clk_memmaps[reg->index]; in clk_memmap_writel()
52 if (reg->ptr) in clk_memmap_writel()
53 writel_relaxed(val, reg->ptr); in clk_memmap_writel()
55 regmap_write(io->regmap, reg->offset, val); in clk_memmap_writel()
57 writel_relaxed(val, io->mem + reg->offset); in clk_memmap_writel()
70 static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg) in clk_memmap_rmw() argument
72 struct clk_iomap *io = clk_memmaps[reg->index]; in clk_memmap_rmw()
74 if (reg->ptr) { in clk_memmap_rmw()
75 _clk_rmw(val, mask, reg in clk_memmap_rmw()
83 clk_memmap_readl(const struct clk_omap_reg *reg) clk_memmap_readl() argument
268 ti_clk_get_reg_addr(struct device_node *node, int index, struct clk_omap_reg *reg) ti_clk_get_reg_addr() argument
297 ti_clk_latch(struct clk_omap_reg *reg, s8 shift) ti_clk_latch() argument
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| /kernel/linux/linux-6.6/arch/arm/mach-imx/ |
| H A D | mmdc.c | 186 void __iomem *mmdc_base, *reg; in mmdc_pmu_read_counter() local
192 reg = mmdc_base + MMDC_MADPSR0; in mmdc_pmu_read_counter()
195 reg = mmdc_base + MMDC_MADPSR1; in mmdc_pmu_read_counter()
198 reg = mmdc_base + MMDC_MADPSR2; in mmdc_pmu_read_counter()
201 reg = mmdc_base + MMDC_MADPSR3; in mmdc_pmu_read_counter()
204 reg = mmdc_base + MMDC_MADPSR4; in mmdc_pmu_read_counter()
207 reg = mmdc_base + MMDC_MADPSR5; in mmdc_pmu_read_counter()
213 return readl(reg); in mmdc_pmu_read_counter()
328 void __iomem *mmdc_base, *reg; in mmdc_pmu_event_start() local
332 reg in mmdc_pmu_event_start()
384 void __iomem *mmdc_base, *reg; mmdc_pmu_event_stop() local
547 void __iomem *mmdc_base, *reg; imx_mmdc_probe() local
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