Lines Matching refs:reg
37 #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
172 #define azx_writel(chip, reg, value) \
173 snd_hdac_chip_writel(azx_bus(chip), reg, value)
174 #define azx_readl(chip, reg) \
175 snd_hdac_chip_readl(azx_bus(chip), reg)
176 #define azx_writew(chip, reg, value) \
177 snd_hdac_chip_writew(azx_bus(chip), reg, value)
178 #define azx_readw(chip, reg) \
179 snd_hdac_chip_readw(azx_bus(chip), reg)
180 #define azx_writeb(chip, reg, value) \
181 snd_hdac_chip_writeb(azx_bus(chip), reg, value)
182 #define azx_readb(chip, reg) \
183 snd_hdac_chip_readb(azx_bus(chip), reg)