Home
last modified time | relevance | path

Searched refs:mux_uart4_p (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-rk3288.c211 PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" }; variable
278 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3368.c125 PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" }; variable
269 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-px30.c165 PNAME(mux_uart4_p) = { "clk_uart4_src", "clk_uart4_np5", "clk_uart4_frac" }; variable
240 MUX(0, "clk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3308.c135 PNAME(mux_uart4_p) = { "clk_uart4_src", "dummy", "clk_uart4_frac" }; variable
214 MUX(0, "clk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,
/kernel/linux/linux-6.6/drivers/clk/rockchip/
H A Dclk-rk3288.c212 PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" }; variable
279 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3368.c125 PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" }; variable
271 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-rv1126.c165 PNAME(mux_uart4_p) = { "sclk_uart4_div", "sclk_uart4_frac", "xin24m" }; variable
236 MUX(SCLK_UART4_MUX, "sclk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3308.c136 PNAME(mux_uart4_p) = { "clk_uart4_src", "dummy", "clk_uart4_frac" }; variable
215 MUX(0, "clk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,
H A Dclk-px30.c166 PNAME(mux_uart4_p) = { "clk_uart4_src", "clk_uart4_np5", "clk_uart4_frac" }; variable
241 MUX(0, "clk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,

Completed in 12 milliseconds