/third_party/mesa3d/src/panfrost/midgard/ |
H A D | midgard_print.c | 118 mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx) in mir_print_embedded_constant() argument 122 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant() 123 unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]); in mir_print_embedded_constant() 125 unsigned mod = mir_pack_mod(ins, src_idx, false); in mir_print_embedded_constant() 126 unsigned *swizzle = ins->swizzle[src_idx]; in mir_print_embedded_constant() 127 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant() 128 unsigned comp_mask = effective_writemask(ins->op, ins->mask); in mir_print_embedded_constant() 130 unsigned max_comp = mir_components_for_type(ins->dest_type); in mir_print_embedded_constant() 147 mir_print_constant_component(stdout, &ins in mir_print_embedded_constant() 157 mir_print_src(midgard_instruction *ins, unsigned c) mir_print_src() argument 168 mir_print_instruction(midgard_instruction *ins) mir_print_instruction() argument [all...] |
H A D | midgard_emit.c | 78 mir_pack_mod(midgard_instruction *ins, unsigned i, bool scalar) in mir_pack_mod() argument 80 bool integer = midgard_is_integer_op(ins->op); in mir_pack_mod() 81 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod() 82 unsigned sz = nir_alu_type_get_type_size(ins->src_types[i]); in mir_pack_mod() 86 mir_get_imod(ins->src_shift[i], ins->src_types[i], half, scalar) : in mir_pack_mod() 87 ((ins->src_abs[i] << 0) | in mir_pack_mod() 88 ((ins->src_neg[i] << 1))); in mir_pack_mod() 123 vector_to_scalar_alu(midgard_vector_alu v, midgard_instruction *ins) in vector_to_scalar_alu() argument 125 bool is_full = nir_alu_type_get_type_size(ins in vector_to_scalar_alu() 197 mir_pack_mask_alu(midgard_instruction *ins, midgard_vector_alu *alu) mir_pack_mask_alu() argument 325 mir_pack_vector_srcs(midgard_instruction *ins, midgard_vector_alu *alu) mir_pack_vector_srcs() argument 368 mir_pack_swizzle_ldst(midgard_instruction *ins) mir_pack_swizzle_ldst() argument 394 mir_pack_swizzle_tex(midgard_instruction *ins) mir_pack_swizzle_tex() argument 436 midgard_instruction *ins = bundle->instructions[i]; mir_can_run_ooo() local 449 mir_pack_tex_ooo(midgard_block *block, midgard_bundle *bundle, midgard_instruction *ins) mir_pack_tex_ooo() argument 469 midgard_pack_common_store_mask(midgard_instruction *ins) midgard_pack_common_store_mask() argument 501 mir_pack_ldst_mask(midgard_instruction *ins) mir_pack_ldst_mask() argument 534 mir_lower_inverts(midgard_instruction *ins) mir_lower_inverts() argument 581 mir_lower_roundmode(midgard_instruction *ins) mir_lower_roundmode() argument 590 load_store_from_instr(midgard_instruction *ins) load_store_from_instr() argument 626 texture_word_from_instr(midgard_instruction *ins) texture_word_from_instr() argument 670 vector_alu_from_instr(midgard_instruction *ins) vector_alu_from_instr() argument 724 emit_branch(midgard_instruction *ins, compiler_context *ctx, midgard_block *block, midgard_bundle *bundle, struct util_dynarray *emission) emit_branch() argument 845 midgard_instruction *ins = bundle->instructions[i]; emit_alu_bundle() local 874 midgard_instruction *ins = bundle->instructions[i]; emit_alu_bundle() local 913 mir_ldst_pack_offset(midgard_instruction *ins, int offset) mir_ldst_pack_offset() argument 976 midgard_instruction *ins = bundle->instructions[i]; emit_binary_bundle() local 1018 midgard_instruction *ins = bundle->instructions[0]; emit_binary_bundle() local [all...] |
H A D | mir.c | 28 void mir_rewrite_index_src_single(midgard_instruction *ins, unsigned old, unsigned new) in mir_rewrite_index_src_single() argument 30 mir_foreach_src(ins, i) { in mir_rewrite_index_src_single() 31 if (ins->src[i] == old) in mir_rewrite_index_src_single() 32 ins->src[i] = new; in mir_rewrite_index_src_single() 36 void mir_rewrite_index_dst_single(midgard_instruction *ins, unsigned old, unsigned new) in mir_rewrite_index_dst_single() argument 38 if (ins->dest == old) in mir_rewrite_index_dst_single() 39 ins->dest = new; in mir_rewrite_index_dst_single() 43 mir_rewrite_index_src_single_swizzle(midgard_instruction *ins, unsigned old, unsigned new, unsigned *swizzle) in mir_rewrite_index_src_single_swizzle() argument 45 for (unsigned i = 0; i < ARRAY_SIZE(ins->src); ++i) { in mir_rewrite_index_src_single_swizzle() 46 if (ins in mir_rewrite_index_src_single_swizzle() 124 mir_nontrivial_mod(midgard_instruction *ins, unsigned i, bool check_swizzle) mir_nontrivial_mod() argument 148 mir_nontrivial_outmod(midgard_instruction *ins) mir_nontrivial_outmod() argument 222 mir_bytemask(midgard_instruction *ins) mir_bytemask() argument 229 mir_set_bytemask(midgard_instruction *ins, uint16_t bytemask) mir_set_bytemask() argument 239 mir_upper_override(midgard_instruction *ins, unsigned inst_size) mir_upper_override() argument 289 mir_bytemask_of_read_components_index(midgard_instruction *ins, unsigned i) mir_bytemask_of_read_components_index() argument 317 mir_bytemask_of_read_components(midgard_instruction *ins, unsigned node) mir_bytemask_of_read_components() argument 340 mir_bundle_for_op(compiler_context *ctx, midgard_instruction ins) mir_bundle_for_op() argument 382 mir_insert_instruction_before_scheduled( compiler_context *ctx, midgard_block *block, midgard_instruction *tag, midgard_instruction ins) mir_insert_instruction_before_scheduled() argument 406 mir_insert_instruction_after_scheduled( compiler_context *ctx, midgard_block *block, midgard_instruction *tag, midgard_instruction ins) mir_insert_instruction_after_scheduled() argument 436 mir_flip(midgard_instruction *ins) mir_flip() argument [all...] |
H A D | midgard_ra.c | 188 mir_foreach_instr_global(ctx, ins) { in mir_lower_special_reads() 189 switch (ins->type) { in mir_lower_special_reads() 191 mark_node_class(aluw, ins->dest); in mir_lower_special_reads() 192 mark_node_class(alur, ins->src[0]); in mir_lower_special_reads() 193 mark_node_class(alur, ins->src[1]); in mir_lower_special_reads() 194 mark_node_class(alur, ins->src[2]); in mir_lower_special_reads() 196 if (ins->compact_branch && ins->writeout) in mir_lower_special_reads() 197 mark_node_class(brar, ins->src[0]); in mir_lower_special_reads() 202 mark_node_class(aluw, ins in mir_lower_special_reads() 432 mir_is_64(midgard_instruction *ins) mir_is_64() argument 682 midgard_instruction *ins = v->instructions[i]; allocate_registers() local 729 install_registers_instr( compiler_context *ctx, struct lcra_state *l, midgard_instruction *ins) install_registers_instr() argument [all...] |
H A D | midgard_opt_dce.c | 34 can_cull_mask(compiler_context *ctx, midgard_instruction *ins) in can_cull_mask() argument 36 if (ins->dest >= ctx->temp_count) in can_cull_mask() 39 if (ins->dest == ctx->blend_src1) in can_cull_mask() 42 if (ins->type == TAG_LOAD_STORE_4) in can_cull_mask() 43 if (load_store_opcode_props[ins->op].props & LDST_SPECIAL_MASK) in can_cull_mask() 50 can_dce(midgard_instruction *ins) in can_dce() argument 52 if (ins->mask) in can_dce() 55 if (ins->compact_branch) in can_dce() 58 if (ins->type == TAG_LOAD_STORE_4) in can_dce() 59 if (load_store_opcode_props[ins in can_dce() [all...] |
H A D | midgard_compile.c | 189 midgard_instruction ins = { in v_branch() local 201 return ins; in v_branch() 205 attach_constants(compiler_context *ctx, midgard_instruction *ins, void *constants, int name) in attach_constants() argument 207 ins->has_constants = true; in attach_constants() 208 memcpy(&ins->constants, constants, 16); in attach_constants() 515 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), to); in emit_explicit_constant() local 516 attach_constants(ctx, &ins, constant_value, node + 1); in emit_explicit_constant() 517 emit_mir_instruction(ctx, ins); in emit_explicit_constant() 545 midgard_instruction ins = emit_image_op(ctx, instr, true); \ 546 emit_atomic(ctx, instr, false, midgard_op_atomic_##op, ins 637 mir_copy_src(midgard_instruction *ins, nir_alu_instr *instr, unsigned i, unsigned to, bool *abs, bool *neg, bool *not, enum midgard_roundmode *roundmode, bool is_int, unsigned bcast_count) mir_copy_src() argument 992 midgard_instruction ins = { emit_alu() local 1166 mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read) mir_set_intr_mask() argument 1203 midgard_instruction ins; emit_ubo_read() local 1262 midgard_instruction ins; emit_global() local 1367 midgard_instruction ins = { emit_atomic() local 1427 midgard_instruction ins = m_ld_vary_32(dest, PACK_LDST_ATTRIB_OFS(offset)); emit_varying_read() local 1506 midgard_instruction ins; emit_image_op() local 1551 midgard_instruction ins = m_ld_attr_32(dest, PACK_LDST_ATTRIB_OFS(offset)); emit_attr_read() local 1592 midgard_instruction *ins = emit_sysval_read() local 1628 struct midgard_instruction ins = emit_fragment_store() local 1675 midgard_instruction ins = m_ldst_mov(reg, 0); emit_compute_builtin() local 1721 midgard_instruction ins = { emit_control_barrier() local 2000 midgard_instruction ins = v_mov(reg_2, out); emit_intrinsic() local 2273 set_tex_coord(compiler_context *ctx, nir_tex_instr *instr, midgard_instruction *ins) set_tex_coord() argument 2433 midgard_instruction ins = { emit_texop_native() local 2627 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), scratch); inline_alu_constants() local 2641 max_bitsize_for_alu(midgard_instruction *ins) max_bitsize_for_alu() argument 2863 struct midgard_instruction ins = v_branch(false, false); emit_fragment_epilogue() local [all...] |
H A D | midgard_helper_invocations.c | 69 mir_foreach_instr_in_block(block, ins) { in mir_block_uses_helpers() 70 if (ins->type != TAG_TEXTURE_4) continue; in mir_block_uses_helpers() 71 if (mir_op_computes_derivatives(stage, ins->op)) in mir_block_uses_helpers() 152 mir_foreach_instr_in_block_rev(block, ins) { in mir_analyze_helper_terminate() 153 if (ins->type != TAG_TEXTURE_4) continue; in mir_analyze_helper_terminate() 154 if (!mir_op_computes_derivatives(ctx->stage, ins->op)) continue; in mir_analyze_helper_terminate() 156 ins->helper_terminate = true; in mir_analyze_helper_terminate() 168 mir_foreach_instr_in_block_rev(block, ins) { in mir_helper_block_update() 170 if (ins->dest >= temp_count || !BITSET_TEST(deps, ins in mir_helper_block_update() [all...] |
H A D | mir_promote_uniforms.c | 40 mir_is_ubo(midgard_instruction *ins) in mir_is_ubo() argument 42 return (ins->type == TAG_LOAD_STORE_4) && in mir_is_ubo() 43 (OP_IS_UBO_READ(ins->op)); in mir_is_ubo() 47 mir_is_direct_aligned_ubo(midgard_instruction *ins) in mir_is_direct_aligned_ubo() argument 49 return mir_is_ubo(ins) && in mir_is_direct_aligned_ubo() 50 !(ins->constants.u32[0] & 0xF) && in mir_is_direct_aligned_ubo() 51 (ins->src[1] == ~0) && in mir_is_direct_aligned_ubo() 52 (ins->src[2] == ~0); in mir_is_direct_aligned_ubo() 79 mir_foreach_instr_global(ctx, ins) { in mir_analyze_ranges() 80 if (!mir_is_direct_aligned_ubo(ins)) continu in mir_analyze_ranges() [all...] |
H A D | compiler.h | 322 mir_upload_ins(struct compiler_context *ctx, struct midgard_instruction ins) in mir_upload_ins() argument 325 memcpy(heap, &ins, sizeof(ins)); in mir_upload_ins() 330 emit_mir_instruction(struct compiler_context *ctx, struct midgard_instruction ins) in emit_mir_instruction() argument 332 midgard_instruction *u = mir_upload_ins(ctx, ins); in emit_mir_instruction() 340 struct midgard_instruction ins) in mir_insert_instruction_before() 342 struct midgard_instruction *u = mir_upload_ins(ctx, ins); in mir_insert_instruction_before() 348 mir_remove_instruction(struct midgard_instruction *ins) in mir_remove_instruction() argument 350 list_del(&ins->link); in mir_remove_instruction() 354 mir_prev_op(struct midgard_instruction *ins) in mir_prev_op() argument 338 mir_insert_instruction_before(struct compiler_context *ctx, struct midgard_instruction *tag, struct midgard_instruction ins) mir_insert_instruction_before() argument 360 mir_next_op(struct midgard_instruction *ins) mir_next_op() argument 536 midgard_instruction ins = { v_mov() local 571 midgard_instruction ins = { v_load_store_scratch() local 612 mir_has_arg(midgard_instruction *ins, unsigned arg) mir_has_arg() argument [all...] |
H A D | midgard_opt_perspective.c | 55 mir_foreach_instr_in_block_safe(block, ins) { in midgard_opt_combine_projection() 57 if (ins->type != TAG_ALU_4) continue; in midgard_opt_combine_projection() 58 if (ins->op != midgard_alu_op_fmul) continue; in midgard_opt_combine_projection() 64 if (!mir_is_simple_swizzle(ins->swizzle[0], ins->mask)) continue; in midgard_opt_combine_projection() 65 if (!is_swizzle_0(ins->swizzle[1])) continue; in midgard_opt_combine_projection() 68 unsigned frcp = ins->src[1]; in midgard_opt_combine_projection() 69 unsigned to = ins->dest; in midgard_opt_combine_projection() 91 if (frcp_from != ins->src[0]) continue; in midgard_opt_combine_projection() 118 .mask = ins in midgard_opt_combine_projection() [all...] |
H A D | midgard_address.c | 228 mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset, unsigned seg) in mir_set_offset() argument 231 ins->swizzle[1][i] = 0; in mir_set_offset() 232 ins->swizzle[2][i] = 0; in mir_set_offset() 240 ins->load_store.bitsize_toggle = true; in mir_set_offset() 241 ins->load_store.arg_comp = seg & 0x3; in mir_set_offset() 242 ins->load_store.arg_reg = (seg >> 2) & 0x7; in mir_set_offset() 243 ins->src[2] = nir_src_index(ctx, offset); in mir_set_offset() 244 ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset); in mir_set_offset() 247 ins->load_store.index_format = midgard_index_address_s32; in mir_set_offset() 249 ins in mir_set_offset() 292 mir_set_ubo_offset(midgard_instruction *ins, nir_src *src, unsigned bias) mir_set_ubo_offset() argument [all...] |
H A D | midgard_opt_copy_prop.c | 33 mir_foreach_instr_in_block_safe(block, ins) { in midgard_opt_copy_prop() 34 if (ins->type != TAG_ALU_4) continue; in midgard_opt_copy_prop() 35 if (!OP_IS_MOVE(ins->op)) continue; in midgard_opt_copy_prop() 36 if (ins->is_pack) continue; in midgard_opt_copy_prop() 38 unsigned from = ins->src[1]; in midgard_opt_copy_prop() 39 unsigned to = ins->dest; in midgard_opt_copy_prop() 47 if (ins->has_inline_constant) continue; in midgard_opt_copy_prop() 48 if (ins->has_constants) continue; in midgard_opt_copy_prop() 51 if (mir_nontrivial_mod(ins, 1, false)) continue; in midgard_opt_copy_prop() 52 if (mir_nontrivial_outmod(ins)) continu in midgard_opt_copy_prop() [all...] |
H A D | mir_squeeze.c | 70 mir_foreach_instr_global(ctx, ins) { in mir_squeeze_index() 71 if (ins->type == TAG_TEXTURE_4) in mir_squeeze_index() 72 ins->dest = find_or_allocate_temp(ctx, map, ins->dest); in mir_squeeze_index() 75 mir_foreach_instr_global(ctx, ins) { in mir_squeeze_index() 76 if (ins->type != TAG_TEXTURE_4) in mir_squeeze_index() 77 ins->dest = find_or_allocate_temp(ctx, map, ins->dest); in mir_squeeze_index() 79 for (unsigned i = 0; i < ARRAY_SIZE(ins->src); ++i) in mir_squeeze_index() 80 ins in mir_squeeze_index() [all...] |
H A D | midgard_derivatives.c | 101 midgard_instruction ins = { in midgard_emit_derivatives() local 120 ins.mask &= instr->dest.write_mask; in midgard_emit_derivatives() 122 emit_mir_instruction(ctx, ins); in midgard_emit_derivatives() 128 mir_foreach_instr_in_block_safe(block, ins) { in midgard_lower_derivatives() 129 if (ins->type != TAG_TEXTURE_4) continue; in midgard_lower_derivatives() 130 if (ins->op != midgard_tex_op_derivative) continue; in midgard_lower_derivatives() 134 bool upper = ins->mask & 0b1100; in midgard_lower_derivatives() 135 bool lower = ins->mask & 0b0011; in midgard_lower_derivatives() 142 memcpy(&dup, ins, sizeof(dup)); in midgard_lower_derivatives() 146 ins in midgard_lower_derivatives() [all...] |
H A D | midgard_schedule.c | 286 mir_foreach_instr_in_block(block, ins) in flatten_mir() 287 instructions[i++] = ins; in flatten_mir() 393 mir_adjust_constant(midgard_instruction *ins, unsigned src, in mir_adjust_constant() argument 399 unsigned type_size = nir_alu_type_get_type_size(ins->src_types[src]) / 8; in mir_adjust_constant() 401 unsigned max_comp = mir_components_for_type(ins->src_types[src]); in mir_adjust_constant() 403 mir_bytemask_of_read_components_index(ins, src), in mir_adjust_constant() 421 uint8_t *constantp = ins->constants.u8 + (type_size * comp); in mir_adjust_constant() 469 mir_adjust_constants(midgard_instruction *ins, in mir_adjust_constants() argument 474 if (!ins->has_constants) in mir_adjust_constants() 488 if (ins in mir_adjust_constants() 525 mir_pipeline_count(midgard_instruction *ins) mir_pipeline_count() argument 554 mir_is_add_2(midgard_instruction *ins) mir_is_add_2() argument 580 mir_adjust_unit(midgard_instruction *ins, unsigned unit) mir_adjust_unit() argument 596 mir_has_unit(midgard_instruction *ins, unsigned unit) mir_has_unit() argument 612 mir_live_effect(uint16_t *liveness, midgard_instruction *ins, bool destructive) mir_live_effect() argument 1031 midgard_instruction *ins = mir_schedule_texture() local 1063 midgard_instruction *ins = mir_schedule_ldst() local 1116 midgard_instruction *ins = mir_schedule_zs_write() local 1282 midgard_instruction *ins = vadd_csel ? vadd : smul; mir_schedule_alu() local [all...] |
/third_party/mesa3d/src/panfrost/bifrost/ |
H A D | bi_opt_dce.c | 45 bi_foreach_instr_in_block_safe_rev(block, ins) { in bi_opt_dead_code_eliminate() 48 bi_foreach_dest(ins, d) { in bi_opt_dead_code_eliminate() 49 unsigned index = bi_get_node(ins->dest[d]); in bi_opt_dead_code_eliminate() 52 if (ins->op == BI_OPCODE_AXCHG_I32 || in bi_opt_dead_code_eliminate() 53 ins->op == BI_OPCODE_ACMPXCHG_I32 || in bi_opt_dead_code_eliminate() 54 ins->op == BI_OPCODE_ATOM_RETURN_I32 || in bi_opt_dead_code_eliminate() 55 ins->op == BI_OPCODE_ATOM1_RETURN_I32 || in bi_opt_dead_code_eliminate() 56 ins->op == BI_OPCODE_BLEND || in bi_opt_dead_code_eliminate() 57 ins->op == BI_OPCODE_ATEST || in bi_opt_dead_code_eliminate() 58 ins in bi_opt_dead_code_eliminate() 81 bi_postra_liveness_ins(uint64_t live, bi_instr *ins) bi_postra_liveness_ins() argument [all...] |
H A D | bi_lower_swizzle.c | 34 bi_lower_swizzle_16(bi_context *ctx, bi_instr *ins, unsigned src) in bi_lower_swizzle_16() argument 37 if (ins->src[src].swizzle == BI_SWIZZLE_H01) in bi_lower_swizzle_16() 41 switch (ins->op) { in bi_lower_swizzle_16() 72 if (src == 0 && ins->src[src].swizzle != BI_SWIZZLE_H10) in bi_lower_swizzle_16() 89 if (ins->src[src].swizzle == BI_SWIZZLE_H10) in bi_lower_swizzle_16() 98 bi_builder b = bi_init_builder(ctx, bi_after_instr(ins)); in bi_lower_swizzle_16() 99 bi_index dest = ins->dest[0]; in bi_lower_swizzle_16() 102 ins->dest[0] = tmp; in bi_lower_swizzle_16() 103 bi_swz_v2i16_to(&b, dest, bi_replace_index(ins->src[0], tmp)); in bi_lower_swizzle_16() 116 if (ins in bi_lower_swizzle_16() [all...] |
H A D | bir.c | 30 bi_has_arg(const bi_instr *ins, bi_index arg) in bi_has_arg() argument 32 if (!ins) in bi_has_arg() 35 bi_foreach_src(ins, s) { in bi_has_arg() 36 if (bi_is_equiv(ins->src[s], arg)) in bi_has_arg() 66 bi_count_staging_registers(const bi_instr *ins) in bi_count_staging_registers() argument 68 enum bi_sr_count count = bi_opcode_props[ins->op].sr_count; in bi_count_staging_registers() 69 unsigned vecsize = ins->vecsize + 1; /* XXX: off-by-one */ in bi_count_staging_registers() 75 return bi_is_regfmt_16(ins->register_format) ? in bi_count_staging_registers() 80 return ins->sr_count; in bi_count_staging_registers() 87 bi_count_read_registers(const bi_instr *ins, unsigne argument 103 bi_count_write_registers(const bi_instr *ins, unsigned d) bi_count_write_registers() argument 144 bi_writemask(const bi_instr *ins, unsigned d) bi_writemask() argument [all...] |
H A D | bi_opt_copy_prop.c | 31 bi_is_copy(bi_instr *ins) in bi_is_copy() argument 33 return (ins->op == BI_OPCODE_MOV_I32) && bi_is_ssa(ins->dest[0]) in bi_is_copy() 34 && (bi_is_ssa(ins->src[0]) || ins->src[0].type == BI_INDEX_FAU in bi_is_copy() 35 || ins->src[0].type == BI_INDEX_CONSTANT); in bi_is_copy() 39 bi_reads_fau(bi_instr *ins) in bi_reads_fau() argument 41 bi_foreach_src(ins, s) { in bi_reads_fau() 42 if (ins->src[s].type == BI_INDEX_FAU) in bi_reads_fau() 91 bi_foreach_instr_global_safe(ctx, ins) { in bi_opt_copy_prop() [all...] |
H A D | bifrost_isa.py | 125 def parse_instruction(ins, include_pseudo): 132 'staging': ins.attrib.get('staging', '').split('=')[0], 133 'staging_count': ins.attrib.get('staging', '=0').split('=')[1], 134 'dests': int(ins.attrib.get('dests', '1')), 135 'unused': ins.attrib.get('unused', False), 136 'pseudo': ins.attrib.get('pseudo', False), 137 'message': ins.attrib.get('message', 'none'), 138 'last': ins.attrib.get('last', False), 139 'table': ins.attrib.get('table', False), 142 if 'exact' in ins [all...] |
H A D | bi_ra.c | 252 bi_foreach_instr_in_block_rev(block, ins) { in bi_mark_interference() 256 bi_foreach_dest(ins, d) { in bi_mark_interference() 257 unsigned node = bi_get_node(ins->dest[d]); in bi_mark_interference() 268 unsigned count = bi_count_write_registers(ins, d); in bi_mark_interference() 269 unsigned offset = ins->dest[d].offset; in bi_mark_interference() 287 if (ins->op == BI_OPCODE_MOV_I32 && in bi_mark_interference() 288 i == bi_get_node(ins->src[0])) { in bi_mark_interference() 290 r &= ~BITFIELD_BIT(ins->src[0].offset); in bi_mark_interference() 295 bi_writemask(ins, d), i, r); in bi_mark_interference() 299 unsigned node_first = bi_get_node(ins in bi_mark_interference() 526 bi_rewrite_index_src_single(bi_instr *ins, bi_index old, bi_index new) bi_rewrite_index_src_single() argument [all...] |
H A D | bi_schedule.c | 143 bi_message_type_for_instr(bi_instr *ins) in bi_message_type_for_instr() argument 145 enum bifrost_message_type msg = bi_opcode_props[ins->op].message; in bi_message_type_for_instr() 146 bool ld_var_special = (ins->op == BI_OPCODE_LD_VAR_SPECIAL); in bi_message_type_for_instr() 148 if (ld_var_special && ins->varying_name == BI_VARYING_NAME_FRAG_Z) in bi_message_type_for_instr() 151 if (msg == BIFROST_MESSAGE_LOAD && ins->seg == BI_SEG_UBO) in bi_message_type_for_instr() 161 bi_supports_dtsel(bi_instr *ins) in bi_supports_dtsel() argument 163 switch (bi_message_type_for_instr(ins)) { in bi_supports_dtsel() 165 return ins->op != BI_OPCODE_LD_GCLK_U64; in bi_supports_dtsel() 235 bi_instr *ins = st.instructions[i]; in bi_create_dependency_graph() local 237 bi_foreach_src(ins, in bi_create_dependency_graph() 500 bi_can_iaddc(bi_instr *ins) bi_can_iaddc() argument 520 bi_can_fma(bi_instr *ins) bi_can_fma() argument 550 bi_can_add(bi_instr *ins) bi_can_add() argument 579 bi_must_not_last(bi_instr *ins) bi_must_not_last() argument 592 bi_must_message(bi_instr *ins) bi_must_message() argument 620 bi_reads_zero(bi_instr *ins) bi_reads_zero() argument 626 bi_reads_temps(bi_instr *ins, unsigned src) bi_reads_temps() argument 716 bi_reads_t(bi_instr *ins, unsigned src) bi_reads_t() argument 963 bi_has_cross_passthrough_hazard(bi_tuple *succ, bi_instr *ins) bi_has_cross_passthrough_hazard() argument 1305 bi_use_passthrough(bi_instr *ins, bi_index old, enum bifrost_packed_src new, bool except_sr) bi_use_passthrough() argument 1364 bi_rewrite_zero(bi_instr *ins, bool fma) bi_rewrite_zero() argument 1959 bi_check_fau_src(bi_instr *ins, unsigned s, uint32_t *constants, unsigned *cwords, bi_index *fau) bi_check_fau_src() argument [all...] |
/third_party/mesa3d/src/compiler/clc/ |
H A D | clc_helpers.cpp | 131 void parseEntryPoint(const spv_parsed_instruction_t *ins) in parseEntryPoint() argument 133 assert(ins->num_operands >= 3); in parseEntryPoint() 135 const spv_parsed_operand_t *op = &ins->operands[1]; in parseEntryPoint() 139 uint32_t funcId = ins->words[op->offset]; in parseEntryPoint() 146 op = &ins->operands[2]; in parseEntryPoint() 148 const char *name = reinterpret_cast<const char *>(ins->words + op->offset); in parseEntryPoint() 153 void parseFunction(const spv_parsed_instruction_t *ins) in parseFunction() argument 155 assert(ins->num_operands == 4); in parseFunction() 157 const spv_parsed_operand_t *op = &ins->operands[1]; in parseFunction() 161 uint32_t funcId = ins in parseFunction() 171 parseFunctionParam(const spv_parsed_instruction_t *ins) parseFunctionParam() argument 189 parseName(const spv_parsed_instruction_t *ins) parseName() argument 214 parseTypePointer(const spv_parsed_instruction_t *ins) parseTypePointer() argument 255 parseOpString(const spv_parsed_instruction_t *ins) parseOpString() argument 315 applyDecoration(uint32_t id, const spv_parsed_instruction_t *ins) applyDecoration() argument 377 parseOpDecorate(const spv_parsed_instruction_t *ins) parseOpDecorate() argument 391 parseOpGroupDecorate(const spv_parsed_instruction_t *ins) parseOpGroupDecorate() argument 415 parseOpTypeImage(const spv_parsed_instruction_t *ins) parseOpTypeImage() argument 452 parseExecutionMode(const spv_parsed_instruction_t *ins) parseExecutionMode() argument 478 parseLiteralType(const spv_parsed_instruction_t *ins) parseLiteralType() argument 548 parseSpecConstant(const spv_parsed_instruction_t *ins) parseSpecConstant() argument 577 parseInstruction(void *data, const spv_parsed_instruction_t *ins) parseInstruction() argument [all...] |
/third_party/mesa3d/src/asahi/compiler/ |
H A D | agx_register_allocate.c | 285 agx_foreach_instr_global(ctx, ins) { in agx_ra() 286 agx_foreach_src(ins, s) { in agx_ra() 287 if (ins->src[s].type == AGX_INDEX_NORMAL) { in agx_ra() 288 unsigned v = ssa_to_reg[ins->src[s].value]; in agx_ra() 289 ins->src[s] = agx_replace_index(ins->src[s], agx_register(v, ins->src[s].size)); in agx_ra() 293 agx_foreach_dest(ins, d) { in agx_ra() 294 if (ins->dest[d].type == AGX_INDEX_NORMAL) { in agx_ra() 295 unsigned v = ssa_to_reg[ins in agx_ra() [all...] |
/third_party/mesa3d/src/imagination/vulkan/pds/ |
H A D | pvr_pds_disasm.c | 426 struct pvr_sftlp *ins = malloc(sizeof(*ins)); in pvr_pds_disassemble_instruction_sftlp32() local 427 assert(ins); in pvr_pds_disassemble_instruction_sftlp32() 429 ins->instruction.next = NULL; in pvr_pds_disassemble_instruction_sftlp32() 430 ins->instruction.type = INS_SFTLP32; in pvr_pds_disassemble_instruction_sftlp32() 432 ins->cc = instruction & PVR_ROGUE_PDSINST_SFTLP32_CC_ENABLE; in pvr_pds_disassemble_instruction_sftlp32() 433 ins->IM = instruction & PVR_ROGUE_PDSINST_SFTLP32_IM_ENABLE; in pvr_pds_disassemble_instruction_sftlp32() 434 ins->lop = (instruction >> PVR_ROGUE_PDSINST_SFTLP32_LOP_SHIFT) & in pvr_pds_disassemble_instruction_sftlp32() 436 ins->src0 = pvr_pds_disassemble_regs32t( in pvr_pds_disassemble_instruction_sftlp32() 442 ins in pvr_pds_disassemble_instruction_sftlp32() 488 struct pvr_sftlp *ins = malloc(sizeof(*ins)); pvr_pds_disassemble_instruction_sftlp64() local 594 struct pvr_ldst *ins = malloc(sizeof(*ins)); pvr_pds_disassemble_instruction_sp_ld_st() local 669 struct pvr_simple *ins = malloc(sizeof(*ins)); pvr_pds_disassemble_simple() local [all...] |