Lines Matching refs:ins
30 bi_has_arg(const bi_instr *ins, bi_index arg)
32 if (!ins)
35 bi_foreach_src(ins, s) {
36 if (bi_is_equiv(ins->src[s], arg))
66 bi_count_staging_registers(const bi_instr *ins)
68 enum bi_sr_count count = bi_opcode_props[ins->op].sr_count;
69 unsigned vecsize = ins->vecsize + 1; /* XXX: off-by-one */
75 return bi_is_regfmt_16(ins->register_format) ?
80 return ins->sr_count;
87 bi_count_read_registers(const bi_instr *ins, unsigned s)
90 if (s == 0 && ins->op == BI_OPCODE_ATOM_RETURN_I32)
91 return (ins->atom_opc == BI_ATOM_OPC_ACMPXCHG) ? 2 : 1;
92 else if (s == 0 && bi_opcode_props[ins->op].sr_read)
93 return bi_count_staging_registers(ins);
94 else if (s == 4 && ins->op == BI_OPCODE_BLEND)
95 return ins->sr_count_2; /* Dual source blending */
96 else if (s == 0 && ins->op == BI_OPCODE_SPLIT_I32)
97 return ins->nr_dests;
103 bi_count_write_registers(const bi_instr *ins, unsigned d)
105 if (d == 0 && bi_opcode_props[ins->op].sr_write) {
106 switch (ins->op) {
108 if (ins->sr_count_2)
109 return ins->sr_count;
111 return bi_is_regfmt_16(ins->register_format) ? 2 : 4;
116 unsigned chans = util_bitcount(ins->write_mask);
118 return bi_is_regfmt_16(ins->register_format) ?
128 return bi_is_null(ins->dest[0]) ? 0 : ins->sr_count;
130 return bi_count_staging_registers(ins);
132 } else if (ins->op == BI_OPCODE_SEG_ADD_I64) {
134 } else if (ins->op == BI_OPCODE_TEXC && d == 1) {
135 return ins->sr_count_2;
136 } else if (ins->op == BI_OPCODE_COLLECT_I32 && d == 0) {
137 return ins->nr_srcs;
144 bi_writemask(const bi_instr *ins, unsigned d)
146 unsigned mask = BITFIELD_MASK(bi_count_write_registers(ins, d));
147 unsigned shift = ins->dest[d].offset;