| /kernel/linux/linux-5.10/sound/pci/echoaudio/ |
| H A D | gina24_dsp.c | 32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
155 err = write_control_reg(chip, control_reg, true); in load_asic()
229 return write_control_reg(chip, control_reg, false); in set_sample_rate()
277 return write_control_reg(chip, control_reg, true); in set_input_clock()
336 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
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| H A D | echoaudio_3g.c | 72 register. write_control_reg sends the new control register value to the DSP. */
73 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq, in write_control_reg() function
184 return write_control_reg(chip, control_reg, get_frq_reg(chip), 0); in set_professional_spdif()
247 err = write_control_reg(chip, E3G_48KHZ, in load_asic()
323 return write_control_reg(chip, control_reg, frq_reg, 0); in set_sample_rate()
372 return write_control_reg(chip, control_reg, get_frq_reg(chip), 1); in set_input_clock()
425 err = write_control_reg(chip, control_reg, get_frq_reg(chip), 1); in dsp_set_digital_mode()
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| H A D | layla24_dsp.c | 31 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
149 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()
244 return write_control_reg(chip, control_reg, false); in set_sample_rate()
290 return write_control_reg(chip, control_reg, true); in set_input_clock()
386 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
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| H A D | mona_dsp.c | 32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
151 err = write_control_reg(chip, control_reg, true); in load_asic()
293 return write_control_reg(chip, control_reg, force_write); in set_sample_rate()
354 return write_control_reg(chip, control_reg, true); in set_input_clock()
413 err = write_control_reg(chip, control_reg, false); in dsp_set_digital_mode()
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| H A D | echo3g_dsp.c | 39 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
128 return write_control_reg(chip, control_reg, in set_phantom_power()
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| H A D | echoaudio_gml.c | 62 the control register. write_control_reg sends the new control register
64 static int write_control_reg(struct echoaudio *chip, u32 value, char force) in write_control_reg() function
74 dev_dbg(chip->card->dev, "write_control_reg: 0x%x\n", value); in write_control_reg()
197 if ((err = write_control_reg(chip, control_reg, false))) in set_professional_spdif()
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| /kernel/linux/linux-6.6/sound/pci/echoaudio/ |
| H A D | gina24_dsp.c | 32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
157 err = write_control_reg(chip, control_reg, true); in load_asic()
231 return write_control_reg(chip, control_reg, false); in set_sample_rate()
279 return write_control_reg(chip, control_reg, true); in set_input_clock()
338 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
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| H A D | echoaudio_3g.c | 72 register. write_control_reg sends the new control register value to the DSP. */
73 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq, in write_control_reg() function
184 return write_control_reg(chip, control_reg, get_frq_reg(chip), 0); in set_professional_spdif()
247 err = write_control_reg(chip, E3G_48KHZ, in load_asic()
323 return write_control_reg(chip, control_reg, frq_reg, 0); in set_sample_rate()
372 return write_control_reg(chip, control_reg, get_frq_reg(chip), 1); in set_input_clock()
425 err = write_control_reg(chip, control_reg, get_frq_reg(chip), 1); in dsp_set_digital_mode()
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| H A D | layla24_dsp.c | 31 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
152 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()
247 return write_control_reg(chip, control_reg, false); in set_sample_rate()
293 return write_control_reg(chip, control_reg, true); in set_input_clock()
389 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
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| H A D | mona_dsp.c | 32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
153 err = write_control_reg(chip, control_reg, true); in load_asic()
295 return write_control_reg(chip, control_reg, force_write); in set_sample_rate()
356 return write_control_reg(chip, control_reg, true); in set_input_clock()
415 err = write_control_reg(chip, control_reg, false); in dsp_set_digital_mode()
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| H A D | echoaudio_gml.c | 62 the control register. write_control_reg sends the new control register
64 static int write_control_reg(struct echoaudio *chip, u32 value, char force) in write_control_reg() function
74 dev_dbg(chip->card->dev, "write_control_reg: 0x%x\n", value); in write_control_reg()
197 err = write_control_reg(chip, control_reg, false); in set_professional_spdif()
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| H A D | echo3g_dsp.c | 39 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
129 return write_control_reg(chip, control_reg, in set_phantom_power()
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| /kernel/linux/linux-5.10/drivers/tty/ |
| H A D | synclinkmp.c | 626 static void write_control_reg(SLMP_INFO * info);
4015 write_control_reg(info); in enable_loopback()
4438 write_control_reg(info); in async_mode()
4617 write_control_reg(info); in hdlc_mode()
4766 write_control_reg(info); in set_signals()
5185 write_control_reg(info); in init_adapter()
5560 static void write_control_reg(SLMP_INFO * info) in write_control_reg() function
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