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Searched refs:RK2928_CLKSEL_CON (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-rk3228.c83 .reg = RK2928_CLKSEL_CON(1), \
122 .core_reg = RK2928_CLKSEL_CON(0),
184 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS);
188 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
192 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS);
196 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS);
200 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
204 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
208 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
216 RK2928_CLKSEL_CON(
[all...]
H A Dclk-rk3188.c111 .reg = RK2928_CLKSEL_CON(0), \
117 .reg = RK2928_CLKSEL_CON(1), \
148 .core_reg = RK2928_CLKSEL_CON(0),
162 .reg = RK2928_CLKSEL_CON(1), \
187 .core_reg = RK2928_CLKSEL_CON(0),
251 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS);
255 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
259 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
263 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
267 RK2928_CLKSEL_CON(1
[all...]
H A Dclk-rk3036.c85 .reg = RK2928_CLKSEL_CON(1), \
105 .core_reg = RK2928_CLKSEL_CON(0),
149 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
153 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
157 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
161 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
165 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
186 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
190 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
193 RK2928_CLKSEL_CON(
[all...]
H A Dclk-rk3128.c82 .reg = RK2928_CLKSEL_CON(1), \
120 .core_reg = RK2928_CLKSEL_CON(0),
174 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS);
178 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
182 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS);
186 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
190 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
194 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
205 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
213 RK2928_CLKSEL_CON(2
[all...]
H A Dclk-rv1108.c517 RK2928_CLKSEL_CON(9), 0,
728 RK2928_CLKSEL_CON(26), 8, 8, DFLAGS),
H A Dclk.h84 #define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44) macro
/kernel/linux/linux-6.6/drivers/clk/rockchip/
H A Dclk-rk3228.c83 .reg = RK2928_CLKSEL_CON(1), \
122 .core_reg[0] = RK2928_CLKSEL_CON(0),
185 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS);
189 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
193 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS);
197 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS);
201 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
205 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
209 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
217 RK2928_CLKSEL_CON(
[all...]
H A Dclk-rk3188.c111 .reg = RK2928_CLKSEL_CON(0), \
117 .reg = RK2928_CLKSEL_CON(1), \
148 .core_reg[0] = RK2928_CLKSEL_CON(0),
163 .reg = RK2928_CLKSEL_CON(1), \
188 .core_reg[0] = RK2928_CLKSEL_CON(0),
253 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS);
257 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
261 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
265 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
269 RK2928_CLKSEL_CON(1
[all...]
H A Dclk-rk3036.c85 .reg = RK2928_CLKSEL_CON(1), \
105 .core_reg[0] = RK2928_CLKSEL_CON(0),
151 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
155 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
159 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
163 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
167 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
188 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
192 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
195 RK2928_CLKSEL_CON(
[all...]
H A Dclk-rk3128.c82 .reg = RK2928_CLKSEL_CON(1), \
120 .core_reg[0] = RK2928_CLKSEL_CON(0),
175 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS);
179 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
183 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS);
187 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
191 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
195 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
206 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
214 RK2928_CLKSEL_CON(2
[all...]
H A Dclk-rv1108.c518 RK2928_CLKSEL_CON(9), 0,
729 RK2928_CLKSEL_CON(26), 8, 8, DFLAGS),
H A Dclk.h103 #define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44) macro

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