Home
last modified time | relevance | path

Searched refs:val (Results 851 - 875 of 21273) sorted by relevance

1...<<31323334353637383940>>...851

/kernel/linux/linux-5.10/drivers/phy/allwinner/
H A Dphy-sun50i-usb3.c63 u32 val; in sun50i_usb3_phy_open() local
65 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
66 val |= SUNXI_PEC_EXTERN_VBUS; in sun50i_usb3_phy_open()
67 val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN; in sun50i_usb3_phy_open()
68 writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
70 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
71 val |= SUNXI_PCC_PIPE_CLK_OPEN; in sun50i_usb3_phy_open()
72 writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
74 val = readl(phy->regs + SUNXI_ISCR); in sun50i_usb3_phy_open()
75 val | in sun50i_usb3_phy_open()
[all...]
/kernel/linux/linux-6.6/drivers/clk/actions/
H A Dowl-pll.c32 unsigned int val) in _get_table_rate()
37 if (clkt->val == val) in _get_table_rate()
87 u32 val; in owl_pll_recalc_rate() local
90 regmap_read(common->regmap, pll_hw->reg, &val); in owl_pll_recalc_rate()
92 val = val >> pll_hw->shift; in owl_pll_recalc_rate()
93 val &= mul_mask(pll_hw); in owl_pll_recalc_rate()
95 return _get_table_rate(pll_hw->table, val); in owl_pll_recalc_rate()
102 regmap_read(common->regmap, pll_hw->reg, &val); in owl_pll_recalc_rate()
31 _get_table_rate(const struct clk_pll_table *table, unsigned int val) _get_table_rate() argument
162 u32 val, reg; owl_pll_set_rate() local
[all...]
/kernel/linux/linux-6.6/drivers/phy/allwinner/
H A Dphy-sun50i-usb3.c64 u32 val; in sun50i_usb3_phy_open() local
66 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
67 val |= SUNXI_PEC_EXTERN_VBUS; in sun50i_usb3_phy_open()
68 val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN; in sun50i_usb3_phy_open()
69 writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
71 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
72 val |= SUNXI_PCC_PIPE_CLK_OPEN; in sun50i_usb3_phy_open()
73 writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
75 val = readl(phy->regs + SUNXI_ISCR); in sun50i_usb3_phy_open()
76 val | in sun50i_usb3_phy_open()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_thermal.c178 uint32_t val; in vega12_thermal_set_temperature_range() local
189 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega12_thermal_set_temperature_range()
191 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5); in vega12_thermal_set_temperature_range()
192 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1); in vega12_thermal_set_temperature_range()
193 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high); in vega12_thermal_set_temperature_range()
194 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTR in vega12_thermal_set_temperature_range()
212 uint32_t val = 0; vega12_thermal_enable_alert() local
[all...]
/kernel/linux/linux-5.10/net/ipv6/
H A Dipv6_sockglue.c397 int val, valbool; in do_ipv6_setsockopt() local
402 val = 0; in do_ipv6_setsockopt()
405 if (copy_from_sockptr(&val, optval, sizeof(val))) in do_ipv6_setsockopt()
408 val = 0; in do_ipv6_setsockopt()
411 valbool = (val != 0); in do_ipv6_setsockopt()
431 if (val == PF_INET) { in do_ipv6_setsockopt()
600 if (val < -1 || val > 0xff) in do_ipv6_setsockopt()
603 if (val in do_ipv6_setsockopt()
1128 int val; do_ipv6_getsockopt() local
[all...]
/kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/
H A Dqat_crypto.c123 unsigned long val; in qat_crypto_dev_config() local
138 val = i; in qat_crypto_dev_config()
141 key, (void *)&val, ADF_DEC)) in qat_crypto_dev_config()
147 key, (void *)&val, ADF_DEC)) in qat_crypto_dev_config()
151 val = 128; in qat_crypto_dev_config()
153 key, (void *)&val, ADF_DEC)) in qat_crypto_dev_config()
156 val = 512; in qat_crypto_dev_config()
159 key, (void *)&val, ADF_DEC)) in qat_crypto_dev_config()
162 val = 0; in qat_crypto_dev_config()
165 key, (void *)&val, ADF_DE in qat_crypto_dev_config()
214 char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; qat_crypto_create_instances() local
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-iop32x/
H A Diop3xx.h234 u32 val; in read_tmr0() local
235 asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); in read_tmr0()
236 return val; in read_tmr0()
239 static inline void write_tmr0(u32 val) in write_tmr0() argument
241 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val)); in write_tmr0()
244 static inline void write_tmr1(u32 val) in write_tmr1() argument
246 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val)); in write_tmr1()
251 u32 val; in read_tcr0() local
252 asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val)); in read_tcr0()
253 return val; in read_tcr0()
256 write_tcr0(u32 val) write_tcr0() argument
263 u32 val; read_tcr1() local
268 write_tcr1(u32 val) write_tcr1() argument
273 write_trr0(u32 val) write_trr0() argument
278 write_trr1(u32 val) write_trr1() argument
283 write_tisr(u32 val) write_tisr() argument
290 u32 val; read_wdtcr() local
294 write_wdtcr(u32 val) write_wdtcr() argument
309 write_wdtsr(u32 val) write_wdtsr() argument
[all...]
/kernel/linux/linux-5.10/drivers/phy/samsung/
H A Dphy-exynos5250-sata.c89 u32 val = 0; in exynos_sata_phy_init() local
99 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
101 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
102 val |= RESET_GLOBAL_RST_N | RESET_CMN_RST_N | RESET_CMN_BLOCK_RST_N in exynos_sata_phy_init()
105 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
107 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
108 val |= LINK_RESET; in exynos_sata_phy_init()
109 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
111 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
112 val | in exynos_sata_phy_init()
[all...]
/kernel/linux/linux-5.10/drivers/power/supply/
H A Dmax1721x_battery.c100 int val = (int16_t)(reg); in max172xx_temperature_to_ps() local
102 return val * 10 / 256; /* in tenths of deg. C */ in max172xx_temperature_to_ps()
115 int val = (int16_t)(reg); in max172xx_current_to_voltage() local
117 return val * 156252; in max172xx_current_to_voltage()
129 union power_supply_propval *val) in max1721x_battery_get_property()
142 val->intval = in max1721x_battery_get_property()
148 val->intval = max172xx_percent_to_ps(reg); in max1721x_battery_get_property()
152 val->intval = max172xx_voltage_to_ps(reg); in max1721x_battery_get_property()
156 val->intval = max172xx_capacity_to_ps(reg); in max1721x_battery_get_property()
160 val in max1721x_battery_get_property()
127 max1721x_battery_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) max1721x_battery_get_property() argument
229 unsigned int val; get_string() local
247 unsigned int val[3]; get_sn_string() local
[all...]
/kernel/linux/linux-5.10/drivers/pci/controller/
H A Dpci-rcar-gen2.c109 int slot, val; in rcar_pci_cfg_base() local
123 val = slot ? RCAR_AHBPCI_WIN1_DEVICE | RCAR_AHBPCI_WIN_CTR_CFG : in rcar_pci_cfg_base()
126 iowrite32(val, priv->reg + RCAR_AHBPCI_WIN1_CTR_REG); in rcar_pci_cfg_base()
155 u32 val; in rcar_pci_setup_errirq() local
164 val = ioread32(priv->reg + RCAR_PCI_INT_ENABLE_REG); in rcar_pci_setup_errirq()
165 val |= RCAR_PCI_INT_ALLERRORS; in rcar_pci_setup_errirq()
166 iowrite32(val, priv->reg + RCAR_PCI_INT_ENABLE_REG); in rcar_pci_setup_errirq()
182 u32 val; in rcar_pci_setup() local
198 val = ioread32(reg + RCAR_PCI_UNIT_REV_REG); in rcar_pci_setup()
199 dev_info(dev, "PCI: revision %x\n", val); in rcar_pci_setup()
[all...]
/kernel/linux/linux-6.6/drivers/power/supply/
H A Dmax1721x_battery.c100 int val = (int16_t)(reg); in max172xx_temperature_to_ps() local
102 return val * 10 / 256; /* in tenths of deg. C */ in max172xx_temperature_to_ps()
115 int val = (int16_t)(reg); in max172xx_current_to_voltage() local
117 return val * 156252; in max172xx_current_to_voltage()
129 union power_supply_propval *val) in max1721x_battery_get_property()
142 val->intval = in max1721x_battery_get_property()
148 val->intval = max172xx_percent_to_ps(reg); in max1721x_battery_get_property()
152 val->intval = max172xx_voltage_to_ps(reg); in max1721x_battery_get_property()
156 val->intval = max172xx_capacity_to_ps(reg); in max1721x_battery_get_property()
160 val in max1721x_battery_get_property()
127 max1721x_battery_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) max1721x_battery_get_property() argument
229 unsigned int val; get_string() local
247 unsigned int val[3]; get_sn_string() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-en7523.c156 u32 val; in en7523_get_base_rate() local
161 val = readl(base + desc->base_reg); in en7523_get_base_rate()
162 val >>= desc->base_shift; in en7523_get_base_rate()
163 val &= (1 << desc->base_bits) - 1; in en7523_get_base_rate()
165 if (val >= desc->n_base_values) in en7523_get_base_rate()
168 return desc->base_values[val]; in en7523_get_base_rate()
174 u32 reg, val; in en7523_get_div() local
180 val = readl(base + reg); in en7523_get_div()
181 val >>= desc->div_shift; in en7523_get_div()
182 val in en7523_get_div()
201 u32 val, mask; en7523_pci_prepare() local
240 u32 val; en7523_pci_unprepare() local
[all...]
/kernel/linux/linux-6.6/drivers/pci/controller/
H A Dpci-rcar-gen2.c109 int slot, val; in rcar_pci_cfg_base() local
123 val = slot ? RCAR_AHBPCI_WIN1_DEVICE | RCAR_AHBPCI_WIN_CTR_CFG : in rcar_pci_cfg_base()
126 iowrite32(val, priv->reg + RCAR_AHBPCI_WIN1_CTR_REG); in rcar_pci_cfg_base()
155 u32 val; in rcar_pci_setup_errirq() local
164 val = ioread32(priv->reg + RCAR_PCI_INT_ENABLE_REG); in rcar_pci_setup_errirq()
165 val |= RCAR_PCI_INT_ALLERRORS; in rcar_pci_setup_errirq()
166 iowrite32(val, priv->reg + RCAR_PCI_INT_ENABLE_REG); in rcar_pci_setup_errirq()
182 u32 val; in rcar_pci_setup() local
198 val = ioread32(reg + RCAR_PCI_UNIT_REV_REG); in rcar_pci_setup()
199 dev_info(dev, "PCI: revision %x\n", val); in rcar_pci_setup()
[all...]
/kernel/linux/linux-6.6/drivers/phy/samsung/
H A Dphy-exynos5250-sata.c89 u32 val = 0; in exynos_sata_phy_init() local
99 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
101 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
102 val |= RESET_GLOBAL_RST_N | RESET_CMN_RST_N | RESET_CMN_BLOCK_RST_N in exynos_sata_phy_init()
105 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
107 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
108 val |= LINK_RESET; in exynos_sata_phy_init()
109 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
111 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
112 val | in exynos_sata_phy_init()
[all...]
/kernel/linux/linux-6.6/arch/x86/kernel/cpu/mce/
H A Dintel.c166 u64 val; in cmci_toggle_interrupt_mode() local
171 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() local
174 val |= MCI_CTL2_CMCI_EN; in cmci_toggle_interrupt_mode()
176 val &= ~MCI_CTL2_CMCI_EN; in cmci_toggle_interrupt_mode()
178 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() local
283 u64 val; in cmci_discover() local
293 rdmsrl(MSR_IA32_MCx_CTL2(i), val); in cmci_discover() local
296 if (val & MCI_CTL2_CMCI_EN) { in cmci_discover()
303 val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK; in cmci_discover()
304 val | in cmci_discover()
316 wrmsrl(MSR_IA32_MCx_CTL2(i), val); cmci_discover() local
317 rdmsrl(MSR_IA32_MCx_CTL2(i), val); cmci_discover() local
365 u64 val; __cmci_disable_bank() local
371 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); __cmci_disable_bank() local
467 u64 val; intel_init_lmce() local
480 u64 val; intel_clear_lmce() local
[all...]
/kernel/linux/linux-6.6/drivers/hwmon/
H A Doxp-sensors.c140 static int read_from_ec(u8 reg, int size, long *val) in read_from_ec() argument
149 *val = 0; in read_from_ec()
154 *val <<= i * 8; in read_from_ec()
155 *val += buffer; in read_from_ec()
183 u8 val; in tt_toggle_enable() local
188 val = OXP_OLD_TURBO_TAKE_VAL; in tt_toggle_enable()
193 val = OXP_TURBO_TAKE_VAL; in tt_toggle_enable()
198 return write_to_ec(reg, val); in tt_toggle_enable()
204 u8 val; in tt_toggle_disable() local
209 val in tt_toggle_disable()
264 long val; tt_toggle_show() local
312 oxp_platform_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) oxp_platform_read() argument
359 oxp_platform_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) oxp_platform_write() argument
[all...]
/device/soc/rockchip/common/hardware/mpp/include/
H A Drk_venc_cfg.h31 MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, signed int val);
32 MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, unsigned int val);
33 MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
34 MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
35 MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
36 MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val);
38 MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, signed int *val);
39 MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, unsigned int *val);
40 MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
41 MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/device/backend/
H A Dmali_kbase_device_hw_jm.c55 void kbase_gpu_interrupt(struct kbase_device *kbdev, u32 val) in kbase_gpu_interrupt() argument
57 KBASE_KTRACE_ADD(kbdev, CORE_GPU_IRQ, NULL, val); in kbase_gpu_interrupt()
58 if (val & GPU_FAULT) { in kbase_gpu_interrupt()
59 kbase_report_gpu_fault(kbdev, val & MULTIPLE_GPU_FAULTS); in kbase_gpu_interrupt()
62 if (val & RESET_COMPLETED) { in kbase_gpu_interrupt()
66 if (val & PRFCNT_SAMPLE_COMPLETED) { in kbase_gpu_interrupt()
70 KBASE_KTRACE_ADD(kbdev, CORE_GPU_IRQ_CLEAR, NULL, val); in kbase_gpu_interrupt()
71 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val); in kbase_gpu_interrupt()
82 if (val & CLEAN_CACHES_COMPLETED) { in kbase_gpu_interrupt()
86 if (val in kbase_gpu_interrupt()
[all...]
/device/soc/rockchip/rk3399/hardware/mpp/include/
H A Drk_venc_cfg.h31 MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val);
32 MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val);
33 MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
34 MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
35 MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
36 MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val);
38 MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val);
39 MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val);
40 MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
41 MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
[all...]
/device/soc/rockchip/rk3568/hardware/mpp/include/
H A Drk_venc_cfg.h31 MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val);
32 MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val);
33 MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
34 MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
35 MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
36 MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val);
38 MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val);
39 MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val);
40 MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
41 MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
[all...]
/device/soc/rockchip/rk3588/hardware/mpp/include/
H A Drk_venc_cfg.h32 MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val);
33 MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val);
34 MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
35 MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
36 MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
37 MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val);
39 MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val);
40 MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val);
41 MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
42 MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
[all...]
/kernel/linux/linux-5.10/arch/powerpc/sysdev/
H A Dgrackle.c28 unsigned int val; in grackle_set_stg() local
31 val = in_le32(bp->cfg_data); in grackle_set_stg()
32 val = enable? (val | GRACKLE_PICR1_STG) : in grackle_set_stg()
33 (val & ~GRACKLE_PICR1_STG); in grackle_set_stg()
35 out_le32(bp->cfg_data, val); in grackle_set_stg()
41 unsigned int val; in grackle_set_loop_snoop() local
44 val = in_le32(bp->cfg_data); in grackle_set_loop_snoop()
45 val = enable? (val | GRACKLE_PICR1_LOOPSNOO in grackle_set_loop_snoop()
[all...]
/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dmsr-trace.h22 TP_PROTO(unsigned msr, u64 val, int failed),
23 TP_ARGS(msr, val, failed),
26 __field( u64, val )
31 __entry->val = val;
36 __entry->val,
41 TP_PROTO(unsigned msr, u64 val, int failed),
42 TP_ARGS(msr, val, failed)
46 TP_PROTO(unsigned msr, u64 val, int failed),
47 TP_ARGS(msr, val, faile
[all...]
H A Dqspinlock.h16 u32 val; in queued_fetch_set_pending_acquire() local
23 val = GEN_BINARY_RMWcc(LOCK_PREFIX "btsl", lock->val.counter, c, in queued_fetch_set_pending_acquire()
25 val |= atomic_read(&lock->val) & ~_Q_PENDING_MASK; in queued_fetch_set_pending_acquire()
27 return val; in queued_fetch_set_pending_acquire()
31 extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
33 extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
49 static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) in queued_spin_lock_slowpath() argument
51 pv_queued_spin_lock_slowpath(lock, val); in queued_spin_lock_slowpath()
[all...]
/kernel/linux/linux-5.10/tools/virtio/linux/
H A Dvirtio_config.h64 static inline u16 virtio16_to_cpu(struct virtio_device *vdev, __virtio16 val) in virtio16_to_cpu() argument
66 return __virtio16_to_cpu(virtio_is_little_endian(vdev), val); in virtio16_to_cpu()
69 static inline __virtio16 cpu_to_virtio16(struct virtio_device *vdev, u16 val) in cpu_to_virtio16() argument
71 return __cpu_to_virtio16(virtio_is_little_endian(vdev), val); in cpu_to_virtio16()
74 static inline u32 virtio32_to_cpu(struct virtio_device *vdev, __virtio32 val) in virtio32_to_cpu() argument
76 return __virtio32_to_cpu(virtio_is_little_endian(vdev), val); in virtio32_to_cpu()
79 static inline __virtio32 cpu_to_virtio32(struct virtio_device *vdev, u32 val) in cpu_to_virtio32() argument
81 return __cpu_to_virtio32(virtio_is_little_endian(vdev), val); in cpu_to_virtio32()
84 static inline u64 virtio64_to_cpu(struct virtio_device *vdev, __virtio64 val) in virtio64_to_cpu() argument
86 return __virtio64_to_cpu(virtio_is_little_endian(vdev), val); in virtio64_to_cpu()
89 cpu_to_virtio64(struct virtio_device *vdev, u64 val) cpu_to_virtio64() argument
[all...]

Completed in 13 milliseconds

1...<<31323334353637383940>>...851