Lines Matching refs:val
63 u32 val;
65 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
66 val |= SUNXI_PEC_EXTERN_VBUS;
67 val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN;
68 writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
70 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
71 val |= SUNXI_PCC_PIPE_CLK_OPEN;
72 writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
74 val = readl(phy->regs + SUNXI_ISCR);
75 val |= SUNXI_ISCR_FORCE_VBUS;
76 writel(val, phy->regs + SUNXI_ISCR);
85 val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
86 val &= ~(SUNXI_TXVBOOSTLVL_MASK | SUNXI_LOS_BIAS_MASK |
89 val |= SUNXI_TXVBOOSTLVL(0x7);
90 val |= SUNXI_LOS_BIAS(0x7);
91 val |= SUNXI_TX_SWING_FULL(0x55);
92 val |= SUNXI_TX_DEEMPH_6DB(0x20);
93 val |= SUNXI_TX_DEEMPH_3P5DB(0x15);
94 writel(val, phy->regs + SUNXI_PHY_TUNE_HIGH);