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/third_party/skia/third_party/externals/libpng/mips/
H A Dfilter_msa_intrinsics.c374 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; in png_read_filter_row_up_msa() local
378 LD_UB4(rp, 16, src0, src1, src2, src3); in png_read_filter_row_up_msa()
382 ADD4(src0, src4, src1, src5, src2, src6, src3, src7, in png_read_filter_row_up_msa()
383 src0, src1, src2, src3); in png_read_filter_row_up_msa()
385 ST_UB4(src0, src1, src2, src3, rp, 16); in png_read_filter_row_up_msa()
399 LD_UB4(rp, 16, src0, src1, src2, src3); in png_read_filter_row_up_msa()
402 ADD4(src0, src4, src1, src5, src2, src6, src3, src7, in png_read_filter_row_up_msa()
403 src0, src1, src2, src3); in png_read_filter_row_up_msa()
405 ST_UB4(src0, src1, src2, src3, rp, 16); in png_read_filter_row_up_msa()
410 LD_UB2(rp, 16, src0, src1); in png_read_filter_row_up_msa()
466 v16u8 src0, src1, src2, src3, src4; png_read_filter_row_sub4_msa() local
506 v16u8 src0, src1, src2, src3, src4, dst0, dst1; png_read_filter_row_sub3_msa() local
551 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; png_read_filter_row_avg4_msa() local
604 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; png_read_filter_row_avg3_msa() local
662 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; png_read_filter_row_paeth4_msa() local
735 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; png_read_filter_row_paeth3_msa() local
[all...]
/third_party/ffmpeg/libavcodec/loongarch/
H A Dh264chroma_lasx.c44 __m256i src0, src1, src2, src3, src4, out; in avc_chroma_hv_8x4_lasx() local
55 src1, src2, src3, src4); in avc_chroma_hv_8x4_lasx()
56 DUP2_ARG3(__lasx_xvpermi_q, src2, src1, 0x20, src4, src3, 0x20, src1, src3); in avc_chroma_hv_8x4_lasx()
58 DUP2_ARG3(__lasx_xvshuf_b, src1, src1, mask, src3, src3, mask, src1, src3); in avc_chroma_hv_8x4_lasx()
59 DUP2_ARG2(__lasx_xvdp2_h_bu, src0, coeff_hz_vec, src1, coeff_hz_vec, res_hz0, res_hz1); in avc_chroma_hv_8x4_lasx()
82 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; in avc_chroma_hv_8x8_lasx() local
95 src1, src in avc_chroma_hv_8x8_lasx()
135 __m256i src0, src1, src2, src3, out; avc_chroma_hz_8x4_lasx() local
163 __m256i src0, src1, src2, src3, src4, src5, src6, src7; avc_chroma_hz_8x8_lasx() local
204 __m256i src0, src1, src2, src3, out; avc_chroma_hz_nonmult_lasx() local
247 __m256i src0, src1, src2, src3, src4, out; avc_chroma_vt_8x4_lasx() local
275 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_8x8_lasx() local
394 __m256i src0, src1, src2; avc_chroma_hv_4x2_lasx() local
424 __m256i src0, src1, src2, src3, src4; avc_chroma_hv_4x4_lasx() local
456 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_hv_4x8_lasx() local
515 __m256i src0, src1; avc_chroma_hz_4x2_lasx() local
536 __m256i src0, src1, src2, src3; avc_chroma_hz_4x4_lasx() local
562 __m256i src0, src1, src2, src3, src4, src5, src6, src7; avc_chroma_hz_4x8_lasx() local
620 __m256i src0, src1, src2; avc_chroma_vt_4x2_lasx() local
644 __m256i src0, src1, src2, src3, src4; avc_chroma_vt_4x4_lasx() local
673 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_4x8_lasx() local
853 __m256i src0, src1, src2, src3, src4, out; avc_chroma_hv_and_aver_dst_8x4_lasx() local
897 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_hv_and_aver_dst_8x8_lasx() local
967 __m256i src0, src1, src2, src3, out; avc_chroma_hz_and_aver_dst_8x4_lasx() local
1001 __m256i src0, src1, src2, src3, src4, src5, src6, src7; avc_chroma_hz_and_aver_dst_8x8_lasx() local
1054 __m256i src0, src1, src2, src3, src4, out; avc_chroma_vt_and_aver_dst_8x4_lasx() local
1088 __m256i src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_and_aver_dst_8x8_lasx() local
1138 __m256i src0, src1, src2, src3; avg_width8x8_lasx() local
1190 __m256i src0, src1, src2, src3; avg_width8x4_lasx() local
[all...]
H A Dvp9_mc_lsx.c136 __m128i src0, src1, src2, src3; in common_hz_8t_4x4_lsx() local
148 LSX_LD_4(src, src_stride, src0, src1, src2, src3); in common_hz_8t_4x4_lsx()
149 DUP4_ARG2(__lsx_vxori_b, src0, 128, src1, 128, src2, 128, src3, 128, in common_hz_8t_4x4_lsx()
150 src0, src1, src2, src3); in common_hz_8t_4x4_lsx()
151 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, in common_hz_8t_4x4_lsx()
171 __m128i src0, src1, src2, src3; in common_hz_8t_4x8_lsx() local
184 DUP2_ARG2(__lsx_vldx, _src, src_stride, _src, src_stride2, src1, src2); in common_hz_8t_4x8_lsx()
187 DUP4_ARG2(__lsx_vxori_b, src0, 128, src1, 128, src2, 128, src3, 128, in common_hz_8t_4x8_lsx()
188 src0, src1, src2, src3); in common_hz_8t_4x8_lsx()
189 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src in common_hz_8t_4x8_lsx()
232 __m128i src0, src1, src2, src3; common_hz_8t_8x4_lsx() local
268 __m128i src0, src1, src2, src3; common_hz_8t_8x8mult_lsx() local
320 __m128i src0, src1, src2, src3; common_hz_8t_16w_lsx() local
355 __m128i src0, src1, src2, src3; common_hz_8t_32w_lsx() local
405 __m128i src0, src1, src2, src3; common_hz_8t_64w_lsx() local
455 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_4w_lsx() local
515 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_8w_lsx() local
587 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_16w_lsx() local
681 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_16w_mult_lsx() local
804 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_4w_lsx() local
892 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_8w_lsx() local
1044 __m128i src0, src1, src2, src3; copy_width8_lsx() local
1071 __m128i src0, src1, src2, src3; copy_width16_lsx() local
1108 __m128i src0, src1, src2, src3, src4, src5, src6, src7; copy_width32_lsx() local
1141 __m128i src0, src1, src2, src3, src4, src5, src6, src7; copy_width64_lsx() local
1186 __m128i src0, src1, src2, src3; common_hz_8t_and_aver_dst_4x4_lsx() local
1231 __m128i src0, src1, src2, src3, filter0, filter1, filter2, filter3; common_hz_8t_and_aver_dst_4x8_lsx() local
1318 __m128i src0, src1, src2, src3, filter0, filter1, filter2, filter3; common_hz_8t_and_aver_dst_8w_lsx() local
1374 __m128i src0, src1, src2, src3, filter0, filter1, filter2, filter3; common_hz_8t_and_aver_dst_16w_lsx() local
1431 __m128i src0, src1, src2, src3, filter0, filter1, filter2, filter3; common_hz_8t_and_aver_dst_32w_lsx() local
1487 __m128i src0, src1, src2, src3; common_hz_8t_and_aver_dst_64w_lsx() local
1541 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_4w_lsx() local
1617 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_8w_lsx() local
1703 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_16w_mult_lsx() local
1848 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_and_aver_dst_4w_lsx() local
1951 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_and_aver_dst_8w_lsx() local
2126 __m128i src0, src1, dst0, dst1; avg_width8_lsx() local
2165 __m128i src0, src1, src2, src3; avg_width16_lsx() local
2203 __m128i src0, src1, src2, src3, src4, src5, src6, src7; avg_width32_lsx() local
2259 __m128i src0, src1, src2, src3, src4, src5, src6, src7; avg_width64_lsx() local
[all...]
H A Dvp9_intra_lsx.c89 __m128i src0, src1; in ff_vert_32x32_lsx() local
91 DUP2_ARG2(__lsx_vld, src, 0, src, 16, src0, src1); in ff_vert_32x32_lsx()
94 __lsx_vst(src1, dst, 16); in ff_vert_32x32_lsx()
102 __m128i src0, src1, src2, src3, src4, src5, src6, src7; in ff_hor_16x16_lsx() local
122 src1 = __lsx_vldrepl_b(src, 14); in ff_hor_16x16_lsx()
124 LSX_ST_8(src0, src1, src2, src3, src4, src5, src6, src7, dst, in ff_hor_16x16_lsx()
134 __m128i src0, src1, src2, src3, src4, src5, src6, src7; in ff_hor_32x32_lsx() local
169 src1 = __lsx_vldrepl_b(src, 30); in ff_hor_32x32_lsx()
171 LSX_ST_8X16(src0, src1, src2, src3, src4, src5, src6, src7, in ff_hor_32x32_lsx()
436 __m128i src0, src1, src in ff_tm_4x4_lsx() local
466 __m128i src0, src1, src2, src3, src4, src5, src6, src7; ff_tm_8x8_lsx() local
516 __m128i src0, src1, src2, src3, src4, src5, src6, src7; ff_tm_16x16_lsx() local
601 __m128i src0, src1, src2, src3, src4, src5, src6, src7; ff_tm_32x32_lsx() local
[all...]
H A Dvp8_mc_lsx.c62 #define HORIZ_6TAP_FILT(src0, src1, mask0, mask1, mask2, \
68 VSHF_B3_SB(src0, src1, src0, src1, src0, src1, mask0, mask1, mask2, \
79 #define HORIZ_6TAP_8WID_4VECS_FILT(src0, src1, src2, src3, \
86 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask0, src1, src1, mask0, src2, src2, \
90 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask1, src1, src1, mask1, src2, src2, \
92 DUP4_ARG3(__lsx_vshuf_b, src0, src0, mask2, src1, src
130 __m128i src0, src1, src2, src3, filt0, filt1, filt2; ff_put_vp8_epel8_h6_lsx() local
195 __m128i src0, src1, src2, src3, src4, src5, src6, src7, filt0, filt1; ff_put_vp8_epel16_h6_lsx() local
249 __m128i src0, src1, src2, src3, src4, src7, src8, src9, src10; ff_put_vp8_epel8_v6_lsx() local
316 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel16_v6_lsx() local
398 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel8_h6v6_lsx() local
512 __m128i src0, src1, src2, src7, src8, src9, src10; ff_put_vp8_epel8_v4_lsx() local
569 __m128i src0, src1, src2, src3, src4, src5, src6; ff_put_vp8_epel16_v4_lsx() local
640 __m128i src0, src1, src2, src3, src4, src5, src6; ff_put_vp8_epel8_h6v4_lsx() local
737 __m128i src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel8_h4v6_lsx() local
839 __m128i src0, src1, src2, src3; ff_put_vp8_pixels8_lsx() local
898 __m128i src0, src1, src2, src3, src4, src5, src6, src7; ff_put_vp8_pixels16_lsx() local
[all...]
/third_party/node/deps/v8/src/codegen/x64/
H A Dassembler-x64.h934 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
936 void vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,
940 void vinstr(byte op, Reg1 dst, Reg2 src1, Op src2, SIMDPrefix pp,
993 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
994 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
996 void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) { \
997 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1002 void v##instruction(YMMRegister dst, YMMRegister src1, YMMRegister src2) { \
1003 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX); \
1005 void v##instruction(YMMRegister dst, YMMRegister src1, Operan
1172 vpblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vpblendvb() argument
1178 vpblendvb(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vpblendvb() argument
1185 vblendvps(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvps() argument
1191 vblendvps(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vblendvps() argument
1198 vblendvpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvpd() argument
1204 vblendvpd(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vblendvpd() argument
1395 vmovsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovsd() argument
1482 vmovlhps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovlhps() argument
1485 vmovhlps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovhlps() argument
1494 vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Register src2) vcvtlsi2sd() argument
1498 vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) vcvtlsi2sd() argument
1501 vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Register src2) vcvtlsi2ss() argument
1505 vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) vcvtlsi2ss() argument
1508 vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Register src2) vcvtqsi2ss() argument
1512 vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) vcvtqsi2ss() argument
1515 vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Register src2) vcvtqsi2sd() argument
1519 vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) vcvtqsi2sd() argument
1558 vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundss() argument
1563 vroundss(XMMRegister dst, XMMRegister src1, Operand src2, RoundingMode mode) vroundss() argument
1568 vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundsd() argument
1573 vroundsd(XMMRegister dst, XMMRegister src1, Operand src2, RoundingMode mode) vroundsd() argument
1596 vsd(byte op, Reg dst, Reg src1, Op src2) vsd() argument
1600 vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovss() argument
1610 vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufps() argument
1613 vshufps(YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vshufps() argument
1650 vcmpps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) vcmpps() argument
1654 vcmpps(YMMRegister dst, YMMRegister src1, YMMRegister src2, int8_t cmp) vcmpps() argument
1658 vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) vcmpps() argument
1662 vcmpps(YMMRegister dst, YMMRegister src1, Operand src2, int8_t cmp) vcmpps() argument
1666 vcmppd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) vcmppd() argument
1670 vcmppd(YMMRegister dst, YMMRegister src1, YMMRegister src2, int8_t cmp) vcmppd() argument
1674 vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) vcmppd() argument
1678 vcmppd(YMMRegister dst, YMMRegister src1, Operand src2, int8_t cmp) vcmppd() argument
1718 vinsertps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vinsertps() argument
1723 vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vinsertps() argument
1732 vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrb() argument
1737 vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrb() argument
1741 vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrw() argument
1746 vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrw() argument
1750 vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrd() argument
1755 vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrd() argument
1759 vpinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrq() argument
1764 vpinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrq() argument
1818 vpblendw(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t mask) vpblendw() argument
1823 vpblendw(YMMRegister dst, YMMRegister src1, YMMRegister src2, uint8_t mask) vpblendw() argument
1828 vpblendw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument
1832 vpblendw(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument
1837 vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t imm8) vpalignr() argument
1842 vpalignr(YMMRegister dst, YMMRegister src1, YMMRegister src2, uint8_t imm8) vpalignr() argument
1847 vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument
1851 vpalignr(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument
1880 andnq(Register dst, Register src1, Register src2) andnq() argument
1883 andnq(Register dst, Register src1, Operand src2) andnq() argument
1886 andnl(Register dst, Register src1, Register src2) andnl() argument
1889 andnl(Register dst, Register src1, Operand src2) andnl() argument
1892 bextrq(Register dst, Register src1, Register src2) bextrq() argument
1895 bextrq(Register dst, Operand src1, Register src2) bextrq() argument
1898 bextrl(Register dst, Register src1, Register src2) bextrl() argument
1901 bextrl(Register dst, Operand src1, Register src2) bextrl() argument
1931 bzhiq(Register dst, Register src1, Register src2) bzhiq() argument
1934 bzhiq(Register dst, Operand src1, Register src2) bzhiq() argument
1937 bzhil(Register dst, Register src1, Register src2) bzhil() argument
1940 bzhil(Register dst, Operand src1, Register src2) bzhil() argument
1955 pdepq(Register dst, Register src1, Register src2) pdepq() argument
1958 pdepq(Register dst, Register src1, Operand src2) pdepq() argument
1961 pdepl(Register dst, Register src1, Register src2) pdepl() argument
1964 pdepl(Register dst, Register src1, Operand src2) pdepl() argument
1967 pextq(Register dst, Register src1, Register src2) pextq() argument
1970 pextq(Register dst, Register src1, Operand src2) pextq() argument
1973 pextl(Register dst, Register src1, Register src2) pextl() argument
1976 pextl(Register dst, Register src1, Operand src2) pextl() argument
1979 sarxq(Register dst, Register src1, Register src2) sarxq() argument
1982 sarxq(Register dst, Operand src1, Register src2) sarxq() argument
1985 sarxl(Register dst, Register src1, Register src2) sarxl() argument
1988 sarxl(Register dst, Operand src1, Register src2) sarxl() argument
1991 shlxq(Register dst, Register src1, Register src2) shlxq() argument
1994 shlxq(Register dst, Operand src1, Register src2) shlxq() argument
1997 shlxl(Register dst, Register src1, Register src2) shlxl() argument
2000 shlxl(Register dst, Operand src1, Register src2) shlxl() argument
2003 shrxq(Register dst, Register src1, Register src2) shrxq() argument
2006 shrxq(Register dst, Operand src1, Register src2) shrxq() argument
2009 shrxl(Register dst, Register src1, Register src2) shrxl() argument
2012 shrxl(Register dst, Operand src1, Register src2) shrxl() argument
[all...]
/third_party/ffmpeg/libavutil/x86/
H A Dpixelutils_init.c24 int ff_pixelutils_sad_8x8_mmxext(const uint8_t *src1, ptrdiff_t stride1,
27 int ff_pixelutils_sad_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
29 int ff_pixelutils_sad_a_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
31 int ff_pixelutils_sad_u_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
34 int ff_pixelutils_sad_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
36 int ff_pixelutils_sad_a_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
38 int ff_pixelutils_sad_u_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
41 int ff_pixelutils_sad_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
43 int ff_pixelutils_sad_a_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
45 int ff_pixelutils_sad_u_32x32_avx2(const uint8_t *src1, ptrdiff_
[all...]
H A Dfloat_dsp_init.c27 void ff_vector_fmul_sse(float *dst, const float *src0, const float *src1,
29 void ff_vector_fmul_avx(float *dst, const float *src0, const float *src1,
32 void ff_vector_dmul_sse2(double *dst, const double *src0, const double *src1,
34 void ff_vector_dmul_avx(double *dst, const double *src0, const double *src1,
60 const float *src1, const float *win, int len);
62 void ff_vector_fmul_add_sse(float *dst, const float *src0, const float *src1,
64 void ff_vector_fmul_add_avx(float *dst, const float *src0, const float *src1,
66 void ff_vector_fmul_add_fma3(float *dst, const float *src0, const float *src1,
70 const float *src1, int len);
72 const float *src1, in
[all...]
/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Dlossless_msa.c25 v16u8 src0, src1, src2, src3, dst0, dst1, dst2; \
26 LD_UB4(psrc, 16, src0, src1, src2, src3); \
27 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \
35 v16u8 src0, src1, src2, dst0, dst1, dst2; \
36 LD_UB3(psrc, 16, src0, src1, src2); \
37 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \
46 v16u8 src0, src1, src2 = { 0 }, dst0, dst1; \
47 LD_UB2(psrc, 16, src0, src1); \
121 v16u8 src1, dst1; ConvertBGRAToRGBA_MSA() local
257 v16u8 src1, dst1, tmp1; AddGreenToBlueAndRed_MSA() local
302 v16u8 src1, dst1; TransformColorInverse_MSA() local
[all...]
H A Dlossless_enc_msa.c21 #define TRANSFORM_COLOR_8(src0, src1, dst0, dst1, c0, c1, mask0, mask1) do { \
24 VSHF_B2_SH(src0, src0, src1, src1, mask0, mask0, g0, g1); \
28 t1 = __msa_subv_h((v8i16)src1, t1); \
30 t5 = __msa_srli_w((v4i32)src1, 16); \
34 VSHF_B2_UB(src0, t0, src1, t1, mask1, mask1, dst0, dst1); \
63 v16u8 src1, dst1; in TransformColor_MSA() local
64 LD_UB2(data, 4, src0, src1); in TransformColor_MSA()
65 TRANSFORM_COLOR_8(src0, src1, dst0, dst1, g2br, r2b, mask0, mask1); in TransformColor_MSA()
106 v16u8 src1, dst in SubtractGreenFromBlueAndRed_MSA() local
[all...]
/third_party/ffmpeg/libavcodec/mips/
H A Dme_cmp_msa.c29 v16u8 src0, src1, src2, src3, ref0, ref1, ref2, ref3; in sad_8width_msa() local
33 LD_UB4(src, src_stride, src0, src1, src2, src3); in sad_8width_msa()
38 PCKEV_D4_UB(src1, src0, src3, src2, ref1, ref0, ref3, ref2, in sad_8width_msa()
39 src0, src1, ref0, ref1); in sad_8width_msa()
40 sad += SAD_UB2_UH(src0, src1, ref0, ref1); in sad_8width_msa()
51 v16u8 src0, src1, ref0, ref1; in sad_16width_msa() local
55 LD_UB2(src, src_stride, src0, src1); in sad_16width_msa()
59 sad += SAD_UB2_UH(src0, src1, ref0, ref1); in sad_16width_msa()
61 LD_UB2(src, src_stride, src0, src1); in sad_16width_msa()
65 sad += SAD_UB2_UH(src0, src1, ref in sad_16width_msa()
78 v16u8 src0, src1, src2, src3, comp0, comp1; sad_horiz_bilinear_filter_8width_msa() local
120 v16u8 src0, src1, src2, src3, comp0, comp1; sad_horiz_bilinear_filter_16width_msa() local
158 v16u8 src0, src1, src2, src3, comp0, comp1; sad_vert_bilinear_filter_8width_msa() local
196 v16u8 src0, src1, src2, src3, comp0, comp1; sad_vert_bilinear_filter_16width_msa() local
234 v16u8 src0, src1, src2, src3, temp0, temp1, diff; sad_hv_bilinear_filter_8width_msa() local
290 v16u8 src0, src1, src2, src3, comp, diff; sad_hv_bilinear_filter_16width_msa() local
412 uint32_t src0, src1, src2, src3; sse_4width_msa() local
440 v16u8 src0, src1, src2, src3; sse_8width_msa() local
504 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; hadamard_diff_8x8_msa() local
550 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; hadamard_intra_8x8_msa() local
[all...]
H A Dvp8_mc_msa.c54 #define HORIZ_6TAP_FILT(src0, src1, mask0, mask1, mask2, \
60 VSHF_B3_SB(src0, src1, src0, src1, src0, src1, mask0, mask1, mask2, \
71 #define HORIZ_6TAP_4WID_4VECS_FILT(src0, src1, src2, src3, \
78 VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \
80 VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \
82 VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \
86 #define HORIZ_6TAP_8WID_4VECS_FILT(src0, src1, src2, src3, \
93 VSHF_B2_SB(src0, src0, src1, src
163 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; common_hz_6t_4x4_msa() local
191 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; common_hz_6t_4x8_msa() local
241 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; ff_put_vp8_epel8_h6_msa() local
289 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, filt0, filt1, filt2; ff_put_vp8_epel16_h6_msa() local
338 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel4_v6_msa() local
385 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10; ff_put_vp8_epel8_v6_msa() local
435 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel16_v6_msa() local
510 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel4_h6v6_msa() local
585 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel8_h6v6_msa() local
684 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; common_hz_4t_4x4_msa() local
711 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; common_hz_4t_4x8_msa() local
746 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; common_hz_4t_4x16_msa() local
813 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; ff_put_vp8_epel8_h4_msa() local
848 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; ff_put_vp8_epel16_h4_msa() local
897 v16i8 src0, src1, src2, src3, src4, src5; ff_put_vp8_epel4_v4_msa() local
944 v16i8 src0, src1, src2, src7, src8, src9, src10; ff_put_vp8_epel8_v4_msa() local
990 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_put_vp8_epel16_v4_msa() local
1050 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; ff_put_vp8_epel4_h4v4_msa() local
1109 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; ff_put_vp8_epel8_h4v4_msa() local
1191 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_put_vp8_epel4_h6v4_msa() local
1257 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_put_vp8_epel8_h6v4_msa() local
1345 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel4_h4v6_msa() local
1409 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_vp8_epel8_h4v6_msa() local
1496 v16i8 src0, src1, src2, src3, mask; common_hz_2t_4x4_msa() local
1520 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; common_hz_2t_4x8_msa() local
1562 v16i8 src0, src1, src2, src3, mask; common_hz_2t_8x4_msa() local
1586 v16i8 src0, src1, src2, src3, mask, out0, out1; common_hz_2t_8x8mult_msa() local
1664 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_vp8_bilinear16_h_msa() local
1729 v16i8 src0, src1, src2, src3, src4; common_vt_2t_4x4_msa() local
1755 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; common_vt_2t_4x8_msa() local
1802 v16u8 src0, src1, src2, src3, src4, vec0, vec1, vec2, vec3, filt0; common_vt_2t_8x4_msa() local
1827 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; common_vt_2t_8x8mult_msa() local
1887 v16u8 src0, src1, src2, src3, src4; ff_put_vp8_bilinear16_v_msa() local
1940 v16i8 src0, src1, src2, src3, src4, mask; common_hv_2ht_2vt_4x4_msa() local
1974 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; common_hv_2ht_2vt_4x8_msa() local
2037 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; common_hv_2ht_2vt_8x4_msa() local
2083 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; common_hv_2ht_2vt_8x8mult_msa() local
2179 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_vp8_bilinear16_hv_msa() local
2249 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; ff_put_vp8_pixels8_msa() local
2292 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; copy_16multx8mult_msa() local
2318 v16u8 src0, src1, src2, src3; ff_put_vp8_pixels16_msa() local
[all...]
H A Dh264chroma_msa.c36 v16i8 src0, src1; in avc_chroma_hz_2x2_msa() local
46 LD_SB2(src, stride, src0, src1); in avc_chroma_hz_2x2_msa()
48 src0 = __msa_vshf_b(mask, src1, src0); in avc_chroma_hz_2x2_msa()
66 v16u8 src0, src1, src2, src3; in avc_chroma_hz_2x4_msa() local
76 LD_UB4(src, stride, src0, src1, src2, src3); in avc_chroma_hz_2x4_msa()
78 VSHF_B2_UB(src0, src1, src2, src3, mask, mask, src0, src2); in avc_chroma_hz_2x4_msa()
105 v16i8 src0, src1; in avc_chroma_hz_4x2_msa() local
115 LD_SB2(src, stride, src0, src1); in avc_chroma_hz_4x2_msa()
117 src0 = __msa_vshf_b(mask, src1, src0); in avc_chroma_hz_4x2_msa()
130 v16u8 src0, src1, src in avc_chroma_hz_4x4_msa() local
153 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, out0, out1; avc_chroma_hz_4x8_msa() local
190 v16u8 src0, src1, src2, src3, out0, out1; avc_chroma_hz_8x4_msa() local
213 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; avc_chroma_hz_8x8_msa() local
248 v16u8 src0, src1, src2, src3, out0, out1; avc_chroma_hz_nonmult_msa() local
309 v16i8 src0, src1, src2; avc_chroma_vt_2x2_msa() local
340 v16u8 src0, src1, src2, src3, src4; avc_chroma_vt_2x4_msa() local
379 v16u8 src0, src1, src2; avc_chroma_vt_4x2_msa() local
403 v16u8 src0, src1, src2, src3, src4; avc_chroma_vt_4x4_msa() local
427 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_4x8_msa() local
468 v16u8 src0, src1, src2, src3, src4, out0, out1; avc_chroma_vt_8x4_msa() local
489 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_8x8_msa() local
534 v16u8 src0, src1, src2; avc_chroma_hv_2x2_msa() local
568 v16u8 src0, src1, src2, src3, src4; avc_chroma_hv_2x4_msa() local
616 v16u8 src0, src1, src2; avc_chroma_hv_4x2_msa() local
644 v16u8 src0, src1, src2, src3, src4; avc_chroma_hv_4x4_msa() local
677 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, res0, res1; avc_chroma_hv_4x8_msa() local
734 v16u8 src0, src1, src2, src3, src4, out0, out1; avc_chroma_hv_8x4_msa() local
777 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_hv_8x8_msa() local
848 v16i8 src0, src1; avc_chroma_hz_and_aver_dst_2x2_msa() local
890 v16u8 src0, src1, src2, src3; avc_chroma_hz_and_aver_dst_2x4_msa() local
941 v16i8 src0, src1; avc_chroma_hz_and_aver_dst_4x2_msa() local
974 v16u8 src0, src1, src2, src3; avc_chroma_hz_and_aver_dst_4x4_msa() local
1003 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, out0, out1; avc_chroma_hz_and_aver_dst_4x8_msa() local
1048 v16u8 src0, src1, src2, src3, out0, out1; avc_chroma_hz_and_aver_dst_8x4_msa() local
1078 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; avc_chroma_hz_and_aver_dst_8x8_msa() local
1133 v16i8 src0, src1, src2, tmp0, tmp1, res; avc_chroma_vt_and_aver_dst_2x2_msa() local
1170 v16i8 src0, src1, src2, src3, src4; avc_chroma_vt_and_aver_dst_2x4_msa() local
1223 v16u8 src0, src1, src2, tmp0, tmp1; avc_chroma_vt_and_aver_dst_4x2_msa() local
1255 v16u8 src0, src1, src2, src3, src4; avc_chroma_vt_and_aver_dst_4x4_msa() local
1285 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_and_aver_dst_4x8_msa() local
1334 v16u8 src0, src1, src2, src3, src4; avc_chroma_vt_and_aver_dst_8x4_msa() local
1363 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_vt_and_aver_dst_8x8_msa() local
1421 v16u8 src0, src1, src2; avc_chroma_hv_and_aver_dst_2x2_msa() local
1462 v16u8 src0, src1, src2, src3, src4; avc_chroma_hv_and_aver_dst_2x4_msa() local
1524 v16u8 src0, src1, src2; avc_chroma_hv_and_aver_dst_4x2_msa() local
1560 v16u8 src0, src1, src2, src3, src4; avc_chroma_hv_and_aver_dst_4x4_msa() local
1599 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, res0, res1; avc_chroma_hv_and_aver_dst_4x8_msa() local
1668 v16u8 src0, src1, src2, src3, src4, out0, out1; avc_chroma_hv_and_aver_dst_8x4_msa() local
1716 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; avc_chroma_hv_and_aver_dst_8x8_msa() local
1820 uint64_t src0, src1, src2, src3, src4, src5, src6, src7; copy_width8_msa() local
1839 v16u8 src0 = { 0 }, src1 = { 0 }, dst0 = { 0 }, dst1 = { 0 }; avg_width4_msa() local
1874 v16u8 src0 = { 0 }, src1 = { 0 }, src2 = { 0 }, src3 = { 0 }; avg_width8_msa() local
[all...]
/third_party/optimized-routines/string/aarch64/
H A Dstrcmp-mte.S20 #define src1 x0 define
56 sub off2, src2, src1
58 and tmp, src1, 7
66 ldr data2, [src1, off2]
67 ldr data1, [src1], 8
110 bic src1, src1, 7
111 ldr data2, [src1, off2]
112 ldr data1, [src1], 8
125 ldrb data1w, [src1],
[all...]
H A Dmemcmp.S15 #define src1 x0 define
37 ldr data1, [src1], 8
45 ldr data1, [src1, limit]
50 ldr data1, [src1], 8
65 /* Align src1 and adjust src2 with bytes not yet done. */
66 and tmp1, src1, 15
68 sub src1, src1, tmp1
71 /* Loop performing 16 bytes per iteration using aligned src1.
76 ldp data1, data1h, [src1], 1
[all...]
/third_party/ffmpeg/libavcodec/
H A Dcavsdsp.c302 const int src1= src[1 *srcStride];\
312 OP(dst[0*dstStride], A*srcB + B*srcA + C*src0 + D*src1 + E*src2 + F*src3);\
313 OP(dst[1*dstStride], A*srcA + B*src0 + C*src1 + D*src2 + E*src3 + F*src4);\
314 OP(dst[2*dstStride], A*src0 + B*src1 + C*src2 + D*src3 + E*src4 + F*src5);\
315 OP(dst[3*dstStride], A*src1 + B*src2 + C*src3 + D*src4 + E*src5 + F*src6);\
346 static void OPNAME ## cavs_filt8_hv_ ## NAME(uint8_t *dst, const uint8_t *src1, const uint8_t *src2, ptrdiff_t dstStride, ptrdiff_t srcStride)\
354 src1 -= 2*srcStride;\
357 tmp[0]= AH*src1[-2] + BH*src1[-1] + CH*src1[
[all...]
H A Dqpel_template.c30 const uint8_t *src1, \
41 a = AV_RN32(&src1[i * src_stride1]); \
45 a = AV_RN32(&src1[i * src_stride1 + 4]); \
53 const uint8_t *src1, \
60 OPNAME ## _no_rnd_pixels8_l2_8(dst, src1, src2, dst_stride, \
63 src1 + 8, \
70 const uint8_t *src1, \
86 a = AV_RN32(&src1[i * src_stride1]); \
101 a = AV_RN32(&src1[i * src_stride1 + 4]); \
120 const uint8_t *src1, \
[all...]
/third_party/skia/third_party/externals/angle2/src/image_util/
H A Dimageformats.h30 static void average(L8 *dst, const L8 *src1, const L8 *src2);
41 static void average(R8 *dst, const R8 *src1, const R8 *src2);
50 static void average(A8 *dst, const A8 *src1, const A8 *src2);
60 static void average(L8A8 *dst, const L8A8 *src1, const L8A8 *src2);
70 static void average(A8L8 *dst, const A8L8 *src1, const A8L8 *src2);
82 static void average(R8G8 *dst, const R8G8 *src1, const R8G8 *src2);
95 static void average(R8G8B8 *dst, const R8G8B8 *src1, const R8G8B8 *src2);
108 static void average(B8G8R8 *dst, const B8G8R8 *src1, const B8G8R8 *src2);
120 static void average(R5G6B5 *dst, const R5G6B5 *src1, const R5G6B5 *src2);
129 static void average(B5G6R5 *dst, const B5G6R5 *src1, cons
[all...]
/third_party/skia/third_party/externals/swiftshader/src/Shader/
H A DPixelProgram.hpp86 void M3X2(Vector4f &dst, Vector4f &src0, const Src &src1);
87 void M3X3(Vector4f &dst, Vector4f &src0, const Src &src1);
88 void M3X4(Vector4f &dst, Vector4f &src0, const Src &src1);
89 void M4X3(Vector4f &dst, Vector4f &src0, const Src &src1);
90 void M4X4(Vector4f &dst, Vector4f &src0, const Src &src1);
91 void TEX(Vector4f &dst, Vector4f &src0, const Src &src1, bool project, bool bias);
92 void TEXLOD(Vector4f &dst, Vector4f &src0, const Src &src1, Float4 &lod);
93 void TEXBIAS(Vector4f &dst, Vector4f &src0, const Src &src1, Float4 &bias);
94 void TEXSIZE(Vector4f &dst, Float4 &lod, const Src &src1);
96 void TEXOFFSET(Vector4f &dst, Vector4f &src0, const Src &src1, Vector4
[all...]
/third_party/mesa3d/src/freedreno/afuc/
H A Demu.c51 emu_alu(struct emu *emu, afuc_opc opc, uint32_t src1, uint32_t src2) in emu_alu() argument
56 tmp = (uint64_t)src1 + (uint64_t)src2; in emu_alu()
60 return src1 + src2 + emu->carry; in emu_alu()
62 tmp = (uint64_t)src1 - (uint64_t)src2; in emu_alu()
66 return src1 - src2 + emu->carry; in emu_alu()
68 return src1 & src2; in emu_alu()
70 return src1 | src2; in emu_alu()
72 return src1 ^ src2; in emu_alu()
74 return ~src1; in emu_alu()
76 return src1 << src in emu_alu()
189 uint32_t src1 = emu_get_gpr_reg(emu, instr->control.src1); emu_instr() local
[all...]
/third_party/vixl/src/aarch64/
H A Dlogic-aarch64.cc509 const LogicVRegister& src1, in cmp()
514 int64_t sa = src1.Int(vform, i); in cmp()
516 uint64_t ua = src1.Uint(vform, i); in cmp()
553 const LogicVRegister& src1, in cmp()
558 return cmp(vform, dst, src1, imm_reg, cond); in cmp()
564 const LogicVRegister& src1, in cmptst()
568 uint64_t ua = src1.Uint(vform, i); in cmptst()
578 const LogicVRegister& src1, in add()
585 uint64_t ua = src1.UintLeftJustified(vform, i); in add()
608 const LogicVRegister& src1, in add_uint()
507 cmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) cmp() argument
551 cmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, int imm, Condition cond) cmp() argument
562 cmptst(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) cmptst() argument
576 add(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) add() argument
606 add_uint(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, uint64_t value) add_uint() argument
635 addp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) addp() argument
649 sdiv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sdiv() argument
671 udiv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) udiv() argument
691 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& srca, const LogicVRegister& src1, const LogicVRegister& src2) mla() argument
703 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& srca, const LogicVRegister& src1, const LogicVRegister& src2) mls() argument
715 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) mul() argument
728 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mul() argument
739 smulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smulh() argument
770 umulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umulh() argument
801 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mla() argument
812 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mls() argument
822 sqdmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmull() argument
833 sqdmlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlal() argument
844 sqdmlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlsl() argument
855 sqdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmulh() argument
866 sqrdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqrdmulh() argument
877 sqrdmlah(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqrdmlah() argument
888 sqrdmlsh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqrdmlsh() argument
915 pmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmul() argument
931 pmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmull() argument
950 pmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmull2() argument
968 sub(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sub() argument
998 sub_uint(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, uint64_t value) sub_uint() argument
1027 and_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) and_() argument
1039 orr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) orr() argument
1051 orn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) orn() argument
1063 eor(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) eor() argument
1075 bic(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bic() argument
1104 bif(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bif() argument
1120 bit(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bit() argument
1136 bsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src_mask, const LogicVRegister& src1, const LogicVRegister& src2) bsl() argument
1153 sminmax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) sminmax() argument
1174 smax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smax() argument
1182 smin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smin() argument
1190 sminmaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) sminmaxp() argument
1221 smaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smaxp() argument
1229 sminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sminp() argument
1359 uminmax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) uminmax() argument
1380 umax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umax() argument
1388 umin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umin() argument
1396 uminmaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) uminmaxp() argument
1427 umaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umaxp() argument
1435 uminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uminp() argument
1605 splice(VectorFormat vform, LogicVRegister dst, const LogicPRegister& pg, const LogicVRegister& src1, const LogicVRegister& src2) splice() argument
[all...]
/third_party/node/deps/v8/src/codegen/s390/
H A Dmacro-assembler-s390.h232 void AddS32(Register dst, Register src1, Register src2);
233 void AddS64(Register dst, Register src1, Register src2);
244 void AddU32(Register dst, Register src1, Register src2);
249 void AddU64(Register dst, Register src1, Register src2);
266 void SubS32(Register dst, Register src1, Register src2);
267 void SubS64(Register dst, Register src1, Register src2);
279 void SubU32(Register dst, Register src1, Register src2);
285 void MulS64(Register dst, Register src1, Register src2) { in MulS64() argument
287 msgrkc(dst, src1, src2); in MulS64()
290 MulS64(dst, src1); in MulS64()
303 MulS32(Register dst, Register src1, Register src2) MulS32() argument
364 CmpP(Register src1, T src2) CmpP() argument
617 Push(Register src1, Register src2) Push() argument
624 Push(Register src1, Register src2, Register src3) Push() argument
632 Push(Register src1, Register src2, Register src3, Register src4) Push() argument
641 Push(Register src1, Register src2, Register src3, Register src4, Register src5) Push() argument
669 Pop(Register src1, Register src2) Pop() argument
676 Pop(Register src1, Register src2, Register src3) Pop() argument
684 Pop(Register src1, Register src2, Register src3, Register src4) Pop() argument
693 Pop(Register src1, Register src2, Register src3, Register src4, Register src5) Pop() argument
1570 CompareTagged(Register src1, T src2) CompareTagged() argument
[all...]
/third_party/mesa3d/src/intel/common/
H A Dmi_builder.h755 struct mi_value src0, struct mi_value src1, in mi_math_binop()
762 dw[1] = _mi_math_load_src(b, MI_ALU_SRCB, &src1); in mi_math_binop()
768 mi_value_unref(b, src1); in mi_math_binop()
795 mi_iadd(struct mi_builder *b, struct mi_value src0, struct mi_value src1) in mi_iadd() argument
797 if (src0.type == MI_VALUE_TYPE_IMM && src1.type == MI_VALUE_TYPE_IMM) in mi_iadd()
798 return mi_imm(mi_value_to_u64(src0) + mi_value_to_u64(src1)); in mi_iadd()
800 return mi_math_binop(b, MI_ALU_ADD, src0, src1, in mi_iadd()
815 mi_isub(struct mi_builder *b, struct mi_value src0, struct mi_value src1) in mi_isub() argument
817 if (src0.type == MI_VALUE_TYPE_IMM && src1.type == MI_VALUE_TYPE_IMM) in mi_isub()
818 return mi_imm(mi_value_to_u64(src0) - mi_value_to_u64(src1)); in mi_isub()
754 mi_math_binop(struct mi_builder *b, uint32_t opcode, struct mi_value src0, struct mi_value src1, uint32_t store_op, uint32_t store_src) mi_math_binop() argument
825 mi_ieq(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ieq() argument
836 mi_ine(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ine() argument
847 mi_ult(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ult() argument
858 mi_uge(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_uge() argument
869 mi_iand(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_iand() argument
899 mi_ior(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ior() argument
911 mi_ishl(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ishl() argument
926 mi_ushr(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ushr() argument
965 mi_ishr(struct mi_builder *b, struct mi_value src0, struct mi_value src1) mi_ishr() argument
[all...]
/third_party/node/deps/v8/src/codegen/arm/
H A Dmacro-assembler-arm.h98 void Push(Register src1, Register src2, Condition cond = al) { in Push() argument
99 if (src1.code() > src2.code()) { in Push()
100 stm(db_w, sp, {src1, src2}, cond); in Push()
102 str(src1, MemOperand(sp, 4, NegPreIndex), cond); in Push()
108 void Push(Register src1, Register src2, Register src3, Condition cond = al) { in Push() argument
109 if (src1.code() > src2.code()) { in Push()
111 stm(db_w, sp, {src1, src2, src3}, cond); in Push()
113 stm(db_w, sp, {src1, src2}, cond); in Push()
117 str(src1, MemOperand(sp, 4, NegPreIndex), cond); in Push()
123 void Push(Register src1, Registe argument
144 Push(Register src1, Register src2, Register src3, Register src4, Register src5, Condition cond = al) Push() argument
178 Pop(Register src1, Register src2, Condition cond = al) Pop() argument
189 Pop(Register src1, Register src2, Register src3, Condition cond = al) Pop() argument
205 Pop(Register src1, Register src2, Register src3, Register src4, Condition cond = al) Pop() argument
[all...]
/third_party/node/deps/v8/src/codegen/ia32/
H A Dassembler-ia32.h1077 void vaddss(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vaddss() argument
1078 vaddss(dst, src1, Operand(src2)); in vaddss()
1080 void vaddss(XMMRegister dst, XMMRegister src1, Operand src2) { in vaddss() argument
1081 vss(0x58, dst, src1, src2); in vaddss()
1083 void vsubss(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vsubss() argument
1084 vsubss(dst, src1, Operand(src2)); in vsubss()
1086 void vsubss(XMMRegister dst, XMMRegister src1, Operand src2) { in vsubss() argument
1087 vss(0x5c, dst, src1, src2); in vsubss()
1089 void vmulss(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vmulss() argument
1090 vmulss(dst, src1, Operan in vmulss()
1092 vmulss(XMMRegister dst, XMMRegister src1, Operand src2) vmulss() argument
1095 vdivss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vdivss() argument
1098 vdivss(XMMRegister dst, XMMRegister src1, Operand src2) vdivss() argument
1101 vmaxss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmaxss() argument
1104 vmaxss(XMMRegister dst, XMMRegister src1, Operand src2) vmaxss() argument
1107 vminss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vminss() argument
1110 vminss(XMMRegister dst, XMMRegister src1, Operand src2) vminss() argument
1113 vsqrtss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vsqrtss() argument
1116 vsqrtss(XMMRegister dst, XMMRegister src1, Operand src2) vsqrtss() argument
1121 vhaddps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vhaddps() argument
1124 vhaddps(XMMRegister dst, XMMRegister src1, Operand src2) vhaddps() argument
1134 vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovss() argument
1143 vmovsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovsd() argument
1162 vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufps() argument
1166 vshufpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufpd() argument
1207 vpblendw(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t mask) vpblendw() argument
1213 vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t mask) vpalignr() argument
1232 vinsertps(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t offset) vinsertps() argument
1238 vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t offset) vpinsrb() argument
1243 vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t offset) vpinsrw() argument
1248 vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t offset) vpinsrd() argument
1284 vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) vcvtss2sd() argument
1287 vcvtss2sd(XMMRegister dst, XMMRegister src1, Operand src2) vcvtss2sd() argument
1354 andn(Register dst, Register src1, Register src2) andn() argument
1357 andn(Register dst, Register src1, Operand src2) andn() argument
1360 bextr(Register dst, Register src1, Register src2) bextr() argument
1363 bextr(Register dst, Operand src1, Register src2) bextr() argument
1381 bzhi(Register dst, Register src1, Register src2) bzhi() argument
1384 bzhi(Register dst, Operand src1, Register src2) bzhi() argument
1393 pdep(Register dst, Register src1, Register src2) pdep() argument
1396 pdep(Register dst, Register src1, Operand src2) pdep() argument
1399 pext(Register dst, Register src1, Register src2) pext() argument
1402 pext(Register dst, Register src1, Operand src2) pext() argument
1405 sarx(Register dst, Register src1, Register src2) sarx() argument
1408 sarx(Register dst, Operand src1, Register src2) sarx() argument
1411 shlx(Register dst, Register src1, Register src2) shlx() argument
1414 shlx(Register dst, Operand src1, Register src2) shlx() argument
1417 shrx(Register dst, Register src1, Register src2) shrx() argument
1420 shrx(Register dst, Operand src1, Register src2) shrx() argument
[all...]

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