Lines Matching refs:src1
98 void Push(Register src1, Register src2, Condition cond = al) {
99 if (src1.code() > src2.code()) {
100 stm(db_w, sp, {src1, src2}, cond);
102 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
108 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
109 if (src1.code() > src2.code()) {
111 stm(db_w, sp, {src1, src2, src3}, cond);
113 stm(db_w, sp, {src1, src2}, cond);
117 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
123 void Push(Register src1, Register src2, Register src3, Register src4,
125 if (src1.code() > src2.code()) {
128 stm(db_w, sp, {src1, src2, src3, src4}, cond);
130 stm(db_w, sp, {src1, src2, src3}, cond);
134 stm(db_w, sp, {src1, src2}, cond);
138 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
144 void Push(Register src1, Register src2, Register src3, Register src4,
146 if (src1.code() > src2.code()) {
150 stm(db_w, sp, {src1, src2, src3, src4, src5}, cond);
152 stm(db_w, sp, {src1, src2, src3, src4}, cond);
156 stm(db_w, sp, {src1, src2, src3}, cond);
160 stm(db_w, sp, {src1, src2}, cond);
164 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
178 void Pop(Register src1, Register src2, Condition cond = al) {
179 DCHECK(src1 != src2);
180 if (src1.code() > src2.code()) {
181 ldm(ia_w, sp, {src1, src2}, cond);
184 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
189 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
190 DCHECK(!AreAliased(src1, src2, src3));
191 if (src1.code() > src2.code()) {
193 ldm(ia_w, sp, {src1, src2, src3}, cond);
196 ldm(ia_w, sp, {src1, src2}, cond);
200 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
205 void Pop(Register src1, Register src2, Register src3, Register src4,
207 DCHECK(!AreAliased(src1, src2, src3, src4));
208 if (src1.code() > src2.code()) {
211 ldm(ia_w, sp, {src1, src2, src3, src4}, cond);
214 ldm(ia_w, sp, {src1, src2, src3}, cond);
218 ldm(ia_w, sp, {src1, src2}, cond);
222 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
244 void MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2);
338 void VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2,
340 void VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2,
344 void VFPCompareAndSetFlags(const DwVfpRegister src1, const DwVfpRegister src2,
346 void VFPCompareAndSetFlags(const DwVfpRegister src1, const double src2,
484 // Move src0 to dst0 and src1 to dst1, handling possible overlaps.
485 void MovePair(Register dst0, Register src0, Register dst1, Register src1);
574 void I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
575 void I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
576 void I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
577 void I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
586 void VFPCompareAndLoadFlags(const SwVfpRegister src1,
590 void VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2,
595 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
599 void VFPCompareAndLoadFlags(const DwVfpRegister src1, const double src2,
627 void Mls(Register dst, Register src1, Register src2, Register srcA,
629 void And(Register dst, Register src1, const Operand& src2,