Lines Matching refs:src1
89 __m128i src0, src1;
91 DUP2_ARG2(__lsx_vld, src, 0, src, 16, src0, src1);
94 __lsx_vst(src1, dst, 16);
102 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
122 src1 = __lsx_vldrepl_b(src, 14);
124 LSX_ST_8(src0, src1, src2, src3, src4, src5, src6, src7, dst,
134 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
169 src1 = __lsx_vldrepl_b(src, 30);
171 LSX_ST_8X16(src0, src1, src2, src3, src4, src5, src6, src7,
436 __m128i src0, src1, src2, src3;
444 src0, src1, src2, src3);
445 DUP4_ARG2(__lsx_vhaddw_hu_bu, src0, src0, src1, src1, src2, src2, src3,
466 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
476 src0, src1, src2, src3);
479 DUP4_ARG2(__lsx_vhaddw_hu_bu, src0, src0, src1, src1, src2, src2, src3,
480 src3, src0, src1, src2, src3);
483 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3, reg0,
484 src0, src1, src2, src3);
487 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
488 src0, src1, src2, src3);
491 DUP4_ARG2(__lsx_vpickev_b, src1, src0, src3, src2, src5, src4, src7, src6,
492 src0, src1, src2, src3);
497 __lsx_vstelm_d(src1, dst, 0, 0);
499 __lsx_vstelm_d(src1, dst, 0, 1);
516 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
533 reg1, src0, src1, src2, src3);
536 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3, reg0,
537 src0, src1, src2, src3);
540 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
541 src0, src1, src2, src3);
544 DUP4_ARG2(__lsx_vpackev_b, src4, src0, src5, src1, src6, src2, src7, src3,
547 reg1, src0, src1, src2, src3);
550 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3, reg0,
551 src0, src1, src2, src3);
554 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
555 src0, src1, src2, src3);
558 DUP4_ARG2(__lsx_vpackev_b, src4, src0, src5, src1, src6, src2, src7, src3,
561 reg1, src0, src1, src2, src3);
564 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3, reg0,
565 src0, src1, src2, src3);
568 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
569 src0, src1, src2, src3);
572 DUP4_ARG2(__lsx_vpackev_b, src4, src0, src5, src1, src6, src2, src7, src3,
575 tmp15, reg1, src0, src1, src2, src3);
578 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3, reg0,
579 src0, src1, src2, src3);
582 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
583 src0, src1, src2, src3);
586 DUP4_ARG2(__lsx_vpackev_b, src4, src0, src5, src1, src6, src2, src7, src3,
601 __m128i src0, src1, src2, src3, src4, src5, src6, src7;
613 tmp3, reg1, src0, src1, src2, src3);
616 DUP4_ARG2(__lsx_vssub_hu, src0, reg0, src1, reg0, src2, reg0, src3,
617 reg0, src0, src1, src2, src3);
628 DUP4_ARG2(__lsx_vsat_hu, src0, 7, src1, 7, src2, 7, src3, 7,
629 src0, src1, src2, src3);
636 DUP4_ARG2(__lsx_vpackev_b, src4, src0, src5, src1, src6, src2, src7,
637 src3, src0, src1, src2, src3);
643 __lsx_vst(src1, dst, 0);