Lines Matching refs:src1
1077 void vaddss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1078 vaddss(dst, src1, Operand(src2));
1080 void vaddss(XMMRegister dst, XMMRegister src1, Operand src2) {
1081 vss(0x58, dst, src1, src2);
1083 void vsubss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1084 vsubss(dst, src1, Operand(src2));
1086 void vsubss(XMMRegister dst, XMMRegister src1, Operand src2) {
1087 vss(0x5c, dst, src1, src2);
1089 void vmulss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1090 vmulss(dst, src1, Operand(src2));
1092 void vmulss(XMMRegister dst, XMMRegister src1, Operand src2) {
1093 vss(0x59, dst, src1, src2);
1095 void vdivss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1096 vdivss(dst, src1, Operand(src2));
1098 void vdivss(XMMRegister dst, XMMRegister src1, Operand src2) {
1099 vss(0x5e, dst, src1, src2);
1101 void vmaxss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1102 vmaxss(dst, src1, Operand(src2));
1104 void vmaxss(XMMRegister dst, XMMRegister src1, Operand src2) {
1105 vss(0x5f, dst, src1, src2);
1107 void vminss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1108 vminss(dst, src1, Operand(src2));
1110 void vminss(XMMRegister dst, XMMRegister src1, Operand src2) {
1111 vss(0x5d, dst, src1, src2);
1113 void vsqrtss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1114 vsqrtss(dst, src1, Operand(src2));
1116 void vsqrtss(XMMRegister dst, XMMRegister src1, Operand src2) {
1117 vss(0x51, dst, src1, src2);
1119 void vss(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1121 void vhaddps(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1122 vhaddps(dst, src1, Operand(src2));
1124 void vhaddps(XMMRegister dst, XMMRegister src1, Operand src2) {
1125 vinstr(0x7C, dst, src1, src2, kF2, k0F, kWIG);
1134 void vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1135 vinstr(0x10, dst, src1, src2, kF3, k0F, kWIG);
1143 void vmovsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1144 vinstr(0x10, dst, src1, src2, kF2, k0F, kWIG);
1152 void vpcmpgtq(XMMRegister dst, XMMRegister src1, XMMRegister src2);
1162 void vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) {
1163 vshufps(dst, src1, Operand(src2), imm8);
1165 void vshufps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8);
1166 void vshufpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) {
1167 vshufpd(dst, src1, Operand(src2), imm8);
1169 void vshufpd(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8);
1171 void vmovhlps(XMMRegister dst, XMMRegister src1, XMMRegister src2);
1172 void vmovlhps(XMMRegister dst, XMMRegister src1, XMMRegister src2);
1173 void vmovlps(XMMRegister dst, XMMRegister src1, Operand src2);
1175 void vmovhps(XMMRegister dst, XMMRegister src1, Operand src2);
1200 void vblendvps(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1202 void vblendvpd(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1204 void vpblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1207 void vpblendw(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1209 vpblendw(dst, src1, Operand(src2), mask);
1211 void vpblendw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask);
1213 void vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1215 vpalignr(dst, src1, Operand(src2), mask);
1217 void vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask);
1232 void vinsertps(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1234 vinsertps(dst, src1, Operand(src2), offset);
1236 void vinsertps(XMMRegister dst, XMMRegister src1, Operand src2,
1238 void vpinsrb(XMMRegister dst, XMMRegister src1, Register src2,
1240 vpinsrb(dst, src1, Operand(src2), offset);
1242 void vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset);
1243 void vpinsrw(XMMRegister dst, XMMRegister src1, Register src2,
1245 vpinsrw(dst, src1, Operand(src2), offset);
1247 void vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset);
1248 void vpinsrd(XMMRegister dst, XMMRegister src1, Register src2,
1250 vpinsrd(dst, src1, Operand(src2), offset);
1252 void vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset);
1254 void vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1256 void vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1284 void vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1285 vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
1287 void vcvtss2sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1288 vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
1354 void andn(Register dst, Register src1, Register src2) {
1355 andn(dst, src1, Operand(src2));
1357 void andn(Register dst, Register src1, Operand src2) {
1358 bmi1(0xf2, dst, src1, src2);
1360 void bextr(Register dst, Register src1, Register src2) {
1361 bextr(dst, Operand(src1), src2);
1363 void bextr(Register dst, Operand src1, Register src2) {
1364 bmi1(0xf7, dst, src2, src1);
1381 void bzhi(Register dst, Register src1, Register src2) {
1382 bzhi(dst, Operand(src1), src2);
1384 void bzhi(Register dst, Operand src1, Register src2) {
1385 bmi2(kNoPrefix, 0xf5, dst, src2, src1);
1393 void pdep(Register dst, Register src1, Register src2) {
1394 pdep(dst, src1, Operand(src2));
1396 void pdep(Register dst, Register src1, Operand src2) {
1397 bmi2(kF2, 0xf5, dst, src1, src2);
1399 void pext(Register dst, Register src1, Register src2) {
1400 pext(dst, src1, Operand(src2));
1402 void pext(Register dst, Register src1, Operand src2) {
1403 bmi2(kF3, 0xf5, dst, src1, src2);
1405 void sarx(Register dst, Register src1, Register src2) {
1406 sarx(dst, Operand(src1), src2);
1408 void sarx(Register dst, Operand src1, Register src2) {
1409 bmi2(kF3, 0xf7, dst, src2, src1);
1411 void shlx(Register dst, Register src1, Register src2) {
1412 shlx(dst, Operand(src1), src2);
1414 void shlx(Register dst, Operand src1, Register src2) {
1415 bmi2(k66, 0xf7, dst, src2, src1);
1417 void shrx(Register dst, Register src1, Register src2) {
1418 shrx(dst, Operand(src1), src2);
1420 void shrx(Register dst, Operand src1, Register src2) {
1421 bmi2(kF2, 0xf7, dst, src2, src1);
1460 void v##name##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1461 vps(opcode, dst, src1, Operand(src2)); \
1463 void v##name##ps(XMMRegister dst, XMMRegister src1, Operand src2) { \
1464 vps(opcode, dst, src1, src2); \
1466 void v##name##pd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1467 vpd(opcode, dst, src1, Operand(src2)); \
1469 void v##name##pd(XMMRegister dst, XMMRegister src1, Operand src2) { \
1470 vpd(opcode, dst, src1, src2); \
1477 void vps(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1478 void vpd(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1480 void vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp);
1481 void vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp);
1484 void v##instr##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1485 vcmpps(dst, src1, Operand(src2), imm8); \
1487 void v##instr##ps(XMMRegister dst, XMMRegister src1, Operand src2) { \
1488 vcmpps(dst, src1, src2, imm8); \
1490 void v##instr##pd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1491 vcmppd(dst, src1, Operand(src2), imm8); \
1493 void v##instr##pd(XMMRegister dst, XMMRegister src1, Operand src2) { \
1494 vcmppd(dst, src1, src2, imm8); \
1534 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1535 v##instruction(dst, src1, Operand(src2)); \
1537 void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) { \
1538 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1576 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1577 v##instruction(dst, src1, Operand(src2)); \
1579 void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) { \
1580 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
1614 void instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1615 vinstr(0x##opcode, dst, src1, src2, k##length, k##prefix, \
1618 void instr(XMMRegister dst, XMMRegister src1, Operand src2) { \
1619 vinstr(0x##opcode, dst, src1, src2, k##length, k##prefix, \
1749 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
1751 void vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,
1753 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
1756 void vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,
1762 void fma_instr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
1764 void fma_instr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,