Home
last modified time | relevance | path

Searched refs:rate (Results 26 - 50 of 4265) sorted by relevance

12345678910>>...171

/kernel/linux/linux-5.10/drivers/clk/samsung/
H A Dclk-pll.c36 struct samsung_clk_pll *pll, unsigned long rate) in samsung_get_pll_settings()
42 if (rate == rate_table[i].rate) in samsung_get_pll_settings()
58 if (drate >= rate_table[i].rate) in samsung_pll_round_rate()
59 return rate_table[i].rate; in samsung_pll_round_rate()
63 return rate_table[i - 1].rate; in samsung_pll_round_rate()
194 const struct samsung_pll_rate_table *rate, u32 pll_con) in samsung_pll35xx_mp_change()
201 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
208 const struct samsung_pll_rate_table *rate; in samsung_pll35xx_set_rate() local
35 samsung_get_pll_settings( struct samsung_clk_pll *pll, unsigned long rate) samsung_get_pll_settings() argument
193 samsung_pll35xx_mp_change( const struct samsung_pll_rate_table *rate, u32 pll_con) samsung_pll35xx_mp_change() argument
304 samsung_pll36xx_mpk_change( const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) samsung_pll36xx_mpk_change() argument
322 const struct samsung_pll_rate_table *rate; samsung_pll36xx_set_rate() local
421 samsung_pll45xx_mp_change(u32 pll_con0, u32 pll_con1, const struct samsung_pll_rate_table *rate) samsung_pll45xx_mp_change() argument
438 const struct samsung_pll_rate_table *rate; samsung_pll45xx_set_rate() local
572 samsung_pll46xx_mpk_change(u32 pll_con0, u32 pll_con1, const struct samsung_pll_rate_table *rate) samsung_pll46xx_mpk_change() argument
589 const struct samsung_pll_rate_table *rate; samsung_pll46xx_set_rate() local
808 const struct samsung_pll_rate_table *rate; samsung_s3c2410_pll_set_rate() local
1004 const struct samsung_pll_rate_table *rate; samsung_pll2550xx_set_rate() local
1104 const struct samsung_pll_rate_table *rate; samsung_pll2650x_set_rate() local
1200 const struct samsung_pll_rate_table *rate; samsung_pll2650xx_set_rate() local
[all...]
/kernel/linux/linux-6.6/arch/arm/mach-omap1/
H A Dclock.c138 static int calc_dsor_exp(unsigned long rate, unsigned long realrate) in calc_dsor_exp() argument
157 if (realrate <= rate) in calc_dsor_exp()
171 /* update locally maintained rate, required by arm_ck for omap1_show_rates() */ in omap1_ckctl_recalc()
172 clk->rate = p_rate / dsor; in omap1_ckctl_recalc()
173 return clk->rate; in omap1_ckctl_recalc()
230 int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) in omap1_select_table_rate() argument
232 /* Find the highest supported frequency <= rate and switch to it */ in omap1_select_table_rate()
236 ref_rate = ck_ref_p->rate; in omap1_select_table_rate()
238 for (ptr = omap1_rate_table; ptr->rate; ptr++) { in omap1_select_table_rate()
246 if (ptr->rate < in omap1_select_table_rate()
265 omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) omap1_clk_set_rate_dsp_domain() argument
285 omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) omap1_clk_round_rate_ckctl_arm() argument
297 omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) omap1_clk_set_rate_ckctl_arm() argument
324 omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) omap1_round_to_table_rate() argument
352 calc_ext_dsor(unsigned long rate) calc_ext_dsor() argument
375 omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) omap1_round_uart_rate() argument
380 omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) omap1_set_uart_rate() argument
406 omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) omap1_set_ext_clk_rate() argument
430 calc_div_sossi(unsigned long rate, unsigned long p_rate) calc_div_sossi() argument
440 omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) omap1_round_sossi_rate() argument
453 omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) omap1_set_sossi_rate() argument
478 omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) omap1_round_ext_clk_rate() argument
708 omap1_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate) omap1_clk_round_rate() argument
718 omap1_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate) omap1_clk_set_rate() argument
[all...]
H A Dclock.h40 #define CK_1710 (1 << 4) /* 1710 extra for rate selection */
66 * @rate: current clock rate
68 * @recalc: fn ptr that returns the clock's current rate
69 * @set_rate: fn ptr that can change the clock's current rate
70 * @round_rate: fn ptr that can round the clock's current rate
73 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
75 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
80 unsigned long rate; member
[all...]
/kernel/linux/linux-5.10/drivers/clk/meson/
H A Dclk-pll.c60 u64 rate = (u64)parent_rate * m; in __pll_params_to_rate() local
65 rate += DIV_ROUND_UP_ULL(frac_rate, in __pll_params_to_rate()
69 return DIV_ROUND_UP_ULL(rate, n); in __pll_params_to_rate()
83 * it would result in a division by zero. The rate can't be in meson_clk_pll_recalc_rate()
98 static unsigned int __pll_params_with_frac(unsigned long rate, in __pll_params_with_frac() argument
105 u64 val = (u64)rate * n; in __pll_params_with_frac()
107 /* Bail out if we are already over the requested rate */ in __pll_params_with_frac()
108 if (rate < parent_rate * m / n) in __pll_params_with_frac()
121 static bool meson_clk_pll_is_better(unsigned long rate, in meson_clk_pll_is_better() argument
128 if (abs(now - rate) < ab in meson_clk_pll_is_better()
153 meson_clk_get_pll_range_m(unsigned long rate, unsigned long parent_rate, unsigned int n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_m() argument
166 meson_clk_get_pll_range_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_range_index() argument
199 meson_clk_get_pll_get_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) meson_clk_get_pll_get_index() argument
215 meson_clk_get_pll_settings(unsigned long rate, unsigned long parent_rate, unsigned int *best_m, unsigned int *best_n, struct meson_clk_pll_data *pll) meson_clk_get_pll_settings() argument
245 meson_clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) meson_clk_pll_round_rate() argument
363 meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) meson_clk_pll_set_rate() argument
[all...]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
H A Dutil.c82 void rtw_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss) in rtw_desc_to_mcsrate() argument
84 if (rate <= DESC_RATE54M) in rtw_desc_to_mcsrate()
87 if (rate >= DESC_RATEVHT1SS_MCS0 && in rtw_desc_to_mcsrate()
88 rate <= DESC_RATEVHT1SS_MCS9) { in rtw_desc_to_mcsrate()
90 *mcs = rate - DESC_RATEVHT1SS_MCS0; in rtw_desc_to_mcsrate()
91 } else if (rate >= DESC_RATEVHT2SS_MCS0 && in rtw_desc_to_mcsrate()
92 rate <= DESC_RATEVHT2SS_MCS9) { in rtw_desc_to_mcsrate()
94 *mcs = rate - DESC_RATEVHT2SS_MCS0; in rtw_desc_to_mcsrate()
95 } else if (rate >= DESC_RATEVHT3SS_MCS0 && in rtw_desc_to_mcsrate()
96 rate < in rtw_desc_to_mcsrate()
[all...]
/kernel/linux/linux-5.10/drivers/memory/tegra/
H A Dtegra186-emc.c16 unsigned long rate; member
60 unsigned long rate) in tegra186_emc_validate_rate()
65 if (rate == emc->dvfs[i].rate) in tegra186_emc_validate_rate()
79 seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate); in tegra186_emc_debug_available_rates_show()
102 static int tegra186_emc_debug_min_rate_get(void *data, u64 *rate) in tegra186_emc_debug_min_rate_get() argument
106 *rate = emc->debugfs.min_rate; in tegra186_emc_debug_min_rate_get()
111 static int tegra186_emc_debug_min_rate_set(void *data, u64 rate) in tegra186_emc_debug_min_rate_set() argument
116 if (!tegra186_emc_validate_rate(emc, rate)) in tegra186_emc_debug_min_rate_set()
119 err = clk_set_min_rate(emc->clk, rate); in tegra186_emc_debug_min_rate_set()
59 tegra186_emc_validate_rate(struct tegra186_emc *emc, unsigned long rate) tegra186_emc_validate_rate() argument
132 tegra186_emc_debug_max_rate_get(void *data, u64 *rate) tegra186_emc_debug_max_rate_get() argument
141 tegra186_emc_debug_max_rate_set(void *data, u64 rate) tegra186_emc_debug_max_rate_set() argument
[all...]
H A Dtegra20-emc.c141 unsigned long rate; member
183 unsigned long rate) in tegra_emc_find_timing()
189 if (emc->timings[i].rate >= rate) { in tegra_emc_find_timing()
196 dev_err(emc->dev, "no timing for rate %lu\n", rate); in tegra_emc_find_timing()
203 static int emc_prepare_timing_change(struct tegra_emc *emc, unsigned long rate) in emc_prepare_timing_change() argument
205 struct emc_timing *timing = tegra_emc_find_timing(emc, rate); in emc_prepare_timing_change()
211 dev_dbg(emc->dev, "%s: using timing rate %lu for requested rate in emc_prepare_timing_change()
182 tegra_emc_find_timing(struct tegra_emc *emc, unsigned long rate) tegra_emc_find_timing() argument
285 u32 rate; load_one_timing_from_dt() local
445 emc_round_rate(unsigned long rate, unsigned long min_rate, unsigned long max_rate, void *arg) emc_round_rate() argument
508 tegra_emc_validate_rate(struct tegra_emc *emc, unsigned long rate) tegra_emc_validate_rate() argument
549 tegra_emc_debug_min_rate_get(void *data, u64 *rate) tegra_emc_debug_min_rate_get() argument
558 tegra_emc_debug_min_rate_set(void *data, u64 rate) tegra_emc_debug_min_rate_set() argument
579 tegra_emc_debug_max_rate_get(void *data, u64 *rate) tegra_emc_debug_max_rate_get() argument
588 tegra_emc_debug_max_rate_set(void *data, u64 rate) tegra_emc_debug_max_rate_set() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/actions/
H A Dowl-composite.c56 static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_round_rate() argument
61 return owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_round_rate()
62 rate, parent_rate); in owl_comp_div_round_rate()
70 return owl_divider_helper_recalc_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_recalc_rate()
74 static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_div_set_rate() argument
79 return owl_divider_helper_set_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_set_rate()
80 rate, parent_rate); in owl_comp_div_set_rate()
83 static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate, in owl_comp_fact_round_rate() argument
89 &comp->rate.factor_hw, in owl_comp_fact_round_rate()
90 rate, parent_rat in owl_comp_fact_round_rate()
103 owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) owl_comp_fact_set_rate() argument
113 owl_comp_fix_fact_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) owl_comp_fix_fact_round_rate() argument
132 owl_comp_fix_fact_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) owl_comp_fix_fact_set_rate() argument
[all...]
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw88/
H A Dphy.c1145 u32 addr, u32 mask, u32 val, u8 *rate, in rtw_phy_get_rate_values_of_txpwr_by_rate()
1153 rate[0] = DESC_RATE6M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1154 rate[1] = DESC_RATE9M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1155 rate[2] = DESC_RATE12M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1156 rate[3] = DESC_RATE18M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1163 rate[0] = DESC_RATE24M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1164 rate[1] = DESC_RATE36M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1165 rate[2] = DESC_RATE48M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1166 rate[3] = DESC_RATE54M; in rtw_phy_get_rate_values_of_txpwr_by_rate()
1172 rate[ in rtw_phy_get_rate_values_of_txpwr_by_rate()
1144 rtw_phy_get_rate_values_of_txpwr_by_rate(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 val, u8 *rate, u8 *pwr_by_rate, u8 *rate_num) rtw_phy_get_rate_values_of_txpwr_by_rate() argument
1454 u8 rate; rtw_phy_store_tx_power_by_rate() local
1784 rtw_get_channel_group(u8 channel, u8 rate) rtw_get_channel_group() argument
1874 rtw_phy_get_dis_dpd_by_rate_diff(struct rtw_dev *rtwdev, u16 rate) rtw_phy_get_dis_dpd_by_rate_diff() argument
1905 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev, struct rtw_2g_txpwr_idx *pwr_idx_2g, enum rtw_bandwidth bandwidth, u8 rate, u8 group) rtw_phy_get_2g_tx_power_index() argument
1952 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev, struct rtw_5g_txpwr_idx *pwr_idx_5g, enum rtw_bandwidth bandwidth, u8 rate, u8 group) rtw_phy_get_5g_tx_power_index() argument
2007 rtw_phy_rate_to_rate_section(u8 rate) rtw_phy_rate_to_rate_section() argument
2025 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, enum rtw_bandwidth bw, u8 rf_path, u8 rate, u8 channel, u8 regd) rtw_phy_get_tx_power_limit() argument
2074 rtw_phy_get_tx_power_sar(struct rtw_dev *rtwdev, u8 sar_band, u8 rf_path, u8 rate) rtw_phy_get_tx_power_sar() argument
2095 rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, u8 ch, u8 regd, struct rtw_power_params *pwr_param) rtw_get_tx_power_params() argument
2134 rtw_phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate, enum rtw_bandwidth bandwidth, u8 channel, u8 regd) rtw_phy_get_tx_power_index() argument
2168 u8 rate; rtw_phy_set_tx_power_index_by_rs() local
2228 u8 rate; rtw_phy_tx_power_by_rate_config_by_path() local
2322 u8 regd, path, rate, rs, bw; rtw_phy_init_tx_power() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/zynqmp/
H A Dpll.c93 * @rate: Desired clock frequency
96 * Return: Frequency closest to @rate the hardware can generate
98 static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate, in zynqmp_pll_round_rate() argument
104 /* Let rate fall inside the range PS_PLL_VCO_MIN ~ PS_PLL_VCO_MAX */ in zynqmp_pll_round_rate()
105 if (rate > PS_PLL_VCO_MAX) { in zynqmp_pll_round_rate()
106 div = DIV_ROUND_UP(rate, PS_PLL_VCO_MAX); in zynqmp_pll_round_rate()
107 rate = rate / div; in zynqmp_pll_round_rate()
109 if (rate < PS_PLL_VCO_MIN) { in zynqmp_pll_round_rate()
110 mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate); in zynqmp_pll_round_rate()
137 unsigned long rate, frac; zynqmp_pll_recalc_rate() local
167 zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) zynqmp_pll_set_rate() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/zynqmp/
H A Dpll.c96 * @rate: Desired clock frequency
99 * Return: Frequency closest to @rate the hardware can generate
101 static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate, in zynqmp_pll_round_rate() argument
107 /* Let rate fall inside the range PS_PLL_VCO_MIN ~ PS_PLL_VCO_MAX */ in zynqmp_pll_round_rate()
108 if (rate > PS_PLL_VCO_MAX) { in zynqmp_pll_round_rate()
109 div = DIV_ROUND_UP(rate, PS_PLL_VCO_MAX); in zynqmp_pll_round_rate()
110 rate = rate / div; in zynqmp_pll_round_rate()
112 if (rate < PS_PLL_VCO_MIN) { in zynqmp_pll_round_rate()
113 mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate); in zynqmp_pll_round_rate()
140 unsigned long rate, frac; zynqmp_pll_recalc_rate() local
177 zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) zynqmp_pll_set_rate() argument
[all...]
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8186/
H A Dmt8186-afe-control.c75 unsigned int mt8186_general_rate_transform(struct device *dev, unsigned int rate) in mt8186_general_rate_transform() argument
77 switch (rate) { in mt8186_general_rate_transform()
111 dev_err(dev, "%s(), rate %u invalid, use %d!!!\n", in mt8186_general_rate_transform()
112 __func__, rate, MTK_AFE_RATE_48K); in mt8186_general_rate_transform()
118 static unsigned int tdm_rate_transform(struct device *dev, unsigned int rate) in tdm_rate_transform() argument
120 switch (rate) { in tdm_rate_transform()
158 dev_err(dev, "%s(), rate %u invalid, use %d!!!\n", in tdm_rate_transform()
159 __func__, rate, MTK_AFE_TDM_RATE_48K); in tdm_rate_transform()
165 static unsigned int pcm_rate_transform(struct device *dev, unsigned int rate) in pcm_rate_transform() argument
167 switch (rate) { in pcm_rate_transform()
184 mt8186_tdm_relatch_rate_transform(struct device *dev, unsigned int rate) mt8186_tdm_relatch_rate_transform() argument
225 mt8186_rate_transform(struct device *dev, unsigned int rate, int aud_blk) mt8186_rate_transform() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/tegra/
H A Dclk-tegra-super-cclk.c43 static int cclk_super_set_rate(struct clk_hw *hw, unsigned long rate, in cclk_super_set_rate() argument
46 return tegra_clk_super_ops.set_rate(hw, rate, parent_rate); in cclk_super_set_rate()
75 long rate = req->rate; in cclk_super_determine_rate() local
86 if (rate <= pllp_rate) { in cclk_super_determine_rate()
88 rate = pllp_rate; in cclk_super_determine_rate()
91 .rate = req->rate, in cclk_super_determine_rate()
99 rate = parent.rate; in cclk_super_determine_rate()
[all...]
/kernel/linux/linux-6.6/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-control.c45 unsigned int rate) in mt8192_general_rate_transform()
47 switch (rate) { in mt8192_general_rate_transform()
81 dev_warn(dev, "%s(), rate %u invalid, use %d!!!\n", in mt8192_general_rate_transform()
83 rate, MTK_AFE_RATE_48K); in mt8192_general_rate_transform()
89 unsigned int rate) in dai_memif_rate_transform()
91 switch (rate) { in dai_memif_rate_transform()
101 dev_warn(dev, "%s(), rate %u invalid, use %d!!!\n", in dai_memif_rate_transform()
103 rate, MTK_AFE_DAI_MEMIF_RATE_16K); in dai_memif_rate_transform()
109 unsigned int rate) in pcm_rate_transform()
111 switch (rate) { in pcm_rate_transform()
44 mt8192_general_rate_transform(struct device *dev, unsigned int rate) mt8192_general_rate_transform() argument
88 dai_memif_rate_transform(struct device *dev, unsigned int rate) dai_memif_rate_transform() argument
108 pcm_rate_transform(struct device *dev, unsigned int rate) pcm_rate_transform() argument
128 mt8192_rate_transform(struct device *dev, unsigned int rate, int aud_blk) mt8192_rate_transform() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
H A Dccu_nkmp.c24 u64 rate = parent; in ccu_nkmp_calc_rate() local
26 rate *= n * k; in ccu_nkmp_calc_rate()
27 do_div(rate, m * p); in ccu_nkmp_calc_rate()
29 return rate; in ccu_nkmp_calc_rate()
32 static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate, in ccu_nkmp_find_best() argument
49 if (tmp_rate > rate) in ccu_nkmp_find_best()
52 if ((rate - tmp_rate) < (rate - best_rate)) { in ccu_nkmp_find_best()
95 unsigned long n, m, k, p, rate; in ccu_nkmp_recalc_rate() local
121 rate in ccu_nkmp_recalc_rate()
128 ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) ccu_nkmp_round_rate() argument
163 ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) ccu_nkmp_set_rate() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
H A Dccu_nkmp.c24 u64 rate = parent; in ccu_nkmp_calc_rate() local
26 rate *= n * k; in ccu_nkmp_calc_rate()
27 do_div(rate, m * p); in ccu_nkmp_calc_rate()
29 return rate; in ccu_nkmp_calc_rate()
32 static unsigned long ccu_nkmp_find_best(unsigned long parent, unsigned long rate, in ccu_nkmp_find_best() argument
49 if (tmp_rate > rate) in ccu_nkmp_find_best()
52 if ((rate - tmp_rate) < (rate - best_rate)) { in ccu_nkmp_find_best()
97 unsigned long n, m, k, p, rate; in ccu_nkmp_recalc_rate() local
123 rate in ccu_nkmp_recalc_rate()
130 ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) ccu_nkmp_round_rate() argument
163 ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) ccu_nkmp_set_rate() argument
[all...]
/third_party/ffmpeg/libavutil/
H A Dtimecode.c66 return av_timecode_get_smpte(tc->rate, drop, hh, mm, ss, ff); in av_timecode_get_smpte_from_framenum()
69 uint32_t av_timecode_get_smpte(AVRational rate, int drop, int hh, int mm, int ss, int ff) in av_timecode_get_smpte() argument
75 if (av_cmp_q(rate, (AVRational) {30, 1}) == 1) { in av_timecode_get_smpte()
77 if (av_cmp_q(rate, (AVRational) {50, 1}) == 0) in av_timecode_get_smpte()
138 char *av_timecode_make_smpte_tc_string2(char *buf, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field) in av_timecode_make_smpte_tc_string2() argument
146 if (av_cmp_q(rate, (AVRational) {30, 1}) == 1) { in av_timecode_make_smpte_tc_string2()
149 if (av_cmp_q(rate, (AVRational) {50, 1}) == 0) in av_timecode_make_smpte_tc_string2()
195 av_log(log_ctx, AV_LOG_ERROR, "Valid timecode frame rate must be specified. Minimum value is 1\n"); in check_timecode()
203 av_log(log_ctx, AV_LOG_WARNING, "Using non-standard frame rate %d/%d\n", in check_timecode()
204 tc->rate in check_timecode()
209 fps_from_frame_rate(AVRational rate) fps_from_frame_rate() argument
216 av_timecode_check_frame_rate(AVRational rate) av_timecode_check_frame_rate() argument
221 av_timecode_init(AVTimecode *tc, AVRational rate, int flags, int frame_start, void *log_ctx) av_timecode_init() argument
231 av_timecode_init_from_components(AVTimecode *tc, AVRational rate, int flags, int hh, int mm, int ss, int ff, void *log_ctx) av_timecode_init_from_components() argument
252 av_timecode_init_from_string(AVTimecode *tc, AVRational rate, const char *str, void *log_ctx) av_timecode_init_from_string() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dclk-rcg2.c141 * Calculate m/n:d rate
144 * rate = ----------- x ---
148 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) in calc_rate() argument
151 rate = mult_frac(rate, 2, hid_div + 1); in calc_rate()
154 rate = mult_frac(rate, m, n); in calc_rate()
156 return rate; in calc_rate()
190 unsigned long clk_flags, rate = req->rate; in _freq_tbl_determine_rate() local
316 __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, enum freq_policy policy) __clk_rcg2_set_rate() argument
339 clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_set_rate() argument
345 clk_rcg2_set_floor_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_set_floor_rate() argument
351 clk_rcg2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_set_rate_and_parent() argument
357 clk_rcg2_set_floor_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_set_floor_rate_and_parent() argument
412 clk_edp_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_edp_pixel_set_rate() argument
451 clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_edp_pixel_set_rate_and_parent() argument
536 clk_byte_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_byte_set_rate() argument
552 clk_byte_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_byte_set_rate_and_parent() argument
577 unsigned long rate = req->rate; clk_byte2_determine_rate() local
593 clk_byte2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_byte2_set_rate() argument
622 clk_byte2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_byte2_set_rate_and_parent() argument
672 clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_pixel_set_rate() argument
714 clk_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_pixel_set_rate_and_parent() argument
780 clk_gfx3d_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_gfx3d_set_rate_and_parent() argument
796 clk_gfx3d_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_gfx3d_set_rate() argument
866 clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_shared_set_rate() argument
886 clk_rcg2_shared_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_shared_set_rate_and_parent() argument
1136 clk_rcg2_dp_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_dp_set_rate() argument
1180 clk_rcg2_dp_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_dp_set_rate_and_parent() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dclk-rcg2.c152 * Calculate m/n:d rate
155 * rate = ----------- x ---
159 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) in calc_rate() argument
162 rate = mult_frac(rate, 2, hid_div + 1); in calc_rate()
165 rate = mult_frac(rate, m, n); in calc_rate()
167 return rate; in calc_rate()
210 unsigned long clk_flags, rate = req->rate; in _freq_tbl_determine_rate() local
351 __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, enum freq_policy policy) __clk_rcg2_set_rate() argument
374 clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_set_rate() argument
380 clk_rcg2_set_floor_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_set_floor_rate() argument
386 clk_rcg2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_set_rate_and_parent() argument
392 clk_rcg2_set_floor_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_set_floor_rate_and_parent() argument
542 clk_edp_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_edp_pixel_set_rate() argument
581 clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_edp_pixel_set_rate_and_parent() argument
666 clk_byte_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_byte_set_rate() argument
682 clk_byte_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_byte_set_rate_and_parent() argument
707 unsigned long rate = req->rate; clk_byte2_determine_rate() local
723 clk_byte2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_byte2_set_rate() argument
752 clk_byte2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_byte2_set_rate_and_parent() argument
802 clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_pixel_set_rate() argument
844 clk_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_pixel_set_rate_and_parent() argument
933 clk_gfx3d_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_gfx3d_set_rate_and_parent() argument
953 clk_gfx3d_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_gfx3d_set_rate() argument
1023 clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_shared_set_rate() argument
1044 clk_rcg2_shared_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_shared_set_rate_and_parent() argument
1333 clk_rcg2_dp_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_rcg2_dp_set_rate() argument
1377 clk_rcg2_dp_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) clk_rcg2_dp_set_rate_and_parent() argument
[all...]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4-202.c25 return clk->parent->rate / frqcr3_divisors[idx]; in emi_clk_recalc()
28 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate) in frqcr3_lookup() argument
30 int divisor = clk->parent->rate / rate; in frqcr3_lookup()
53 return clk->parent->rate / frqcr3_divisors[idx]; in femi_clk_recalc()
76 * that passes rate verification.. in shoc_clk_init()
81 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
91 return clk->parent->rate / frqcr3_divisors[idx]; in shoc_clk_recalc()
94 static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) in shoc_clk_verify_rate() argument
101 if (rate > bclk_rat in shoc_clk_verify_rate()
109 shoc_clk_set_rate(struct clk *clk, unsigned long rate) shoc_clk_set_rate() argument
[all...]
/kernel/linux/linux-5.10/arch/mips/lantiq/
H A Dclk.c32 cpu_clk_generic[0].rate = cpu; in clkdev_add_static()
33 cpu_clk_generic[1].rate = fpi; in clkdev_add_static()
34 cpu_clk_generic[2].rate = io; in clkdev_add_static()
35 cpu_clk_generic[3].rate = ppe; in clkdev_add_static()
71 if (clk->rate != 0) in clk_get_rate()
72 return clk->rate; in clk_get_rate()
81 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() argument
88 while (*r && (*r != rate)) in clk_set_rate()
91 pr_err("clk %s.%s: trying to set invalid rate %ld\n", in clk_set_rate()
92 clk->cl.dev_id, clk->cl.con_id, rate); in clk_set_rate()
101 clk_round_rate(struct clk *clk, unsigned long rate) clk_round_rate() argument
[all...]
/kernel/linux/linux-6.6/arch/mips/lantiq/
H A Dclk.c32 cpu_clk_generic[0].rate = cpu; in clkdev_add_static()
33 cpu_clk_generic[1].rate = fpi; in clkdev_add_static()
34 cpu_clk_generic[2].rate = io; in clkdev_add_static()
35 cpu_clk_generic[3].rate = ppe; in clkdev_add_static()
71 if (clk->rate != 0) in clk_get_rate()
72 return clk->rate; in clk_get_rate()
81 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() argument
88 while (*r && (*r != rate)) in clk_set_rate()
91 pr_err("clk %s.%s: trying to set invalid rate %ld\n", in clk_set_rate()
92 clk->cl.dev_id, clk->cl.con_id, rate); in clk_set_rate()
101 clk_round_rate(struct clk *clk, unsigned long rate) clk_round_rate() argument
[all...]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4-202.c25 return clk->parent->rate / frqcr3_divisors[idx]; in emi_clk_recalc()
28 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate) in frqcr3_lookup() argument
30 int divisor = clk->parent->rate / rate; in frqcr3_lookup()
53 return clk->parent->rate / frqcr3_divisors[idx]; in femi_clk_recalc()
76 * that passes rate verification.. in shoc_clk_init()
81 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
91 return clk->parent->rate / frqcr3_divisors[idx]; in shoc_clk_recalc()
94 static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) in shoc_clk_verify_rate() argument
101 if (rate > bclk_rat in shoc_clk_verify_rate()
109 shoc_clk_set_rate(struct clk *clk, unsigned long rate) shoc_clk_set_rate() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-si5351.c270 unsigned long rate; in si5351_clkin_recalc_rate() local
273 rate = parent_rate; in si5351_clkin_recalc_rate()
276 rate /= 8; in si5351_clkin_recalc_rate()
279 rate /= 4; in si5351_clkin_recalc_rate()
282 rate /= 2; in si5351_clkin_recalc_rate()
290 dev_dbg(&drvdata->client->dev, "%s - clkin div = %d, rate = %lu\n", in si5351_clkin_recalc_rate()
291 __func__, (1 << (idiv >> 6)), rate); in si5351_clkin_recalc_rate()
293 return rate; in si5351_clkin_recalc_rate()
326 static int si5351_vxco_set_rate(struct clk_hw *hw, unsigned long rate, in si5351_vxco_set_rate() argument
421 unsigned long long rate; in si5351_pll_recalc_rate() local
445 si5351_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) si5351_pll_round_rate() argument
502 si5351_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) si5351_pll_set_rate() argument
605 unsigned long long rate; si5351_msynth_recalc_rate() local
643 si5351_msynth_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) si5351_msynth_round_rate() argument
755 si5351_msynth_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) si5351_msynth_set_rate() argument
1028 si5351_clkout_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) si5351_clkout_round_rate() argument
1081 si5351_clkout_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) si5351_clkout_set_rate() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-pllv3.c39 * @ref_clock: reference clock rate
119 static long clk_pllv3_round_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_round_rate() argument
124 return (rate >= parent_rate * 22) ? parent_rate * 22 : in clk_pllv3_round_rate()
128 static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_set_rate() argument
134 if (rate == parent_rate * 22) in clk_pllv3_set_rate()
136 else if (rate == parent_rate * 20) in clk_pllv3_set_rate()
167 static long clk_pllv3_sys_round_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv3_sys_round_rate() argument
175 if (rate > max_rate) in clk_pllv3_sys_round_rate()
176 rate = max_rate; in clk_pllv3_sys_round_rate()
177 else if (rate < min_rat in clk_pllv3_sys_round_rate()
184 clk_pllv3_sys_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_pllv3_sys_set_rate() argument
228 clk_pllv3_av_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) clk_pllv3_av_round_rate() argument
260 clk_pllv3_av_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_pllv3_av_set_rate() argument
320 clk_pllv3_vf610_rate_to_mf( unsigned long parent_rate, unsigned long rate) clk_pllv3_vf610_rate_to_mf() argument
357 clk_pllv3_vf610_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) clk_pllv3_vf610_round_rate() argument
365 clk_pllv3_vf610_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_pllv3_vf610_set_rate() argument
[all...]

Completed in 18 milliseconds

12345678910>>...171