Lines Matching refs:rate
43 static int cclk_super_set_rate(struct clk_hw *hw, unsigned long rate,
46 return tegra_clk_super_ops.set_rate(hw, rate, parent_rate);
75 long rate = req->rate;
86 if (rate <= pllp_rate) {
88 rate = pllp_rate;
91 .rate = req->rate,
99 rate = parent.rate;
104 req->rate = rate;
106 rate = clk_hw_round_rate(pllx_hw, rate);
107 req->best_parent_rate = rate;
109 req->rate = rate;
112 if (WARN_ON_ONCE(rate <= 0))
221 * changes its rate. PLLP is a safe parent for CPU on all Tegra SoCs.