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/third_party/mesa3d/src/vulkan/wsi/
H A Dwsi_common_win32.c43 struct wsi_interface base; member
52 struct wsi_image base; member
62 struct wsi_swapchain base; member
97 surface->base.platform = VK_ICD_WSI_PLATFORM_WIN32; in wsi_CreateWin32SurfaceKHR()
102 *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); in wsi_CreateWin32SurfaceKHR()
311 assert(chain->base.use_buffer_blit); in wsi_win32_image_init()
312 VkResult result = wsi_create_image(&chain->base, &chain->base.image_info, in wsi_win32_image_init()
313 &image->base); in wsi_win32_image_init()
355 wsi_destroy_image(&chain->base, in wsi_win32_image_finish()
[all...]
/kernel/linux/linux-5.10/drivers/i2c/busses/
H A Di2c-st.c173 * @base: virtual memory area
186 void __iomem *base; member
244 if (readl_relaxed(i2c_dev->base + SSC_STA) & SSC_STA_RIR) in st_i2c_flush_rx_fifo()
247 count = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT) & in st_i2c_flush_rx_fifo()
251 readl_relaxed(i2c_dev->base + SSC_RBUF); in st_i2c_flush_rx_fifo()
262 st_i2c_set_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
263 st_i2c_clr_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
280 writel_relaxed(val, i2c_dev->base + SSC_CLR); in st_i2c_hw_config()
284 writel_relaxed(val, i2c_dev->base + SSC_CTL); in st_i2c_hw_config()
291 writel_relaxed(val, i2c_dev->base in st_i2c_hw_config()
[all...]
/kernel/linux/linux-6.6/drivers/crypto/allwinner/sun8i-ss/
H A Dsun8i-ss-core.c108 writel(rctx->p_key, ss->base + SS_KEY_ADR_REG); in sun8i_ss_run_task()
113 writel(rctx->p_iv[0], ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
115 writel(rctx->t_dst[i - 1].addr + rctx->t_dst[i - 1].len * 4 - ivlen, ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
117 writel(rctx->p_iv[i], ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
128 writel(rctx->t_src[i].addr, ss->base + SS_SRC_ADR_REG); in sun8i_ss_run_task()
129 writel(rctx->t_dst[i].addr, ss->base + SS_DST_ADR_REG); in sun8i_ss_run_task()
130 writel(rctx->t_src[i].len, ss->base + SS_LEN_ADR_REG); in sun8i_ss_run_task()
136 writel(v, ss->base + SS_CTL_REG); in sun8i_ss_run_task()
155 p = readl(ss->base + SS_INT_STA_REG); in ss_irq_handler()
158 writel(BIT(flow), ss->base in ss_irq_handler()
[all...]
/kernel/linux/linux-6.6/drivers/i2c/busses/
H A Di2c-st.c173 * @base: virtual memory area
186 void __iomem *base; member
244 if (readl_relaxed(i2c_dev->base + SSC_STA) & SSC_STA_RIR) in st_i2c_flush_rx_fifo()
247 count = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT) & in st_i2c_flush_rx_fifo()
251 readl_relaxed(i2c_dev->base + SSC_RBUF); in st_i2c_flush_rx_fifo()
262 st_i2c_set_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
263 st_i2c_clr_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
280 writel_relaxed(val, i2c_dev->base + SSC_CLR); in st_i2c_hw_config()
284 writel_relaxed(val, i2c_dev->base + SSC_CTL); in st_i2c_hw_config()
291 writel_relaxed(val, i2c_dev->base in st_i2c_hw_config()
[all...]
H A Di2c-bcm-kona.c147 void __iomem *base; member
168 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
175 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
182 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
188 dev->base + CS_OFFSET); in bcm_kona_i2c_send_cmd_to_ctrl()
198 writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK, in bcm_kona_i2c_enable_clock()
199 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_enable_clock()
204 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK, in bcm_kona_i2c_disable_clock()
205 dev->base + CLKEN_OFFSET); in bcm_kona_i2c_disable_clock()
211 uint32_t status = readl(dev->base in bcm_kona_i2c_isr()
[all...]
/kernel/linux/linux-5.10/kernel/time/
H A Dalarmtimer.c38 * @lock: Lock for syncrhonized access to the base
40 * @get_ktime: Function to read the time correlating to the base
41 * @get_timespec: Function to read the namespace time correlating to the base
42 * @base_clockid: clockid for the base
153 * @base: pointer to the base where the timer is being run
158 * Must hold base->lock when calling.
160 static void alarmtimer_enqueue(struct alarm_base *base, struct alarm *alarm) in alarmtimer_enqueue() argument
163 timerqueue_del(&base->timerqueue, &alarm->node); in alarmtimer_enqueue()
165 timerqueue_add(&base in alarmtimer_enqueue()
178 alarmtimer_dequeue(struct alarm_base *base, struct alarm *alarm) alarmtimer_dequeue() argument
200 struct alarm_base *base = &alarm_bases[alarm->type]; alarmtimer_fired() local
227 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_expires_remaining() local
264 struct alarm_base *base = &alarm_bases[i]; alarmtimer_suspend() local
358 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_start() local
378 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_start_relative() local
387 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_restart() local
407 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_try_to_cancel() local
475 struct alarm_base *base = &alarm_bases[alarm->type]; __alarm_forward_now() local
509 struct alarm_base *base; alarmtimer_freezerset() local
657 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_timer_arm() local
693 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)]; alarm_clock_get_timespec() local
711 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)]; alarm_clock_get_ktime() local
[all...]
H A Dhrtimer.c65 * to reach a base using a clockid, hrtimer_clockid_to_base()
135 * timer->base->cpu_base
147 static inline bool is_migration_base(struct hrtimer_clock_base *base) in is_migration_base() argument
149 return base == &migration_base; in is_migration_base()
154 * means that all timers which are tied to this base via timer->base are
155 * locked, and the base itself is locked too.
160 * When the timer's base is locked, and the timer removed from list, it is
161 * possible to set timer->base = &migration_base and drop the lock: the timer
168 struct hrtimer_clock_base *base; in lock_hrtimer_base() local
202 get_target_base(struct hrtimer_cpu_base *base, int pinned) get_target_base() argument
225 switch_hrtimer_base(struct hrtimer *timer, struct hrtimer_clock_base *base, int pinned) switch_hrtimer_base() argument
276 is_migration_base(struct hrtimer_clock_base *base) is_migration_base() argument
284 struct hrtimer_clock_base *base = timer->base; lock_hrtimer_base() local
507 struct hrtimer_clock_base *base; __hrtimer_next_event_base() local
625 hrtimer_update_base(struct hrtimer_cpu_base *base) hrtimer_update_base() argument
730 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); retrigger_next_event() local
746 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); hrtimer_switch_to_hres() local
779 struct hrtimer_clock_base *base = timer->base; hrtimer_reprogram() local
978 enqueue_hrtimer(struct hrtimer *timer, struct hrtimer_clock_base *base, enum hrtimer_mode mode) enqueue_hrtimer() argument
1007 __remove_hrtimer(struct hrtimer *timer, struct hrtimer_clock_base *base, u8 newstate, int reprogram) __remove_hrtimer() argument
1046 remove_hrtimer(struct hrtimer *timer, struct hrtimer_clock_base *base, bool restart, bool keep_local) remove_hrtimer() argument
1127 __hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, u64 delta_ns, const enum hrtimer_mode mode, struct hrtimer_clock_base *base) __hrtimer_start_range_ns() argument
1204 struct hrtimer_clock_base *base; hrtimer_start_range_ns() local
1239 struct hrtimer_clock_base *base; hrtimer_try_to_cancel() local
1265 hrtimer_cpu_base_init_expiry_lock(struct hrtimer_cpu_base *base) hrtimer_cpu_base_init_expiry_lock() argument
1270 hrtimer_cpu_base_lock_expiry(struct hrtimer_cpu_base *base) hrtimer_cpu_base_lock_expiry() argument
1275 hrtimer_cpu_base_unlock_expiry(struct hrtimer_cpu_base *base) hrtimer_cpu_base_unlock_expiry() argument
1317 struct hrtimer_clock_base *base = READ_ONCE(timer->base); hrtimer_cancel_wait_running() local
1342 hrtimer_cpu_base_init_expiry_lock(struct hrtimer_cpu_base *base) hrtimer_cpu_base_init_expiry_lock() argument
1344 hrtimer_cpu_base_lock_expiry(struct hrtimer_cpu_base *base) hrtimer_cpu_base_lock_expiry() argument
1346 hrtimer_cpu_base_unlock_expiry(struct hrtimer_cpu_base *base) hrtimer_cpu_base_unlock_expiry() argument
1347 hrtimer_sync_wait_running(struct hrtimer_cpu_base *base, unsigned long flags) hrtimer_sync_wait_running() argument
1453 int base = hrtimer_clock_to_base_table[clock_id]; hrtimer_clockid_to_base() local
1467 int base; __hrtimer_init() local
1527 struct hrtimer_clock_base *base; hrtimer_active() local
1645 struct hrtimer_clock_base *base; __hrtimer_run_queues() local
[all...]
/kernel/linux/linux-6.6/kernel/time/
H A Dalarmtimer.c38 * @lock: Lock for syncrhonized access to the base
40 * @get_ktime: Function to read the time correlating to the base
41 * @get_timespec: Function to read the namespace time correlating to the base
42 * @base_clockid: clockid for the base
152 * @base: pointer to the base where the timer is being run
157 * Must hold base->lock when calling.
159 static void alarmtimer_enqueue(struct alarm_base *base, struct alarm *alarm) in alarmtimer_enqueue() argument
162 timerqueue_del(&base->timerqueue, &alarm->node); in alarmtimer_enqueue()
164 timerqueue_add(&base in alarmtimer_enqueue()
177 alarmtimer_dequeue(struct alarm_base *base, struct alarm *alarm) alarmtimer_dequeue() argument
199 struct alarm_base *base = &alarm_bases[alarm->type]; alarmtimer_fired() local
226 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_expires_remaining() local
263 struct alarm_base *base = &alarm_bases[i]; alarmtimer_suspend() local
357 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_start() local
377 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_start_relative() local
386 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_restart() local
406 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_try_to_cancel() local
474 struct alarm_base *base = &alarm_bases[alarm->type]; __alarm_forward_now() local
508 struct alarm_base *base; alarmtimer_freezerset() local
659 struct alarm_base *base = &alarm_bases[alarm->type]; alarm_timer_arm() local
695 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)]; alarm_clock_get_timespec() local
713 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)]; alarm_clock_get_ktime() local
[all...]
/kernel/linux/linux-6.6/mm/
H A Dmemblock.c174 /* adjust *@size so that (@base + *@size) doesn't overflow, return new size */
175 static inline phys_addr_t memblock_cap_size(phys_addr_t base, phys_addr_t *size) in memblock_cap_size() argument
177 return *size = min(*size, PHYS_ADDR_MAX - base); in memblock_cap_size()
191 phys_addr_t base, phys_addr_t size) in memblock_overlaps_region()
195 memblock_cap_size(base, &size); in memblock_overlaps_region()
198 if (memblock_addrs_overlap(base, size, type->regions[i].base, in memblock_overlaps_region()
360 type->regions[0].base = 0; in memblock_remove_region()
525 if (this->base + this->size != next->base || in memblock_merge_regions()
190 memblock_overlaps_region(struct memblock_type *type, phys_addr_t base, phys_addr_t size) memblock_overlaps_region() argument
554 memblock_insert_region(struct memblock_type *type, int idx, phys_addr_t base, phys_addr_t size, int nid, enum memblock_flags flags) memblock_insert_region() argument
588 memblock_add_range(struct memblock_type *type, phys_addr_t base, phys_addr_t size, int nid, enum memblock_flags flags) memblock_add_range() argument
706 memblock_add_node(phys_addr_t base, phys_addr_t size, int nid, enum memblock_flags flags) memblock_add_node() argument
728 memblock_add(phys_addr_t base, phys_addr_t size) memblock_add() argument
754 memblock_isolate_range(struct memblock_type *type, phys_addr_t base, phys_addr_t size, int *start_rgn, int *end_rgn) memblock_isolate_range() argument
814 memblock_remove_range(struct memblock_type *type, phys_addr_t base, phys_addr_t size) memblock_remove_range() argument
829 memblock_remove(phys_addr_t base, phys_addr_t size) memblock_remove() argument
861 memblock_phys_free(phys_addr_t base, phys_addr_t size) memblock_phys_free() argument
872 memblock_reserve(phys_addr_t base, phys_addr_t size) memblock_reserve() argument
883 memblock_physmem_add(phys_addr_t base, phys_addr_t size) memblock_physmem_add() argument
905 memblock_setclr_flag(phys_addr_t base, phys_addr_t size, int set, int flag) memblock_setclr_flag() argument
935 memblock_mark_hotplug(phys_addr_t base, phys_addr_t size) memblock_mark_hotplug() argument
947 memblock_clear_hotplug(phys_addr_t base, phys_addr_t size) memblock_clear_hotplug() argument
959 memblock_mark_mirror(phys_addr_t base, phys_addr_t size) memblock_mark_mirror() argument
984 memblock_mark_nomap(phys_addr_t base, phys_addr_t size) memblock_mark_nomap() argument
996 memblock_clear_nomap(phys_addr_t base, phys_addr_t size) memblock_clear_nomap() argument
1283 memblock_set_node(phys_addr_t base, phys_addr_t size, struct memblock_type *type, int nid) memblock_set_node() argument
1659 memblock_free_late(phys_addr_t base, phys_addr_t size) memblock_free_late() argument
1744 memblock_cap_memory_range(phys_addr_t base, phys_addr_t size) memblock_cap_memory_range() argument
1855 memblock_is_region_memory(phys_addr_t base, phys_addr_t size) memblock_is_region_memory() argument
1877 memblock_is_region_reserved(phys_addr_t base, phys_addr_t size) memblock_is_region_reserved() argument
1919 phys_addr_t base, end, size; memblock_dump() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/include/
H A Dmalidp_io.h13 malidp_read32(u32 __iomem *base, u32 offset) in malidp_read32() argument
15 return readl((base + (offset >> 2))); in malidp_read32()
19 malidp_write32(u32 __iomem *base, u32 offset, u32 v) in malidp_write32() argument
21 writel(v, (base + (offset >> 2))); in malidp_write32()
25 malidp_write64(u32 __iomem *base, u32 offset, u64 v) in malidp_write64() argument
27 writel(lower_32_bits(v), (base + (offset >> 2))); in malidp_write64()
28 writel(upper_32_bits(v), (base + (offset >> 2) + 1)); in malidp_write64()
32 malidp_write32_mask(u32 __iomem *base, u32 offset, u32 m, u32 v) in malidp_write32_mask() argument
34 u32 tmp = malidp_read32(base, offset); in malidp_write32_mask()
37 malidp_write32(base, offse in malidp_write32_mask()
41 malidp_write_group(u32 __iomem *base, u32 offset, int num, const u32 *values) malidp_write_group() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/include/
H A Dmalidp_io.h13 malidp_read32(u32 __iomem *base, u32 offset) in malidp_read32() argument
15 return readl((base + (offset >> 2))); in malidp_read32()
19 malidp_write32(u32 __iomem *base, u32 offset, u32 v) in malidp_write32() argument
21 writel(v, (base + (offset >> 2))); in malidp_write32()
25 malidp_write64(u32 __iomem *base, u32 offset, u64 v) in malidp_write64() argument
27 writel(lower_32_bits(v), (base + (offset >> 2))); in malidp_write64()
28 writel(upper_32_bits(v), (base + (offset >> 2) + 1)); in malidp_write64()
32 malidp_write32_mask(u32 __iomem *base, u32 offset, u32 m, u32 v) in malidp_write32_mask() argument
34 u32 tmp = malidp_read32(base, offset); in malidp_write32_mask()
37 malidp_write32(base, offse in malidp_write32_mask()
41 malidp_write_group(u32 __iomem *base, u32 offset, int num, const u32 *values) malidp_write_group() argument
[all...]
/third_party/mesa3d/src/virtio/vulkan/
H A Dvn_image.h40 struct vn_object_base base; member
70 base.base,
75 struct vn_object_base base; member
80 base.base,
85 struct vn_object_base base; member
88 base.base,
93 struct vn_object_base base; member
[all...]
H A Dvn_descriptor_set.h46 struct vn_object_base base; member
57 base.base,
68 struct vn_object_base base; member
78 base.base,
92 struct vn_object_base base; member
100 base.base,
110 struct vn_object_base base; member
[all...]
H A Dvn_queue.h19 struct vn_object_base base; member
28 VK_DEFINE_HANDLE_CASTS(vn_queue, base.base, VkQueue, VK_OBJECT_TYPE_QUEUE)
46 struct vn_object_base base; member
62 base.base,
67 struct vn_object_base base; member
77 base.base,
82 struct vn_object_base base; member
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_scrn.c38 container_of(x, struct vmw_screen_object_unit, base.crtc)
40 container_of(x, struct vmw_screen_object_unit, base.encoder)
42 container_of(x, struct vmw_screen_object_unit, base.connector)
47 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
57 struct vmw_kms_dirty base; member
91 struct vmw_display_unit base; member
101 vmw_du_cleanup(&sou->base); in vmw_sou_destroy()
142 cmd->obj.id = sou->base.unit; in vmw_sou_fifo_create()
144 (sou->base in vmw_sou_fifo_create()
[all...]
/kernel/linux/linux-5.10/drivers/mtd/spi-nor/controllers/
H A Dintel-spi.c22 /* Offsets are from @ispi->base */
130 * @base: Beginning of MMIO space
147 void __iomem *base; member
169 dev_dbg(ispi->dev, "BFPREG=0x%08x\n", readl(ispi->base + BFPREG)); in intel_spi_dump_regs()
171 value = readl(ispi->base + HSFSTS_CTL); in intel_spi_dump_regs()
176 dev_dbg(ispi->dev, "FADDR=0x%08x\n", readl(ispi->base + FADDR)); in intel_spi_dump_regs()
177 dev_dbg(ispi->dev, "DLOCK=0x%08x\n", readl(ispi->base + DLOCK)); in intel_spi_dump_regs()
181 i, readl(ispi->base + FDATA(i))); in intel_spi_dump_regs()
183 dev_dbg(ispi->dev, "FRACC=0x%08x\n", readl(ispi->base + FRACC)); in intel_spi_dump_regs()
187 readl(ispi->base in intel_spi_dump_regs()
211 u32 base, limit; intel_spi_dump_regs() local
228 u32 region, base, limit; intel_spi_dump_regs() local
832 intel_spi_is_protected(const struct intel_spi *ispi, unsigned int base, unsigned int limit) intel_spi_is_protected() argument
875 u32 region, base, limit; intel_spi_fill_partition() local
[all...]
/kernel/linux/linux-5.10/arch/arm/plat-orion/include/plat/
H A Dpcie.h16 u32 orion_pcie_dev_id(void __iomem *base);
17 u32 orion_pcie_rev(void __iomem *base);
18 int orion_pcie_link_up(void __iomem *base);
19 int orion_pcie_x4_mode(void __iomem *base);
20 int orion_pcie_get_local_bus_nr(void __iomem *base);
21 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22 void orion_pcie_reset(void __iomem *base);
23 void orion_pcie_setup(void __iomem *base);
24 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
26 int orion_pcie_rd_conf_tlp(void __iomem *base, struc
[all...]
/kernel/linux/linux-6.6/arch/arm/plat-orion/include/plat/
H A Dpcie.h16 u32 orion_pcie_dev_id(void __iomem *base);
17 u32 orion_pcie_rev(void __iomem *base);
18 int orion_pcie_link_up(void __iomem *base);
19 int orion_pcie_x4_mode(void __iomem *base);
20 int orion_pcie_get_local_bus_nr(void __iomem *base);
21 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22 void orion_pcie_reset(void __iomem *base);
23 void orion_pcie_setup(void __iomem *base);
24 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
26 int orion_pcie_rd_conf_tlp(void __iomem *base, struc
[all...]
/kernel/linux/linux-5.10/include/linux/clk/
H A Ddavinci.h17 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
20 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
23 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
24 int dm355_psc_init(struct device *dev, void __iomem *base);
27 int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
28 int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
29 int dm365_psc_init(struct device *dev, void __iomem *base);
32 int dm644x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
33 int dm644x_psc_init(struct device *dev, void __iomem *base);
36 int dm646x_pll1_init(struct device *dev, void __iomem *base, struc
[all...]
/third_party/node/deps/v8/third_party/zlib/google/
H A Dcompression_utils.h10 #include "base/containers/span.h"
21 bool GzipCompress(base::span<const char> input,
32 bool GzipCompress(base::span<const char> input, std::string* output);
35 bool GzipCompress(base::span<const uint8_t> input, std::string* output);
42 // Like the above method, but uses base::span to avoid allocations if
46 bool GzipUncompress(base::span<const char> input,
47 base::span<const char> output);
50 bool GzipUncompress(base::span<const uint8_t> input,
51 base::span<const uint8_t> output);
57 bool GzipUncompress(base
[all...]
/third_party/node/deps/zlib/google/
H A Dcompression_utils.h10 #include "base/containers/span.h"
21 bool GzipCompress(base::span<const char> input,
32 bool GzipCompress(base::span<const char> input, std::string* output);
35 bool GzipCompress(base::span<const uint8_t> input, std::string* output);
42 // Like the above method, but uses base::span to avoid allocations if
46 bool GzipUncompress(base::span<const char> input,
47 base::span<const char> output);
50 bool GzipUncompress(base::span<const uint8_t> input,
51 base::span<const uint8_t> output);
57 bool GzipUncompress(base
[all...]
/third_party/skia/third_party/externals/zlib/google/
H A Dcompression_utils.h10 #include "base/containers/span.h"
21 bool GzipCompress(base::span<const char> input,
32 bool GzipCompress(base::span<const char> input, std::string* output);
35 bool GzipCompress(base::span<const uint8_t> input, std::string* output);
42 // Like the above method, but uses base::span to avoid allocations if
46 bool GzipUncompress(base::span<const char> input,
47 base::span<const char> output);
50 bool GzipUncompress(base::span<const uint8_t> input,
51 base::span<const uint8_t> output);
57 bool GzipUncompress(base
[all...]
/kernel/linux/linux-5.10/arch/c6x/platforms/
H A Ddscr.c51 u32 reg; /* offset from base */
52 u32 lockreg; /* offset from base */
104 void __iomem *base; member
132 void __iomem *reg_addr = dscr.base + reg; in dscr_write_locked1()
133 void __iomem *lock_addr = dscr.base + lock; in dscr_write_locked1()
162 soc_writel(key0, dscr.base + lock0); in dscr_write_locked2()
163 soc_writel(key1, dscr.base + lock1); in dscr_write_locked2()
164 soc_writel(val, dscr.base + reg); in dscr_write_locked2()
165 soc_writel(0, dscr.base + lock0); in dscr_write_locked2()
166 soc_writel(0, dscr.base in dscr_write_locked2()
281 dscr_parse_devstat(struct device_node *node, void __iomem *base) dscr_parse_devstat() argument
293 dscr_parse_silicon_rev(struct device_node *node, void __iomem *base) dscr_parse_silicon_rev() argument
324 dscr_parse_mac_fuse(struct device_node *node, void __iomem *base) dscr_parse_mac_fuse() argument
343 dscr_parse_rmii_resets(struct device_node *node, void __iomem *base) dscr_parse_rmii_resets() argument
365 dscr_parse_privperm(struct device_node *node, void __iomem *base) dscr_parse_privperm() argument
393 dscr_parse_locked_regs(struct device_node *node, void __iomem *base) dscr_parse_locked_regs() argument
428 dscr_parse_kick_regs(struct device_node *node, void __iomem *base) dscr_parse_kick_regs() argument
466 dscr_parse_devstate_ctl_regs(struct device_node *node, void __iomem *base) dscr_parse_devstate_ctl_regs() argument
522 dscr_parse_devstate_stat_regs(struct device_node *node, void __iomem *base) dscr_parse_devstate_stat_regs() argument
570 void __iomem *base; dscr_probe() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/lima/
H A Dlima_sched.c19 struct dma_fence base; member
50 return container_of(fence, struct lima_fence, base); in to_lima_fence()
62 return f->pipe->base.name; in lima_fence_get_timeline_name()
77 call_rcu(&f->base.rcu, lima_fence_release_rcu); in lima_fence_release()
95 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create()
103 return container_of(job, struct lima_sched_task, base); in to_lima_task()
108 return container_of(sched, struct lima_sched_pipe, base); in to_lima_pipe()
123 drm_gem_object_get(&bos[i]->base.base); in lima_sched_task_init()
125 err = drm_sched_job_init(&task->base, in lima_sched_task_init()
[all...]
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
H A Dphy-qcom-snps-eusb2.c126 void __iomem *base; member
147 static void qcom_snps_eusb2_hsphy_write_mask(void __iomem *base, u32 offset, in qcom_snps_eusb2_hsphy_write_mask() argument
152 reg = readl_relaxed(base + offset); in qcom_snps_eusb2_hsphy_write_mask()
155 writel_relaxed(reg, base + offset); in qcom_snps_eusb2_hsphy_write_mask()
158 readl_relaxed(base + offset); in qcom_snps_eusb2_hsphy_write_mask()
164 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
169 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
174 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
179 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_8, in qcom_eusb2_default_parameters()
184 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_ in qcom_eusb2_default_parameters()
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