Lines Matching refs:base
173 * @base: virtual memory area
186 void __iomem *base;
244 if (readl_relaxed(i2c_dev->base + SSC_STA) & SSC_STA_RIR)
247 count = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT) &
251 readl_relaxed(i2c_dev->base + SSC_RBUF);
262 st_i2c_set_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR);
263 st_i2c_clr_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR);
280 writel_relaxed(val, i2c_dev->base + SSC_CLR);
284 writel_relaxed(val, i2c_dev->base + SSC_CTL);
291 writel_relaxed(val, i2c_dev->base + SSC_BRG);
294 writel_relaxed(1, i2c_dev->base + SSC_PRE_SCALER_BRG);
297 writel_relaxed(SSC_I2C_I2CM, i2c_dev->base + SSC_I2C);
301 writel_relaxed(val, i2c_dev->base + SSC_REP_START_HOLD);
305 writel_relaxed(val, i2c_dev->base + SSC_REP_START_SETUP);
309 writel_relaxed(val, i2c_dev->base + SSC_START_HOLD);
313 writel_relaxed(val, i2c_dev->base + SSC_DATA_SETUP);
317 writel_relaxed(val, i2c_dev->base + SSC_STOP_SETUP);
321 writel_relaxed(val, i2c_dev->base + SSC_BUS_FREE);
325 writel_relaxed(val, i2c_dev->base + SSC_PRSCALER);
326 writel_relaxed(val, i2c_dev->base + SSC_PRSCALER_DATAOUT);
330 writel_relaxed(val, i2c_dev->base + SSC_NOISE_SUPP_WIDTH);
334 writel_relaxed(val, i2c_dev->base + SSC_NOISE_SUPP_WIDTH_DATAOUT);
352 writel_relaxed(0, i2c_dev->base + SSC_IEN);
357 st_i2c_set_bits(i2c_dev->base + SSC_CTL, ctl);
359 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_I2CM);
362 writel_relaxed(0, i2c_dev->base + SSC_TBUF);
364 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_I2CM);
375 sta = readl_relaxed(i2c_dev->base + SSC_STA);
402 writel_relaxed(tbuf | 1, i2c_dev->base + SSC_TBUF);
418 sta = readl_relaxed(i2c_dev->base + SSC_STA);
422 tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT);
448 sta = readl_relaxed(i2c_dev->base + SSC_STA);
452 tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT);
470 sta = readl_relaxed(i2c_dev->base + SSC_STA);
474 i = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT);
479 rbuf = readl_relaxed(i2c_dev->base + SSC_RBUF) >> 1;
497 st_i2c_clr_bits(i2c_dev->base + SSC_IEN, SSC_IEN_TEEN);
498 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STRTG);
501 st_i2c_set_bits(i2c_dev->base + SSC_IEN, SSC_IEN_STOPEN);
502 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG);
504 st_i2c_set_bits(i2c_dev->base + SSC_IEN, SSC_IEN_REPSTRTEN);
505 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_REPSTRTG);
537 readl_relaxed(i2c_dev->base + SSC_RBUF);
538 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_TXENB);
548 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_ACKG);
552 writel_relaxed(ien, i2c_dev->base + SSC_IEN);
572 ien = readl_relaxed(i2c_dev->base + SSC_IEN);
573 sta = readl_relaxed(i2c_dev->base + SSC_STA);
593 writel_relaxed(0, i2c_dev->base + SSC_IEN);
598 writel_relaxed(SSC_CLR_NACK, i2c_dev->base + SSC_CLR);
607 writel_relaxed(it, i2c_dev->base + SSC_IEN);
609 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG);
614 writel_relaxed(SSC_CLR_SSCARBL, i2c_dev->base + SSC_CLR);
617 writel_relaxed(it, i2c_dev->base + SSC_IEN);
619 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG);
633 readl(i2c_dev->base + SSC_IEN);
663 st_i2c_set_bits(i2c_dev->base + SSC_CTL, ctl);
668 st_i2c_set_bits(i2c_dev->base + SSC_I2C, i2c);
678 writel_relaxed(it, i2c_dev->base + SSC_IEN);
685 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STRTG);
699 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, i2c);
702 i2c_dev->base + SSC_CLR);
815 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
816 if (IS_ERR(i2c_dev->base))
817 return PTR_ERR(i2c_dev->base);