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/third_party/node/deps/v8/src/init/
H A Dv8.cc11 #include "src/base/atomicops.h"
12 #include "src/base/once.h"
13 #include "src/base/platform/platform.h"
95 v8::base::SetPrintStackTrace(platform_->GetStackTracePrinter()); in InitializePlatform()
228 base::OS::Initialize(FLAG_hard_abort, FLAG_gc_fake_mmap); in Initialize()
287 v8::base::SetPrintStackTrace(nullptr); in DisposePlatform()
301 base::Relaxed_Load(reinterpret_cast<base::AtomicWord*>(&platform_))); in GetCurrentPlatform()
307 base::Relaxed_Store(reinterpret_cast<base in SetPlatformForTesting()
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/third_party/node/deps/v8/src/libplatform/
H A Ddefault-job.cc7 #include "src/base/bits.h"
8 #include "src/base/macros.h"
48 base::MutexGuard guard(&mutex_); in NotifyConcurrencyIncrease()
69 DCHECK_LE(v8::base::bits::CountPopulation(assigned_task_ids) + 1, in AcquireTaskId()
79 task_id = v8::base::bits::CountTrailingZeros32(~assigned_task_ids); in AcquireTaskId()
98 base::MutexGuard guard(&mutex_); in Join()
110 base::MutexGuard guard(&mutex_); in Join()
117 base::MutexGuard guard(&mutex_); in CancelAndWait()
130 base::MutexGuard guard(&mutex_); in IsActive()
136 base in CanRunFirstTask()
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/third_party/node/deps/v8/src/sandbox/
H A Dsandbox.cc8 #include "src/base/bits.h"
9 #include "src/base/bounded-page-allocator.h"
10 #include "src/base/cpu.h"
11 #include "src/base/emulated-virtual-address-subspace.h"
12 #include "src/base/lazy-instance.h"
13 #include "src/base/utils/random-number-generator.h"
14 #include "src/base/virtual-address-space-page-allocator.h"
15 #include "src/base/virtual-address-space.h"
51 base::CPU cpu; in DetermineAddressSpaceLimit()
165 CHECK(base in Initialize()
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/third_party/mesa3d/src/gallium/drivers/asahi/
H A Dagx_state.h42 struct pipe_stream_output_target base; member
69 struct pipe_shader_state base; member
121 struct pipe_depth_stencil_alpha_state base; member
135 struct agx_shader_key base; member
148 struct pipe_context base; member
188 struct pipe_rasterizer_state base; member
198 struct pipe_sampler_state base; member
205 struct pipe_sampler_view base; member
236 struct pipe_resource base; member
302 struct pipe_transfer base; member
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/third_party/mesa3d/src/gallium/auxiliary/draw/
H A Ddraw_pt_vsplit.c40 struct draw_pt_front_end base; member
113 * Returns the base index to the elements array.
214 vsplit->base.run = vsplit_run_linear; in vsplit_prepare()
217 vsplit->base.run = vsplit_run_ubyte; in vsplit_prepare()
220 vsplit->base.run = vsplit_run_ushort; in vsplit_prepare()
223 vsplit->base.run = vsplit_run_uint; in vsplit_prepare()
267 vsplit->base.prepare = vsplit_prepare; in draw_pt_vsplit()
268 vsplit->base.run = NULL; in draw_pt_vsplit()
269 vsplit->base.flush = vsplit_flush; in draw_pt_vsplit()
270 vsplit->base in draw_pt_vsplit()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/
H A DSectionMemoryManager.cpp68 Addr = (uintptr_t)FreeMB.Free.base(); in allocateSection()
83 PendingMB = sys::MemoryBlock(PendingMB.base(), in allocateSection()
84 Addr + Size - (uintptr_t)PendingMB.base()); in allocateSection()
117 Addr = (uintptr_t)MB.base(); in allocateSection()
177 (PageSize - ((uintptr_t)M.base() % PageSize)) % PageSize; in trimBlockToPageSize()
183 sys::MemoryBlock Trimmed((void *)((uintptr_t)M.base() + StartOverlap), in trimBlockToPageSize()
186 assert(((uintptr_t)Trimmed.base() % PageSize) == 0); in trimBlockToPageSize()
188 assert(M.base() <= Trimmed.base() && in trimBlockToPageSize()
223 sys::Memory::InvalidateInstructionCache(Block.base(), in invalidateInstructionCache()
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/third_party/skia/third_party/externals/freetype/builds/windows/
H A Dftsystem.c173 stream->base = NULL; in ft_close_stream_by_munmap()
195 stream->base = NULL; in ft_close_stream_by_free()
311 stream->base = (unsigned char *) in FT_BASE_DEF()
316 if ( stream->base != NULL ) in FT_BASE_DEF()
326 stream->base = (unsigned char*)ft_alloc( stream->memory, stream->size ); in FT_BASE_DEF()
328 if ( !stream->base ) in FT_BASE_DEF()
342 stream->base + total_read_count, in FT_BASE_DEF()
360 stream->descriptor.pointer = stream->base; in FT_BASE_DEF()
372 ft_free( stream->memory, stream->base ); in FT_BASE_DEF()
377 stream->base in FT_BASE_DEF()
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/third_party/protobuf/js/experimental/runtime/
H A Dint64.js252 // base-2 to base-1e7, which allows us to represent the 64-bit range with
254 // a base-10 string.
257 // 2^24 = 16777216 = (1,6777216) in base-1e7.
258 // 2^48 = 281474976710656 = (2,8147497,6710656) in base-1e7.
266 // Assemble our three base-1e7 digits, ignoring carries. The maximum
274 const base = 10000000;
275 if (digitA >= base) {
276 digitB += Math.floor(digitA / base);
277 digitA %= base;
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/kernel/linux/linux-5.10/lib/math/
H A Dint_pow.c13 * int_pow - computes the exponentiation of the given base and exponent
14 * @base: base which will be raised to the given power
17 * Computes: pow(base, exp), i.e. @base raised to the @exp power
19 u64 int_pow(u64 base, unsigned int exp) in int_pow() argument
25 result *= base; in int_pow()
27 base *= base; in int_pow()
/kernel/linux/linux-6.6/lib/math/
H A Dint_pow.c13 * int_pow - computes the exponentiation of the given base and exponent
14 * @base: base which will be raised to the given power
17 * Computes: pow(base, exp), i.e. @base raised to the @exp power
19 u64 int_pow(u64 base, unsigned int exp) in int_pow() argument
25 result *= base; in int_pow()
27 base *= base; in int_pow()
/third_party/libbpf/include/linux/
H A Dring_buffer.h7 static inline __u64 ring_buffer_read_head(struct perf_event_mmap_page *base) in ring_buffer_read_head() argument
9 return smp_load_acquire(&base->data_head); in ring_buffer_read_head()
12 static inline void ring_buffer_write_tail(struct perf_event_mmap_page *base, in ring_buffer_write_tail() argument
15 smp_store_release(&base->data_tail, tail); in ring_buffer_write_tail()
/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dpxamci.c54 void __iomem *base; member
119 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) { in pxamci_stop_clock()
123 writel(STOP_CLOCK, host->base + MMC_STRPCL); in pxamci_stop_clock()
126 v = readl(host->base + MMC_STAT); in pxamci_stop_clock()
143 writel(host->imask, host->base + MMC_I_MASK); in pxamci_enable_irq()
153 writel(host->imask, host->base + MMC_I_MASK); in pxamci_disable_irq()
172 writel(nob, host->base + MMC_NOB); in pxamci_setup_data()
173 writel(data->blksz, host->base + MMC_BLKLEN); in pxamci_setup_data()
178 writel((timeout + 255) / 256, host->base + MMC_RDTO); in pxamci_setup_data()
256 writel(cmd->opcode, host->base in pxamci_start_cmd()
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/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-cti-core.c66 CS_UNLOCK(drvdata->base); in cti_write_all_hw_regs()
69 writel_relaxed(0, drvdata->base + CTICONTROL); in cti_write_all_hw_regs()
73 writel_relaxed(config->ctiinen[i], drvdata->base + CTIINEN(i)); in cti_write_all_hw_regs()
75 drvdata->base + CTIOUTEN(i)); in cti_write_all_hw_regs()
79 writel_relaxed(config->ctigate, drvdata->base + CTIGATE); in cti_write_all_hw_regs()
80 writel_relaxed(config->asicctl, drvdata->base + ASICCTL); in cti_write_all_hw_regs()
81 writel_relaxed(config->ctiappset, drvdata->base + CTIAPPSET); in cti_write_all_hw_regs()
84 writel_relaxed(1, drvdata->base + CTICONTROL); in cti_write_all_hw_regs()
86 CS_LOCK(drvdata->base); in cti_write_all_hw_regs()
103 rc = coresight_claim_device(drvdata->base); in cti_enable_hw()
848 void __iomem *base; cti_probe() local
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/kernel/linux/linux-5.10/drivers/pinctrl/actions/
H A Dpinctrl-owl.c40 * @base: pinctrl register base address
52 void __iomem *base; member
58 static void owl_update_bits(void __iomem *base, u32 mask, u32 val) in owl_update_bits() argument
62 reg_val = readl_relaxed(base); in owl_update_bits()
66 writel_relaxed(reg_val, base); in owl_update_bits()
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
88 owl_update_bits(pctrl->base + reg, mask, (arg << bit)); in owl_write_field()
208 owl_update_bits(pctrl->base + g->mfpctl_reg, mask, val); in owl_set_mux()
520 static void owl_gpio_update_reg(void __iomem *base, unsigne argument
835 void __iomem *base; owl_gpio_irq_handler() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_plane.c24 * @base: DRM plane state
45 struct drm_plane_state base; member
76 return container_of(s, struct atmel_hlcdc_plane_state, base); in drm_plane_state_to_atmel_hlcdc_plane_state()
362 const struct drm_format_info *format = state->base.fb->format; in atmel_hlcdc_plane_update_general_settings()
376 if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) { in atmel_hlcdc_plane_update_general_settings()
384 ATMEL_HLCDC_LAYER_GA(state->base.alpha); in atmel_hlcdc_plane_update_general_settings()
400 ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->format->format, in atmel_hlcdc_plane_update_format()
405 if ((state->base.fb->format->format == DRM_FORMAT_YUV422 || in atmel_hlcdc_plane_update_format()
406 state->base.fb->format->format == DRM_FORMAT_NV61) && in atmel_hlcdc_plane_update_format()
407 drm_rotation_90_or_270(state->base in atmel_hlcdc_plane_update_format()
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/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dpxamci.c53 void __iomem *base; member
118 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) { in pxamci_stop_clock()
122 writel(STOP_CLOCK, host->base + MMC_STRPCL); in pxamci_stop_clock()
125 v = readl(host->base + MMC_STAT); in pxamci_stop_clock()
142 writel(host->imask, host->base + MMC_I_MASK); in pxamci_enable_irq()
152 writel(host->imask, host->base + MMC_I_MASK); in pxamci_disable_irq()
171 writel(nob, host->base + MMC_NOB); in pxamci_setup_data()
172 writel(data->blksz, host->base + MMC_BLKLEN); in pxamci_setup_data()
177 writel((timeout + 255) / 256, host->base + MMC_RDTO); in pxamci_setup_data()
255 writel(cmd->opcode, host->base in pxamci_start_cmd()
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/kernel/linux/linux-6.6/drivers/pinctrl/actions/
H A Dpinctrl-owl.c42 * @base: pinctrl register base address
53 void __iomem *base; member
58 static void owl_update_bits(void __iomem *base, u32 mask, u32 val) in owl_update_bits() argument
62 reg_val = readl_relaxed(base); in owl_update_bits()
66 writel_relaxed(reg_val, base); in owl_update_bits()
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
88 owl_update_bits(pctrl->base + reg, mask, (arg << bit)); in owl_write_field()
208 owl_update_bits(pctrl->base + g->mfpctl_reg, mask, val); in owl_set_mux()
520 static void owl_gpio_update_reg(void __iomem *base, unsigne argument
852 void __iomem *base; owl_gpio_irq_handler() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_plane.c25 * @base: DRM plane state
47 struct drm_plane_state base; member
78 return container_of(s, struct atmel_hlcdc_plane_state, base); in drm_plane_state_to_atmel_hlcdc_plane_state()
364 const struct drm_format_info *format = state->base.fb->format; in atmel_hlcdc_plane_update_general_settings()
378 if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) { in atmel_hlcdc_plane_update_general_settings()
386 ATMEL_HLCDC_LAYER_GA(state->base.alpha); in atmel_hlcdc_plane_update_general_settings()
402 ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->format->format, in atmel_hlcdc_plane_update_format()
407 if ((state->base.fb->format->format == DRM_FORMAT_YUV422 || in atmel_hlcdc_plane_update_format()
408 state->base.fb->format->format == DRM_FORMAT_NV61) && in atmel_hlcdc_plane_update_format()
409 drm_rotation_90_or_270(state->base in atmel_hlcdc_plane_update_format()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_hotplug.c192 if (connector->base.polled != DRM_CONNECTOR_POLL_HPD) in intel_hpd_irq_storm_switch_to_polling()
203 connector->base.name); in intel_hpd_irq_storm_switch_to_polling()
206 connector->base.polled = DRM_CONNECTOR_POLL_CONNECT | in intel_hpd_irq_storm_switch_to_polling()
242 if (connector->base.polled != connector->polled) in intel_hpd_irq_storm_reenable_work()
245 connector->base.name); in intel_hpd_irq_storm_reenable_work()
246 connector->base.polled = connector->polled; in intel_hpd_irq_storm_reenable_work()
266 struct drm_device *dev = connector->base.dev; in intel_encoder_hotplug()
272 old_status = connector->base.status; in intel_encoder_hotplug()
273 old_epoch_counter = connector->base.epoch_counter; in intel_encoder_hotplug()
275 connector->base in intel_encoder_hotplug()
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/third_party/icu/icu4c/source/i18n/
H A Drbtz.cpp541 RuleBasedTimeZone::getNextTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getNextTransition() argument
549 UBool found = findNext(base, inclusive, transitionTime, fromRule, toRule); in getNextTransition()
560 RuleBasedTimeZone::getPreviousTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getPreviousTransition() argument
568 UBool found = findPrev(base, inclusive, transitionTime, fromRule, toRule); in getPreviousTransition()
680 UDate base; in findRuleInFinal() local
683 base = date; in findRuleInFinal()
688 base -= localDelta; in findRuleInFinal()
690 UBool avail0 = fr0->getPreviousStart(base, fr1->getRawOffset(), fr1->getDSTSavings(), true, start0); in findRuleInFinal()
692 base = date; in findRuleInFinal()
697 base in findRuleInFinal()
715 findNext(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findNext() argument
799 findPrev(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findPrev() argument
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/third_party/mesa3d/src/gallium/drivers/softpipe/
H A Dsp_image.c31 * Get the offset into the base image
41 if (spr->base.target == PIPE_BUFFER) in get_image_offset()
44 if (spr->base.target == PIPE_TEXTURE_1D_ARRAY || in get_image_offset()
45 spr->base.target == PIPE_TEXTURE_2D_ARRAY || in get_image_offset()
46 spr->base.target == PIPE_TEXTURE_CUBE_ARRAY || in get_image_offset()
47 spr->base.target == PIPE_TEXTURE_CUBE || in get_image_offset()
48 spr->base.target == PIPE_TEXTURE_3D) in get_image_offset()
164 util_format_get_stride(spr->base.format, spr->base.width0)) in get_dimensions()
169 level = spr->base in get_dimensions()
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/third_party/node/deps/icu-small/source/i18n/
H A Drbtz.cpp541 RuleBasedTimeZone::getNextTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getNextTransition() argument
549 UBool found = findNext(base, inclusive, transitionTime, fromRule, toRule); in getNextTransition()
560 RuleBasedTimeZone::getPreviousTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getPreviousTransition() argument
568 UBool found = findPrev(base, inclusive, transitionTime, fromRule, toRule); in getPreviousTransition()
680 UDate base; in findRuleInFinal() local
683 base = date; in findRuleInFinal()
688 base -= localDelta; in findRuleInFinal()
690 UBool avail0 = fr0->getPreviousStart(base, fr1->getRawOffset(), fr1->getDSTSavings(), true, start0); in findRuleInFinal()
692 base = date; in findRuleInFinal()
697 base in findRuleInFinal()
715 findNext(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findNext() argument
799 findPrev(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findPrev() argument
[all...]
/third_party/skia/third_party/externals/icu/source/i18n/
H A Drbtz.cpp546 RuleBasedTimeZone::getNextTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getNextTransition() argument
554 UBool found = findNext(base, inclusive, transitionTime, fromRule, toRule); in getNextTransition()
565 RuleBasedTimeZone::getPreviousTransition(UDate base, UBool inclusive, TimeZoneTransition& result) const { in getPreviousTransition() argument
573 UBool found = findPrev(base, inclusive, transitionTime, fromRule, toRule); in getPreviousTransition()
703 UDate base; in findRuleInFinal() local
706 base = date; in findRuleInFinal()
711 base -= localDelta; in findRuleInFinal()
713 UBool avail0 = fr0->getPreviousStart(base, fr1->getRawOffset(), fr1->getDSTSavings(), TRUE, start0); in findRuleInFinal()
715 base = date; in findRuleInFinal()
720 base in findRuleInFinal()
738 findNext(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findNext() argument
822 findPrev(UDate base, UBool inclusive, UDate& transitionTime, TimeZoneRule*& fromRule, TimeZoneRule*& toRule) const findPrev() argument
[all...]
/kernel/linux/linux-5.10/drivers/dma/
H A Dzx_dma.c111 void __iomem *base; member
119 void __iomem *base; member
142 val = readl_relaxed(phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
145 writel_relaxed(val, phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
148 writel_relaxed(val, d->base + REG_ZX_TC_IRQ_RAW); in zx_dma_terminate_chan()
149 writel_relaxed(val, d->base + REG_ZX_SRC_ERR_IRQ_RAW); in zx_dma_terminate_chan()
150 writel_relaxed(val, d->base + REG_ZX_DST_ERR_IRQ_RAW); in zx_dma_terminate_chan()
151 writel_relaxed(val, d->base + REG_ZX_CFG_ERR_IRQ_RAW); in zx_dma_terminate_chan()
156 writel_relaxed(hw->saddr, phy->base + REG_ZX_SRC_ADDR); in zx_dma_set_desc()
157 writel_relaxed(hw->daddr, phy->base in zx_dma_set_desc()
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/
H A Dhip04_eth.c210 void __iomem *base; member
284 writel_relaxed(val, priv->base + GE_PORT_MODE); in hip04_config_port()
287 writel_relaxed(val, priv->base + GE_DUPLEX_TYPE); in hip04_config_port()
290 writel_relaxed(val, priv->base + GE_MODE_CHANGE_REG); in hip04_config_port()
316 val = readl_relaxed(priv->base + PPE_CFG_STS_MODE); in hip04_config_fifo()
318 writel_relaxed(val, priv->base + PPE_CFG_STS_MODE); in hip04_config_fifo()
325 writel_relaxed(val, priv->base + PPE_CFG_QOS_VMID_GEN); in hip04_config_fifo()
336 writel_relaxed(val, priv->base + PPE_CFG_RX_CTRL_REG); in hip04_config_fifo()
339 writel_relaxed(val, priv->base + PPE_CFG_RX_PKT_MODE_REG); in hip04_config_fifo()
342 writel_relaxed(val, priv->base in hip04_config_fifo()
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