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Searched refs:vgpu (Results 1 - 25 of 83) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dvgpu.c38 void populate_pvinfo_page(struct intel_vgpu *vgpu) in populate_pvinfo_page() argument
40 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in populate_pvinfo_page()
42 vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC; in populate_pvinfo_page()
43 vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1; in populate_pvinfo_page()
44 vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0; in populate_pvinfo_page()
45 vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0; in populate_pvinfo_page()
46 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; in populate_pvinfo_page()
48 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT; in populate_pvinfo_page()
49 vgpu_vreg_t(vgpu, vgtif_re in populate_pvinfo_page()
214 intel_gvt_activate_vgpu(struct intel_vgpu *vgpu) intel_gvt_activate_vgpu() argument
229 intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu) intel_gvt_deactivate_vgpu() argument
255 intel_gvt_release_vgpu(struct intel_vgpu *vgpu) intel_gvt_release_vgpu() argument
273 intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu) intel_gvt_destroy_vgpu() argument
324 struct intel_vgpu *vgpu; intel_gvt_create_idle_vgpu() local
359 intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu) intel_gvt_destroy_idle_vgpu() argument
372 struct intel_vgpu *vgpu; __intel_gvt_create_vgpu() local
486 struct intel_vgpu *vgpu; intel_gvt_create_vgpu() local
538 intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, intel_engine_mask_t engine_mask) intel_gvt_reset_vgpu_locked() argument
609 intel_gvt_reset_vgpu(struct intel_vgpu *vgpu) intel_gvt_reset_vgpu() argument
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H A Ddisplay.c38 static int get_edp_pipe(struct intel_vgpu *vgpu) in get_edp_pipe() argument
40 u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP); in get_edp_pipe()
58 static int edp_pipe_is_enabled(struct intel_vgpu *vgpu) in edp_pipe_is_enabled() argument
60 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in edp_pipe_is_enabled()
62 if (!(vgpu_vreg_t(vgpu, PIPECONF(_PIPE_EDP)) & PIPECONF_ENABLE)) in edp_pipe_is_enabled()
65 if (!(vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP) & TRANS_DDI_FUNC_ENABLE)) in edp_pipe_is_enabled()
70 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe) in pipe_is_enabled() argument
72 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in pipe_is_enabled()
78 if (vgpu_vreg_t(vgpu, PIPECONF(pipe)) & PIPECONF_ENABLE) in pipe_is_enabled()
81 if (edp_pipe_is_enabled(vgpu) in pipe_is_enabled()
170 emulate_monitor_status_change(struct intel_vgpu *vgpu) emulate_monitor_status_change() argument
507 clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num) clean_virtual_dp_monitor() argument
518 setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num, int type, unsigned int resolution) setup_virtual_dp_monitor() argument
564 struct intel_vgpu *vgpu; intel_gvt_check_vblank_emulation() local
590 emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe) emulate_vblank_on_pipe() argument
619 emulate_vblank(struct intel_vgpu *vgpu) emulate_vblank() argument
638 struct intel_vgpu *vgpu; intel_gvt_emulate_vblank() local
655 intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected) intel_vgpu_emulate_hotplug() argument
744 intel_vgpu_clean_display(struct intel_vgpu *vgpu) intel_vgpu_clean_display() argument
768 intel_vgpu_init_display(struct intel_vgpu *vgpu, u64 resolution) intel_vgpu_init_display() argument
792 intel_vgpu_reset_display(struct intel_vgpu *vgpu) intel_vgpu_reset_display() argument
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H A Dgvt.h112 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)
126 #define vgpu_opregion(vgpu) (&(vgpu->opregion))
145 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
146 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
147 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
185 * scheduler structure. So below 2 vgpu data are protected
217 static inline void *intel_vgpu_vdev(struct intel_vgpu *vgpu) in intel_vgpu_vdev() argument
219 return vgpu in intel_vgpu_vdev()
449 intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu, u32 offset, u32 val, bool low) intel_vgpu_write_pci_bar() argument
529 intel_vgpu_get_bar_gpa(struct intel_vgpu *vgpu, int bar) intel_vgpu_get_bar_gpa() argument
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H A Daperture_gm.c41 static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm) in alloc_gm() argument
43 struct intel_gvt *gvt = vgpu->gvt; in alloc_gm()
51 node = &vgpu->gm.high_gm_node; in alloc_gm()
52 size = vgpu_hidden_sz(vgpu); in alloc_gm()
57 node = &vgpu->gm.low_gm_node; in alloc_gm()
58 size = vgpu_aperture_sz(vgpu); in alloc_gm()
79 static int alloc_vgpu_gm(struct intel_vgpu *vgpu) in alloc_vgpu_gm() argument
81 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_gm()
85 ret = alloc_gm(vgpu, false); in alloc_vgpu_gm()
89 ret = alloc_gm(vgpu, tru in alloc_vgpu_gm()
107 free_vgpu_gm(struct intel_vgpu *vgpu) free_vgpu_gm() argument
128 intel_vgpu_write_fence(struct intel_vgpu *vgpu, u32 fence, u64 value) intel_vgpu_write_fence() argument
157 _clear_vgpu_fence(struct intel_vgpu *vgpu) _clear_vgpu_fence() argument
165 free_vgpu_fence(struct intel_vgpu *vgpu) free_vgpu_fence() argument
190 alloc_vgpu_fence(struct intel_vgpu *vgpu) alloc_vgpu_fence() argument
232 free_resource(struct intel_vgpu *vgpu) free_resource() argument
241 alloc_resource(struct intel_vgpu *vgpu, struct intel_vgpu_creation_params *param) alloc_resource() argument
306 intel_vgpu_free_resource(struct intel_vgpu *vgpu) intel_vgpu_free_resource() argument
320 intel_vgpu_reset_resource(struct intel_vgpu *vgpu) intel_vgpu_reset_resource() argument
341 intel_vgpu_alloc_resource(struct intel_vgpu *vgpu, struct intel_vgpu_creation_params *param) intel_vgpu_alloc_resource() argument
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H A Dcfg_space.c59 * @vgpu: target vgpu
68 static void vgpu_pci_cfg_mem_write(struct intel_vgpu *vgpu, unsigned int off, in vgpu_pci_cfg_mem_write() argument
71 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write()
96 if (off == vgpu->cfg_space.pmcsr_off && vgpu->cfg_space.pmcsr_off) { in vgpu_pci_cfg_mem_write()
97 pwr = (pci_power_t __force)(*(u16*)(&vgpu_cfg_space(vgpu)[off]) in vgpu_pci_cfg_mem_write()
100 vgpu->d3_entered = true; in vgpu_pci_cfg_mem_write()
101 gvt_dbg_core("vgpu-%d power status changed to %d\n", in vgpu_pci_cfg_mem_write()
102 vgpu in vgpu_pci_cfg_mem_write()
116 intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_read() argument
132 map_aperture(struct intel_vgpu *vgpu, bool map) map_aperture() argument
162 trap_gttmmio(struct intel_vgpu *vgpu, bool trap) trap_gttmmio() argument
188 emulate_pci_command_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_command_write() argument
219 emulate_pci_rom_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_rom_bar_write() argument
233 emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_bar_write() argument
310 intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_write() argument
373 intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, bool primary) intel_vgpu_init_cfg_space() argument
436 intel_vgpu_reset_cfg_space(struct intel_vgpu *vgpu) intel_vgpu_reset_cfg_space() argument
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H A Dmpt.h80 static inline int intel_gvt_hypervisor_attach_vgpu(struct intel_vgpu *vgpu) in intel_gvt_hypervisor_attach_vgpu() argument
86 return intel_gvt_host.mpt->attach_vgpu(vgpu, &vgpu->handle); in intel_gvt_hypervisor_attach_vgpu()
96 static inline void intel_gvt_hypervisor_detach_vgpu(struct intel_vgpu *vgpu) in intel_gvt_hypervisor_detach_vgpu() argument
102 intel_gvt_host.mpt->detach_vgpu(vgpu); in intel_gvt_hypervisor_detach_vgpu()
116 static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu) in intel_gvt_hypervisor_inject_msi() argument
118 unsigned long offset = vgpu->gvt->device_info.msi_cap_offset; in intel_gvt_hypervisor_inject_msi()
123 control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset)); in intel_gvt_hypervisor_inject_msi()
124 addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset)); in intel_gvt_hypervisor_inject_msi()
125 data = *(u16 *)(vgpu_cfg_space(vgpu) in intel_gvt_hypervisor_inject_msi()
162 intel_gvt_hypervisor_enable_page_track( struct intel_vgpu *vgpu, unsigned long gfn) intel_gvt_hypervisor_enable_page_track() argument
176 intel_gvt_hypervisor_disable_page_track( struct intel_vgpu *vgpu, unsigned long gfn) intel_gvt_hypervisor_disable_page_track() argument
192 intel_gvt_hypervisor_read_gpa(struct intel_vgpu *vgpu, unsigned long gpa, void *buf, unsigned long len) intel_gvt_hypervisor_read_gpa() argument
208 intel_gvt_hypervisor_write_gpa(struct intel_vgpu *vgpu, unsigned long gpa, void *buf, unsigned long len) intel_gvt_hypervisor_write_gpa() argument
222 intel_gvt_hypervisor_gfn_to_mfn( struct intel_vgpu *vgpu, unsigned long gfn) intel_gvt_hypervisor_gfn_to_mfn() argument
238 intel_gvt_hypervisor_dma_map_guest_page( struct intel_vgpu *vgpu, unsigned long gfn, unsigned long size, dma_addr_t *dma_addr) intel_gvt_hypervisor_dma_map_guest_page() argument
251 intel_gvt_hypervisor_dma_unmap_guest_page( struct intel_vgpu *vgpu, dma_addr_t dma_addr) intel_gvt_hypervisor_dma_unmap_guest_page() argument
266 intel_gvt_hypervisor_dma_pin_guest_page(struct intel_vgpu *vgpu, dma_addr_t dma_addr) intel_gvt_hypervisor_dma_pin_guest_page() argument
283 intel_gvt_hypervisor_map_gfn_to_mfn( struct intel_vgpu *vgpu, unsigned long gfn, unsigned long mfn, unsigned int nr, bool map) intel_gvt_hypervisor_map_gfn_to_mfn() argument
306 intel_gvt_hypervisor_set_trap_area( struct intel_vgpu *vgpu, u64 start, u64 end, bool map) intel_gvt_hypervisor_set_trap_area() argument
323 intel_gvt_hypervisor_set_opregion(struct intel_vgpu *vgpu) intel_gvt_hypervisor_set_opregion() argument
339 intel_gvt_hypervisor_set_edid(struct intel_vgpu *vgpu, int port_num) intel_gvt_hypervisor_set_edid() argument
355 intel_gvt_hypervisor_get_vfio_device(struct intel_vgpu *vgpu) intel_gvt_hypervisor_get_vfio_device() argument
370 intel_gvt_hypervisor_put_vfio_device(struct intel_vgpu *vgpu) intel_gvt_hypervisor_put_vfio_device() argument
386 intel_gvt_hypervisor_is_valid_gfn( struct intel_vgpu *vgpu, unsigned long gfn) intel_gvt_hypervisor_is_valid_gfn() argument
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H A Dmmio.c41 * @vgpu: a vGPU
47 int intel_vgpu_gpa_to_mmio_offset(struct intel_vgpu *vgpu, u64 gpa) in intel_vgpu_gpa_to_mmio_offset() argument
49 u64 gttmmio_gpa = intel_vgpu_get_bar_gpa(vgpu, PCI_BASE_ADDRESS_0); in intel_vgpu_gpa_to_mmio_offset()
60 static void failsafe_emulate_mmio_rw(struct intel_vgpu *vgpu, u64 pa, in failsafe_emulate_mmio_rw() argument
67 if (!vgpu || !p_data) in failsafe_emulate_mmio_rw()
70 gvt = vgpu->gvt; in failsafe_emulate_mmio_rw()
71 mutex_lock(&vgpu->vgpu_lock); in failsafe_emulate_mmio_rw()
72 offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa); in failsafe_emulate_mmio_rw()
75 intel_vgpu_default_mmio_read(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
78 intel_vgpu_default_mmio_write(vgpu, offse in failsafe_emulate_mmio_rw()
102 intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_read() argument
177 intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_write() argument
240 intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr) intel_vgpu_reset_mmio() argument
307 intel_vgpu_init_mmio(struct intel_vgpu *vgpu) intel_vgpu_init_mmio() argument
325 intel_vgpu_clean_mmio(struct intel_vgpu *vgpu) intel_vgpu_clean_mmio() argument
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H A Dedid.c49 static unsigned char edid_get_byte(struct intel_vgpu *vgpu) in edid_get_byte() argument
51 struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid; in edid_get_byte()
68 if (intel_vgpu_has_monitor_on_port(vgpu, edid->port)) { in edid_get_byte()
70 intel_vgpu_port(vgpu, edid->port)->edid; in edid_get_byte()
126 static void reset_gmbus_controller(struct intel_vgpu *vgpu) in reset_gmbus_controller() argument
128 vgpu_vreg_t(vgpu, PCH_GMBUS2) = GMBUS_HW_RDY; in reset_gmbus_controller()
129 if (!vgpu->display.i2c_edid.edid_available) in reset_gmbus_controller()
130 vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER; in reset_gmbus_controller()
131 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in reset_gmbus_controller()
135 static int gmbus0_mmio_write(struct intel_vgpu *vgpu, in gmbus0_mmio_write() argument
175 gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus1_mmio_write() argument
276 gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_write() argument
285 gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_read() argument
338 gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_read() argument
349 gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_write() argument
373 intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_read() argument
403 intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_write() argument
477 intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, int port_idx, unsigned int offset, void *p_data) intel_gvt_i2c_handle_aux_ch_write() argument
568 intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu) intel_vgpu_init_i2c_edid() argument
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H A Dgtt.c54 bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size) in intel_gvt_ggtt_validate_range() argument
57 return vgpu_gmadr_is_valid(vgpu, addr); in intel_gvt_ggtt_validate_range()
59 if (vgpu_gmadr_is_aperture(vgpu, addr) && in intel_gvt_ggtt_validate_range()
60 vgpu_gmadr_is_aperture(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
62 else if (vgpu_gmadr_is_hidden(vgpu, addr) && in intel_gvt_ggtt_validate_range()
63 vgpu_gmadr_is_hidden(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
72 int intel_gvt_ggtt_gmadr_g2h(struct intel_vgpu *vgpu, u64 g_addr, u64 *h_addr) in intel_gvt_ggtt_gmadr_g2h() argument
74 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_ggtt_gmadr_g2h()
76 if (drm_WARN(&i915->drm, !vgpu_gmadr_is_valid(vgpu, g_addr), in intel_gvt_ggtt_gmadr_g2h()
80 if (vgpu_gmadr_is_aperture(vgpu, g_add in intel_gvt_ggtt_gmadr_g2h()
90 intel_gvt_ggtt_gmadr_h2g(struct intel_vgpu *vgpu, u64 h_addr, u64 *g_addr) intel_gvt_ggtt_gmadr_h2g() argument
107 intel_gvt_ggtt_index_g2h(struct intel_vgpu *vgpu, unsigned long g_index, unsigned long *h_index) intel_gvt_ggtt_index_g2h() argument
122 intel_gvt_ggtt_h2g_index(struct intel_vgpu *vgpu, unsigned long h_index, unsigned long *g_index) intel_gvt_ggtt_h2g_index() argument
303 gtt_get_entry64(void *pt, struct intel_gvt_gtt_entry *e, unsigned long index, bool hypervisor_access, unsigned long gpa, struct intel_vgpu *vgpu) gtt_get_entry64() argument
328 gtt_set_entry64(void *pt, struct intel_gvt_gtt_entry *e, unsigned long index, bool hypervisor_access, unsigned long gpa, struct intel_vgpu *vgpu) gtt_set_entry64() argument
769 ppgtt_free_all_spt(struct intel_vgpu *vgpu) ppgtt_free_all_spt() argument
809 intel_vgpu_find_spt_by_gfn( struct intel_vgpu *vgpu, unsigned long gfn) intel_vgpu_find_spt_by_gfn() argument
822 intel_vgpu_find_spt_by_mfn( struct intel_vgpu *vgpu, unsigned long mfn) intel_vgpu_find_spt_by_mfn() argument
831 ppgtt_alloc_spt( struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type) ppgtt_alloc_spt() argument
881 ppgtt_alloc_spt_gfn( struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type, unsigned long gfn, bool guest_pde_ips) ppgtt_alloc_spt_gfn() argument
952 ppgtt_invalidate_spt_by_shadow_entry(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *e) ppgtt_invalidate_spt_by_shadow_entry() argument
992 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_invalidate_pte() local
1009 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_invalidate_spt() local
1060 vgpu_ips_enabled(struct intel_vgpu *vgpu) vgpu_ips_enabled() argument
1078 ppgtt_populate_spt_by_guest_entry( struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *we) ppgtt_populate_spt_by_guest_entry() argument
1165 is_2MB_gtt_possible(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *entry) is_2MB_gtt_possible() argument
1181 split_2MB_gtt_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *se) split_2MB_gtt_entry() argument
1237 split_64KB_gtt_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *se) split_64KB_gtt_entry() argument
1268 ppgtt_populate_shadow_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *ge) ppgtt_populate_shadow_entry() argument
1324 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_populate_spt() local
1368 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_entry_removal() local
1413 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_entry_add() local
1445 sync_oos_page(struct intel_vgpu *vgpu, struct intel_vgpu_oos_page *oos_page) sync_oos_page() argument
1488 detach_oos_page(struct intel_vgpu *vgpu, struct intel_vgpu_oos_page *oos_page) detach_oos_page() argument
1593 intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu) intel_vgpu_sync_oos_pages() argument
1619 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_write_page_table() local
1706 intel_vgpu_flush_post_shadow(struct intel_vgpu *vgpu) intel_vgpu_flush_post_shadow() argument
1737 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_write_page_table_bytes() local
1800 struct intel_vgpu *vgpu = mm->vgpu; invalidate_ppgtt_mm() local
1830 struct intel_vgpu *vgpu = mm->vgpu; shadow_ppgtt_mm() local
1871 vgpu_alloc_mm(struct intel_vgpu *vgpu) vgpu_alloc_mm() argument
1902 intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type root_entry_type, u64 pdps[]) intel_vgpu_create_ppgtt_mm() argument
1945 intel_vgpu_create_ggtt_mm(struct intel_vgpu *vgpu) intel_vgpu_create_ggtt_mm() argument
2084 struct intel_vgpu *vgpu = mm->vgpu; ppgtt_get_next_level_entry() local
2112 struct intel_vgpu *vgpu = mm->vgpu; intel_vgpu_gma_to_gpa() local
2184 emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) emulate_ggtt_mmio_read() argument
2222 intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) intel_vgpu_emulate_ggtt_mmio_read() argument
2236 ggtt_invalidate_pte(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *entry) ggtt_invalidate_pte() argument
2248 emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) emulate_ggtt_mmio_write() argument
2375 intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) intel_vgpu_emulate_ggtt_mmio_write() argument
2404 alloc_scratch_pages(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type) alloc_scratch_pages() argument
2469 release_scratch_page_tree(struct intel_vgpu *vgpu) release_scratch_page_tree() argument
2489 create_scratch_page_tree(struct intel_vgpu *vgpu) create_scratch_page_tree() argument
2516 intel_vgpu_init_gtt(struct intel_vgpu *vgpu) intel_vgpu_init_gtt() argument
2539 intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu) intel_vgpu_destroy_all_ppgtt_mm() argument
2558 intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu) intel_vgpu_destroy_ggtt_mm() argument
2583 intel_vgpu_clean_gtt(struct intel_vgpu *vgpu) intel_vgpu_clean_gtt() argument
2654 intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]) intel_vgpu_find_ppgtt_mm() argument
2691 intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type root_entry_type, u64 pdps[]) intel_vgpu_get_ppgtt_mm() argument
2717 intel_vgpu_put_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]) intel_vgpu_put_ppgtt_mm() argument
2812 intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) intel_vgpu_invalidate_ppgtt() argument
2838 intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old) intel_vgpu_reset_ggtt() argument
2883 struct intel_vgpu *vgpu; intel_gvt_restore_ggtt() local
[all...]
H A Dsched_policy.c37 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu) in vgpu_has_pending_workload() argument
42 for_each_engine(engine, vgpu->gvt->gt, i) { in vgpu_has_pending_workload()
43 if (!list_empty(workload_q_head(vgpu, engine))) in vgpu_has_pending_workload()
55 struct intel_vgpu *vgpu; member
75 static void vgpu_update_timeslice(struct intel_vgpu *vgpu, ktime_t cur_time) in vgpu_update_timeslice() argument
80 if (!vgpu || vgpu == vgpu->gvt->idle_vgpu) in vgpu_update_timeslice()
83 vgpu_data = vgpu->sched_data; in vgpu_update_timeslice()
150 * stop dispatching workload for current vgpu in try_to_schedule_next_vgpu()
179 struct intel_vgpu *vgpu = NULL; find_busy_vgpu() local
216 struct intel_vgpu *vgpu = NULL; tbs_sched_func() local
311 tbs_sched_init_vgpu(struct intel_vgpu *vgpu) tbs_sched_init_vgpu() argument
328 tbs_sched_clean_vgpu(struct intel_vgpu *vgpu) tbs_sched_clean_vgpu() argument
341 tbs_sched_start_schedule(struct intel_vgpu *vgpu) tbs_sched_start_schedule() argument
363 tbs_sched_stop_schedule(struct intel_vgpu *vgpu) tbs_sched_stop_schedule() argument
406 intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu) intel_vgpu_init_sched_policy() argument
417 intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu) intel_vgpu_clean_sched_policy() argument
424 intel_vgpu_start_schedule(struct intel_vgpu *vgpu) intel_vgpu_start_schedule() argument
443 intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) intel_vgpu_stop_schedule() argument
[all...]
H A Dpage_track.c28 * @vgpu: a vGPU
35 struct intel_vgpu *vgpu, unsigned long gfn) in intel_vgpu_find_page_track()
37 return radix_tree_lookup(&vgpu->page_track_tree, gfn); in intel_vgpu_find_page_track()
42 * @vgpu: a vGPU
50 int intel_vgpu_register_page_track(struct intel_vgpu *vgpu, unsigned long gfn, in intel_vgpu_register_page_track() argument
56 track = intel_vgpu_find_page_track(vgpu, gfn); in intel_vgpu_register_page_track()
67 ret = radix_tree_insert(&vgpu->page_track_tree, gfn, track); in intel_vgpu_register_page_track()
78 * @vgpu: a vGPU
82 void intel_vgpu_unregister_page_track(struct intel_vgpu *vgpu, in intel_vgpu_unregister_page_track() argument
87 track = radix_tree_delete(&vgpu in intel_vgpu_unregister_page_track()
34 intel_vgpu_find_page_track( struct intel_vgpu *vgpu, unsigned long gfn) intel_vgpu_find_page_track() argument
103 intel_vgpu_enable_page_track(struct intel_vgpu *vgpu, unsigned long gfn) intel_vgpu_enable_page_track() argument
130 intel_vgpu_disable_page_track(struct intel_vgpu *vgpu, unsigned long gfn) intel_vgpu_disable_page_track() argument
159 intel_vgpu_page_track_handler(struct intel_vgpu *vgpu, u64 gpa, void *data, unsigned int bytes) intel_vgpu_page_track_handler() argument
[all...]
H A Dkvmgt.c66 size_t (*rw)(struct intel_vgpu *vgpu, char *buf,
68 void (*release)(struct intel_vgpu *vgpu,
93 struct intel_vgpu *vgpu; member
102 struct intel_vgpu *vgpu; member
112 struct intel_vgpu *vgpu; member
137 static inline struct kvmgt_vdev *kvmgt_vdev(struct intel_vgpu *vgpu) in kvmgt_vdev() argument
139 return intel_vgpu_vdev(vgpu); in kvmgt_vdev()
151 static void gvt_unpin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_unpin_guest_page() argument
154 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in gvt_unpin_guest_page()
155 struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu); in gvt_unpin_guest_page()
171 gvt_pin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, unsigned long size, struct page **page) gvt_pin_guest_page() argument
221 gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn, dma_addr_t *dma_addr, unsigned long size) gvt_dma_map_page() argument
244 gvt_dma_unmap_page(struct intel_vgpu *vgpu, unsigned long gfn, dma_addr_t dma_addr, unsigned long size) gvt_dma_unmap_page() argument
253 __gvt_cache_find_dma_addr(struct intel_vgpu *vgpu, dma_addr_t dma_addr) __gvt_cache_find_dma_addr() argument
272 __gvt_cache_find_gfn(struct intel_vgpu *vgpu, gfn_t gfn) __gvt_cache_find_gfn() argument
290 __gvt_cache_add(struct intel_vgpu *vgpu, gfn_t gfn, dma_addr_t dma_addr, unsigned long size) __gvt_cache_add() argument
340 __gvt_cache_remove_entry(struct intel_vgpu *vgpu, struct gvt_dma *entry) __gvt_cache_remove_entry() argument
351 gvt_cache_destroy(struct intel_vgpu *vgpu) gvt_cache_destroy() argument
371 gvt_cache_init(struct intel_vgpu *vgpu) gvt_cache_init() argument
449 intel_vgpu_reg_rw_opregion(struct intel_vgpu *vgpu, char *buf, size_t count, loff_t *ppos, bool iswrite) intel_vgpu_reg_rw_opregion() argument
469 intel_vgpu_reg_release_opregion(struct intel_vgpu *vgpu, struct vfio_region *region) intel_vgpu_reg_release_opregion() argument
479 handle_edid_regs(struct intel_vgpu *vgpu, struct vfio_edid_region *region, char *buf, size_t count, u16 offset, bool is_write) handle_edid_regs() argument
550 intel_vgpu_reg_rw_edid(struct intel_vgpu *vgpu, char *buf, size_t count, loff_t *ppos, bool iswrite) intel_vgpu_reg_rw_edid() argument
573 intel_vgpu_reg_release_edid(struct intel_vgpu *vgpu, struct vfio_region *region) intel_vgpu_reg_release_edid() argument
584 intel_vgpu_register_reg(struct intel_vgpu *vgpu, unsigned int type, unsigned int subtype, const struct intel_vgpu_regops *ops, size_t size, u32 flags, void *data) intel_vgpu_register_reg() argument
611 struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu; kvmgt_get_vfio_device() local
626 struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu; kvmgt_set_opregion() local
654 struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu; kvmgt_set_edid() local
682 kvmgt_put_vfio_device(void *vgpu) kvmgt_put_vfio_device() argument
694 struct intel_vgpu *vgpu = NULL; intel_vgpu_create() local
733 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_remove() local
748 struct intel_vgpu *vgpu = vdev->vgpu; intel_vgpu_iommu_notifier() local
794 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_open() local
861 intel_vgpu_release_msi_eventfd_ctx(struct intel_vgpu *vgpu) intel_vgpu_release_msi_eventfd_ctx() argument
873 __intel_vgpu_release(struct intel_vgpu *vgpu) __intel_vgpu_release() argument
913 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_release() local
926 intel_vgpu_get_bar_addr(struct intel_vgpu *vgpu, int bar) intel_vgpu_get_bar_addr() argument
953 intel_vgpu_bar_rw(struct intel_vgpu *vgpu, int bar, u64 off, void *buf, unsigned int count, bool is_write) intel_vgpu_bar_rw() argument
968 intel_vgpu_in_aperture(struct intel_vgpu *vgpu, u64 off) intel_vgpu_in_aperture() argument
974 intel_vgpu_aperture_rw(struct intel_vgpu *vgpu, u64 off, void *buf, unsigned long count, bool is_write) intel_vgpu_aperture_rw() argument
1004 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_rw() local
1053 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); gtt_entry() local
1222 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_mmap() local
1253 intel_vgpu_get_irq_count(struct intel_vgpu *vgpu, int type) intel_vgpu_get_irq_count() argument
1261 intel_vgpu_set_intx_mask(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_mask() argument
1269 intel_vgpu_set_intx_unmask(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_unmask() argument
1276 intel_vgpu_set_intx_trigger(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_trigger() argument
1283 intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_msi_trigger() argument
1304 intel_vgpu_set_irqs(struct intel_vgpu *vgpu, u32 flags, unsigned int index, unsigned int start, unsigned int count, void *data) intel_vgpu_set_irqs() argument
1348 struct intel_vgpu *vgpu = mdev_get_drvdata(mdev); intel_vgpu_ioctl() local
1631 struct intel_vgpu *vgpu = (struct intel_vgpu *) vgpu_id_show() local
1787 __kvmgt_vgpu_exist(struct intel_vgpu *vgpu, struct kvm *kvm) __kvmgt_vgpu_exist() argument
1813 struct intel_vgpu *vgpu; kvmgt_guest_init() local
1869 struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu; kvmgt_attach_vgpu() local
1884 struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu; kvmgt_detach_vgpu() local
1904 struct intel_vgpu *vgpu; kvmgt_inject_msi() local
1952 struct intel_vgpu *vgpu; kvmgt_dma_map_guest_page() local
2036 struct intel_vgpu *vgpu; kvmgt_dma_unmap_guest_page() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Dvgpu.c38 void populate_pvinfo_page(struct intel_vgpu *vgpu) in populate_pvinfo_page() argument
40 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in populate_pvinfo_page()
42 vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC; in populate_pvinfo_page()
43 vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1; in populate_pvinfo_page()
44 vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0; in populate_pvinfo_page()
45 vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0; in populate_pvinfo_page()
46 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; in populate_pvinfo_page()
48 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT; in populate_pvinfo_page()
49 vgpu_vreg_t(vgpu, vgtif_re in populate_pvinfo_page()
167 intel_gvt_activate_vgpu(struct intel_vgpu *vgpu) intel_gvt_activate_vgpu() argument
180 intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu) intel_gvt_deactivate_vgpu() argument
206 intel_gvt_release_vgpu(struct intel_vgpu *vgpu) intel_gvt_release_vgpu() argument
224 intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu) intel_gvt_destroy_vgpu() argument
268 struct intel_vgpu *vgpu; intel_gvt_create_idle_vgpu() local
302 intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu) intel_gvt_destroy_idle_vgpu() argument
311 intel_gvt_create_vgpu(struct intel_vgpu *vgpu, const struct intel_vgpu_config *conf) intel_gvt_create_vgpu() argument
434 intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, intel_engine_mask_t engine_mask) intel_gvt_reset_vgpu_locked() argument
505 intel_gvt_reset_vgpu(struct intel_vgpu *vgpu) intel_gvt_reset_vgpu() argument
[all...]
H A Ddisplay.c42 static int get_edp_pipe(struct intel_vgpu *vgpu) in get_edp_pipe() argument
44 u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP); in get_edp_pipe()
62 static int edp_pipe_is_enabled(struct intel_vgpu *vgpu) in edp_pipe_is_enabled() argument
64 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in edp_pipe_is_enabled()
66 if (!(vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
69 if (!(vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP) & TRANS_DDI_FUNC_ENABLE)) in edp_pipe_is_enabled()
74 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe) in pipe_is_enabled() argument
76 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in pipe_is_enabled()
82 if (vgpu_vreg_t(vgpu, TRANSCONF(pipe)) & TRANSCONF_ENABLE) in pipe_is_enabled()
85 if (edp_pipe_is_enabled(vgpu) in pipe_is_enabled()
174 emulate_monitor_status_change(struct intel_vgpu *vgpu) emulate_monitor_status_change() argument
512 clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num) clean_virtual_dp_monitor() argument
526 struct intel_vgpu *vgpu; vblank_timer_fn() local
538 setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num, int type, unsigned int resolution) setup_virtual_dp_monitor() argument
591 vgpu_update_vblank_emulation(struct intel_vgpu *vgpu, bool turnon) vgpu_update_vblank_emulation() argument
622 emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe) emulate_vblank_on_pipe() argument
651 intel_vgpu_emulate_vblank(struct intel_vgpu *vgpu) intel_vgpu_emulate_vblank() argument
669 intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected) intel_vgpu_emulate_hotplug() argument
758 intel_vgpu_clean_display(struct intel_vgpu *vgpu) intel_vgpu_clean_display() argument
784 intel_vgpu_init_display(struct intel_vgpu *vgpu, u64 resolution) intel_vgpu_init_display() argument
808 intel_vgpu_reset_display(struct intel_vgpu *vgpu) intel_vgpu_reset_display() argument
[all...]
H A Dcfg_space.c60 * @vgpu: target vgpu
69 static void vgpu_pci_cfg_mem_write(struct intel_vgpu *vgpu, unsigned int off, in vgpu_pci_cfg_mem_write() argument
72 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write()
97 if (off == vgpu->cfg_space.pmcsr_off && vgpu->cfg_space.pmcsr_off) { in vgpu_pci_cfg_mem_write()
98 pwr = (pci_power_t __force)(*(u16*)(&vgpu_cfg_space(vgpu)[off]) in vgpu_pci_cfg_mem_write()
101 vgpu->d3_entered = true; in vgpu_pci_cfg_mem_write()
102 gvt_dbg_core("vgpu-%d power status changed to %d\n", in vgpu_pci_cfg_mem_write()
103 vgpu in vgpu_pci_cfg_mem_write()
117 intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_read() argument
133 map_aperture(struct intel_vgpu *vgpu, bool map) map_aperture() argument
139 trap_gttmmio(struct intel_vgpu *vgpu, bool trap) trap_gttmmio() argument
145 emulate_pci_command_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_command_write() argument
167 emulate_pci_rom_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_rom_bar_write() argument
181 emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_bar_write() argument
256 intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_write() argument
319 intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, bool primary) intel_vgpu_init_cfg_space() argument
383 intel_vgpu_reset_cfg_space(struct intel_vgpu *vgpu) intel_vgpu_reset_cfg_space() argument
[all...]
H A Dgvt.h111 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)
125 #define vgpu_opregion(vgpu) (&(vgpu->opregion))
145 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
146 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
147 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
193 * scheduler structure. So below 2 vgpu data are protected
325 * not yet protected by special locks(vgpu and scheduler lock).
328 /* scheduler scope lock, protect gvt and vgpu schedul
478 intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu, u32 offset, u32 val, bool low) intel_vgpu_write_pci_bar() argument
561 intel_vgpu_get_bar_gpa(struct intel_vgpu *vgpu, int bar) intel_vgpu_get_bar_gpa() argument
731 intel_gvt_read_gpa(struct intel_vgpu *vgpu, unsigned long gpa, void *buf, unsigned long len) intel_gvt_read_gpa() argument
749 intel_gvt_write_gpa(struct intel_vgpu *vgpu, unsigned long gpa, void *buf, unsigned long len) intel_gvt_write_gpa() argument
[all...]
H A Daperture_gm.c42 static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm) in alloc_gm() argument
44 struct intel_gvt *gvt = vgpu->gvt; in alloc_gm()
52 node = &vgpu->gm.high_gm_node; in alloc_gm()
53 size = vgpu_hidden_sz(vgpu); in alloc_gm()
58 node = &vgpu->gm.low_gm_node; in alloc_gm()
59 size = vgpu_aperture_sz(vgpu); in alloc_gm()
80 static int alloc_vgpu_gm(struct intel_vgpu *vgpu) in alloc_vgpu_gm() argument
82 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_gm()
86 ret = alloc_gm(vgpu, false); in alloc_vgpu_gm()
90 ret = alloc_gm(vgpu, tru in alloc_vgpu_gm()
108 free_vgpu_gm(struct intel_vgpu *vgpu) free_vgpu_gm() argument
129 intel_vgpu_write_fence(struct intel_vgpu *vgpu, u32 fence, u64 value) intel_vgpu_write_fence() argument
158 _clear_vgpu_fence(struct intel_vgpu *vgpu) _clear_vgpu_fence() argument
166 free_vgpu_fence(struct intel_vgpu *vgpu) free_vgpu_fence() argument
191 alloc_vgpu_fence(struct intel_vgpu *vgpu) alloc_vgpu_fence() argument
233 free_resource(struct intel_vgpu *vgpu) free_resource() argument
242 alloc_resource(struct intel_vgpu *vgpu, const struct intel_vgpu_config *conf) alloc_resource() argument
307 intel_vgpu_free_resource(struct intel_vgpu *vgpu) intel_vgpu_free_resource() argument
321 intel_vgpu_reset_resource(struct intel_vgpu *vgpu) intel_vgpu_reset_resource() argument
342 intel_vgpu_alloc_resource(struct intel_vgpu *vgpu, const struct intel_vgpu_config *conf) intel_vgpu_alloc_resource() argument
[all...]
H A Dmmio.c45 * @vgpu: a vGPU
51 int intel_vgpu_gpa_to_mmio_offset(struct intel_vgpu *vgpu, u64 gpa) in intel_vgpu_gpa_to_mmio_offset() argument
53 u64 gttmmio_gpa = intel_vgpu_get_bar_gpa(vgpu, PCI_BASE_ADDRESS_0); in intel_vgpu_gpa_to_mmio_offset()
64 static void failsafe_emulate_mmio_rw(struct intel_vgpu *vgpu, u64 pa, in failsafe_emulate_mmio_rw() argument
71 if (!vgpu || !p_data) in failsafe_emulate_mmio_rw()
74 gvt = vgpu->gvt; in failsafe_emulate_mmio_rw()
75 mutex_lock(&vgpu->vgpu_lock); in failsafe_emulate_mmio_rw()
76 offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa); in failsafe_emulate_mmio_rw()
79 intel_vgpu_default_mmio_read(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
82 intel_vgpu_default_mmio_write(vgpu, offse in failsafe_emulate_mmio_rw()
106 intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_read() argument
181 intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_write() argument
244 intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr) intel_vgpu_reset_mmio() argument
311 intel_vgpu_init_mmio(struct intel_vgpu *vgpu) intel_vgpu_init_mmio() argument
329 intel_vgpu_clean_mmio(struct intel_vgpu *vgpu) intel_vgpu_clean_mmio() argument
[all...]
H A Dedid.c52 static unsigned char edid_get_byte(struct intel_vgpu *vgpu) in edid_get_byte() argument
54 struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid; in edid_get_byte()
71 if (intel_vgpu_has_monitor_on_port(vgpu, edid->port)) { in edid_get_byte()
73 intel_vgpu_port(vgpu, edid->port)->edid; in edid_get_byte()
129 static void reset_gmbus_controller(struct intel_vgpu *vgpu) in reset_gmbus_controller() argument
131 vgpu_vreg_t(vgpu, PCH_GMBUS2) = GMBUS_HW_RDY; in reset_gmbus_controller()
132 if (!vgpu->display.i2c_edid.edid_available) in reset_gmbus_controller()
133 vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER; in reset_gmbus_controller()
134 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in reset_gmbus_controller()
138 static int gmbus0_mmio_write(struct intel_vgpu *vgpu, in gmbus0_mmio_write() argument
178 gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus1_mmio_write() argument
279 gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_write() argument
288 gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_read() argument
341 gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_read() argument
352 gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_write() argument
376 intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_read() argument
406 intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_write() argument
476 intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, int port_idx, unsigned int offset, void *p_data) intel_gvt_i2c_handle_aux_ch_write() argument
567 intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu) intel_vgpu_init_i2c_edid() argument
[all...]
H A Dkvmgt.c71 size_t (*rw)(struct intel_vgpu *vgpu, char *buf,
73 void (*release)(struct intel_vgpu *vgpu,
97 struct intel_vgpu *vgpu; member
128 static void gvt_unpin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_unpin_guest_page() argument
131 vfio_unpin_pages(&vgpu->vfio_device, gfn << PAGE_SHIFT, in gvt_unpin_guest_page()
136 static int gvt_pin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_pin_guest_page() argument
152 ret = vfio_pin_pages(&vgpu->vfio_device, cur_iova, 1, in gvt_pin_guest_page()
173 gvt_unpin_guest_page(vgpu, gfn, npage * PAGE_SIZE); in gvt_pin_guest_page()
177 static int gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_dma_map_page() argument
180 struct device *dev = vgpu in gvt_dma_map_page()
200 gvt_dma_unmap_page(struct intel_vgpu *vgpu, unsigned long gfn, dma_addr_t dma_addr, unsigned long size) gvt_dma_unmap_page() argument
209 __gvt_cache_find_dma_addr(struct intel_vgpu *vgpu, dma_addr_t dma_addr) __gvt_cache_find_dma_addr() argument
228 __gvt_cache_find_gfn(struct intel_vgpu *vgpu, gfn_t gfn) __gvt_cache_find_gfn() argument
246 __gvt_cache_add(struct intel_vgpu *vgpu, gfn_t gfn, dma_addr_t dma_addr, unsigned long size) __gvt_cache_add() argument
295 __gvt_cache_remove_entry(struct intel_vgpu *vgpu, struct gvt_dma *entry) __gvt_cache_remove_entry() argument
304 gvt_cache_destroy(struct intel_vgpu *vgpu) gvt_cache_destroy() argument
323 gvt_cache_init(struct intel_vgpu *vgpu) gvt_cache_init() argument
399 intel_vgpu_reg_rw_opregion(struct intel_vgpu *vgpu, char *buf, size_t count, loff_t *ppos, bool iswrite) intel_vgpu_reg_rw_opregion() argument
418 intel_vgpu_reg_release_opregion(struct intel_vgpu *vgpu, struct vfio_region *region) intel_vgpu_reg_release_opregion() argument
428 handle_edid_regs(struct intel_vgpu *vgpu, struct vfio_edid_region *region, char *buf, size_t count, u16 offset, bool is_write) handle_edid_regs() argument
499 intel_vgpu_reg_rw_edid(struct intel_vgpu *vgpu, char *buf, size_t count, loff_t *ppos, bool iswrite) intel_vgpu_reg_rw_edid() argument
521 intel_vgpu_reg_release_edid(struct intel_vgpu *vgpu, struct vfio_region *region) intel_vgpu_reg_release_edid() argument
532 intel_vgpu_register_reg(struct intel_vgpu *vgpu, unsigned int type, unsigned int subtype, const struct intel_vgpu_regops *ops, size_t size, u32 flags, void *data) intel_vgpu_register_reg() argument
556 intel_gvt_set_opregion(struct intel_vgpu *vgpu) intel_gvt_set_opregion() argument
583 intel_gvt_set_edid(struct intel_vgpu *vgpu, int port_num) intel_gvt_set_edid() argument
615 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_dma_unmap() local
633 __kvmgt_vgpu_exist(struct intel_vgpu *vgpu) __kvmgt_vgpu_exist() argument
656 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_open_device() local
681 intel_vgpu_release_msi_eventfd_ctx(struct intel_vgpu *vgpu) intel_vgpu_release_msi_eventfd_ctx() argument
694 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_close_device() local
716 intel_vgpu_get_bar_addr(struct intel_vgpu *vgpu, int bar) intel_vgpu_get_bar_addr() argument
743 intel_vgpu_bar_rw(struct intel_vgpu *vgpu, int bar, u64 off, void *buf, unsigned int count, bool is_write) intel_vgpu_bar_rw() argument
758 intel_vgpu_in_aperture(struct intel_vgpu *vgpu, u64 off) intel_vgpu_in_aperture() argument
764 intel_vgpu_aperture_rw(struct intel_vgpu *vgpu, u64 off, void *buf, unsigned long count, bool is_write) intel_vgpu_aperture_rw() argument
791 intel_vgpu_rw(struct intel_vgpu *vgpu, char *buf, size_t count, loff_t *ppos, bool is_write) intel_vgpu_rw() argument
839 gtt_entry(struct intel_vgpu *vgpu, loff_t *ppos) gtt_entry() argument
860 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_read() local
935 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_write() local
1008 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_mmap() local
1043 intel_vgpu_get_irq_count(struct intel_vgpu *vgpu, int type) intel_vgpu_get_irq_count() argument
1051 intel_vgpu_set_intx_mask(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_mask() argument
1059 intel_vgpu_set_intx_unmask(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_unmask() argument
1066 intel_vgpu_set_intx_trigger(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_intx_trigger() argument
1073 intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu, unsigned int index, unsigned int start, unsigned int count, u32 flags, void *data) intel_vgpu_set_msi_trigger() argument
1094 intel_vgpu_set_irqs(struct intel_vgpu *vgpu, u32 flags, unsigned int index, unsigned int start, unsigned int count, void *data) intel_vgpu_set_irqs() argument
1138 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_ioctl() local
1413 struct intel_vgpu *vgpu = dev_get_drvdata(dev); vgpu_id_show() local
1438 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_init_dev() local
1456 struct intel_vgpu *vgpu = vfio_dev_to_vgpu(vfio_dev); intel_vgpu_release_dev() local
1479 struct intel_vgpu *vgpu; intel_vgpu_probe() local
1505 struct intel_vgpu *vgpu = dev_get_drvdata(&mdev->dev); intel_vgpu_remove() local
1613 intel_vgpu_detach_regions(struct intel_vgpu *vgpu) intel_vgpu_detach_regions() argument
1629 intel_gvt_dma_map_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, unsigned long size, dma_addr_t *dma_addr) intel_gvt_dma_map_guest_page() argument
1676 intel_gvt_dma_pin_guest_page(struct intel_vgpu *vgpu, dma_addr_t dma_addr) intel_gvt_dma_pin_guest_page() argument
1704 intel_gvt_dma_unmap_guest_page(struct intel_vgpu *vgpu, dma_addr_t dma_addr) intel_gvt_dma_unmap_guest_page() argument
1738 struct intel_vgpu *vgpu; intel_gvt_test_and_emulate_vblank() local
1846 struct intel_vgpu *vgpu; intel_gvt_init_device() local
[all...]
H A Dhandlers.c87 static void read_vreg(struct intel_vgpu *vgpu, unsigned int offset, in read_vreg() argument
90 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in read_vreg()
93 static void write_vreg(struct intel_vgpu *vgpu, unsigned int offset, in write_vreg() argument
96 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in write_vreg()
173 void enter_failsafe_mode(struct intel_vgpu *vgpu, int reason) in enter_failsafe_mode() argument
188 pr_err("Now vgpu %d will enter failsafe mode.\n", vgpu->id); in enter_failsafe_mode()
189 vgpu->failsafe = true; in enter_failsafe_mode()
192 static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu, in sanitize_fence_mmio_access() argument
195 unsigned int max_fence = vgpu_fence_sz(vgpu); in sanitize_fence_mmio_access()
215 gamw_echo_dev_rw_ia_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gamw_echo_dev_rw_ia_write() argument
240 fence_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_read() argument
253 fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_write() argument
277 mul_force_wake_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mul_force_wake_write() argument
311 gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gdrst_mmio_write() argument
360 gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_read() argument
366 gmbus_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_write() argument
372 pch_pp_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_pp_control_mmio_write() argument
390 transconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) transconf_mmio_write() argument
402 lcpll_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) lcpll_ctl_mmio_write() argument
420 dpy_reg_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpy_reg_mmio_read() argument
460 bdw_vgpu_get_dp_bitrate(struct intel_vgpu *vgpu, enum port port) bdw_vgpu_get_dp_bitrate() argument
535 bxt_vgpu_get_dp_bitrate(struct intel_vgpu *vgpu, enum port port) bxt_vgpu_get_dp_bitrate() argument
599 skl_vgpu_get_dp_bitrate(struct intel_vgpu *vgpu, enum port port) skl_vgpu_get_dp_bitrate() argument
647 vgpu_update_refresh_rate(struct intel_vgpu *vgpu) vgpu_update_refresh_rate() argument
697 pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pipeconf_mmio_write() argument
770 force_nonpriv_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) force_nonpriv_write() argument
793 ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ddi_buf_ctl_mmio_write() argument
809 fdi_rx_iir_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fdi_rx_iir_mmio_write() argument
819 fdi_auto_training_started(struct intel_vgpu *vgpu) fdi_auto_training_started() argument
835 check_fdi_rx_train_status(struct intel_vgpu *vgpu, enum pipe pipe, unsigned int train_pattern) check_fdi_rx_train_status() argument
900 update_fdi_rx_iir_status(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) update_fdi_rx_iir_status() argument
944 dp_tp_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_ctl_mmio_write() argument
962 dp_tp_status_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_status_mmio_write() argument
977 pch_adpa_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_adpa_mmio_write() argument
990 south_chicken2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) south_chicken2_mmio_write() argument
1008 pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pri_surf_mmio_write() argument
1031 spr_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) spr_surf_mmio_write() argument
1048 reg50080_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) reg50080_mmio_write() argument
1073 trigger_aux_channel_interrupt(struct intel_vgpu *vgpu, unsigned int reg) trigger_aux_channel_interrupt() argument
1099 dp_aux_ch_ctl_trans_done(struct intel_vgpu *vgpu, u32 value, unsigned int reg, int len, bool data_valid) dp_aux_ch_ctl_trans_done() argument
1161 dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_aux_ch_ctl_mmio_write() argument
1331 mbctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mbctl_write() argument
1339 vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) vga_control_mmio_write() argument
1352 read_virtual_sbi_register(struct intel_vgpu *vgpu, unsigned int sbi_offset) read_virtual_sbi_register() argument
1369 write_virtual_sbi_register(struct intel_vgpu *vgpu, unsigned int offset, u32 value) write_virtual_sbi_register() argument
1393 sbi_data_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_data_mmio_read() argument
1407 sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_ctl_mmio_write() argument
1437 pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_read() argument
1469 handle_g2v_notification(struct intel_vgpu *vgpu, int notification) handle_g2v_notification() argument
1497 send_display_ready_uevent(struct intel_vgpu *vgpu, int ready) send_display_ready_uevent() argument
1513 pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_write() argument
1557 pf_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pf_write() argument
1575 power_well_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) power_well_ctl_mmio_write() argument
1590 gen9_dbuf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_dbuf_ctl_mmio_write() argument
1603 fpga_dbg_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fpga_dbg_mmio_write() argument
1613 dma_ctrl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dma_ctrl_write() argument
1632 gen9_trtte_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtte_write() argument
1649 gen9_trtt_chicken_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtt_chicken_write() argument
1656 dpll_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpll_status_read() argument
1678 mailbox_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mailbox_write() argument
1736 hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) hws_pga_write() argument
1767 skl_power_well_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_power_well_ctl_write() argument
1782 skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_lcpll_write() argument
1796 bxt_de_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_de_pll_enable_write() argument
1809 bxt_port_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_pll_enable_write() argument
1822 bxt_phy_ctl_family_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_phy_ctl_family_write() argument
1843 bxt_port_tx_dw3_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_tx_dw3_read() argument
1855 bxt_pcs_dw12_grp_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_pcs_dw12_grp_write() argument
1873 bxt_gt_disp_pwron_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_gt_disp_pwron_write() argument
1898 edp_psr_imr_iir_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) edp_psr_imr_iir_write() argument
1915 bxt_ppat_low_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_ppat_low_write() argument
1933 guc_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) guc_status_read() argument
1943 mmio_read_from_hw(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mmio_read_from_hw() argument
1970 elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) elsp_mmio_write() argument
2012 ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_mode_mmio_write() argument
2071 gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gvt_reg_tlb_control_handler() argument
2103 ring_reset_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_reset_ctl_write() argument
2120 csfe_chicken1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) csfe_chicken1_mmio_write() argument
3052 intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_read() argument
3069 intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_write() argument
3086 intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_mask_mmio_write() argument
3128 intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset, void *pdata, unsigned int bytes, bool is_read) intel_vgpu_mmio_reg_rw() argument
3204 struct intel_vgpu *vgpu; intel_gvt_restore_fence() local
3217 struct intel_vgpu *vgpu = data; mmio_pm_restore_handler() local
3228 struct intel_vgpu *vgpu; intel_gvt_restore_mmio() local
[all...]
H A Dgtt.c56 bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size) in intel_gvt_ggtt_validate_range() argument
59 return vgpu_gmadr_is_valid(vgpu, addr); in intel_gvt_ggtt_validate_range()
61 if (vgpu_gmadr_is_aperture(vgpu, addr) && in intel_gvt_ggtt_validate_range()
62 vgpu_gmadr_is_aperture(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
64 else if (vgpu_gmadr_is_hidden(vgpu, addr) && in intel_gvt_ggtt_validate_range()
65 vgpu_gmadr_is_hidden(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
74 int intel_gvt_ggtt_gmadr_g2h(struct intel_vgpu *vgpu, u64 g_addr, u64 *h_addr) in intel_gvt_ggtt_gmadr_g2h() argument
76 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_ggtt_gmadr_g2h()
78 if (drm_WARN(&i915->drm, !vgpu_gmadr_is_valid(vgpu, g_addr), in intel_gvt_ggtt_gmadr_g2h()
82 if (vgpu_gmadr_is_aperture(vgpu, g_add in intel_gvt_ggtt_gmadr_g2h()
92 intel_gvt_ggtt_gmadr_h2g(struct intel_vgpu *vgpu, u64 h_addr, u64 *g_addr) intel_gvt_ggtt_gmadr_h2g() argument
109 intel_gvt_ggtt_index_g2h(struct intel_vgpu *vgpu, unsigned long g_index, unsigned long *h_index) intel_gvt_ggtt_index_g2h() argument
124 intel_gvt_ggtt_h2g_index(struct intel_vgpu *vgpu, unsigned long h_index, unsigned long *g_index) intel_gvt_ggtt_h2g_index() argument
300 gtt_get_entry64(void *pt, struct intel_gvt_gtt_entry *e, unsigned long index, bool hypervisor_access, unsigned long gpa, struct intel_vgpu *vgpu) gtt_get_entry64() argument
325 gtt_set_entry64(void *pt, struct intel_gvt_gtt_entry *e, unsigned long index, bool hypervisor_access, unsigned long gpa, struct intel_vgpu *vgpu) gtt_set_entry64() argument
760 ppgtt_free_all_spt(struct intel_vgpu *vgpu) ppgtt_free_all_spt() argument
800 intel_vgpu_find_spt_by_gfn( struct intel_vgpu *vgpu, unsigned long gfn) intel_vgpu_find_spt_by_gfn() argument
813 intel_vgpu_find_spt_by_mfn( struct intel_vgpu *vgpu, unsigned long mfn) intel_vgpu_find_spt_by_mfn() argument
822 ppgtt_alloc_spt( struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type) ppgtt_alloc_spt() argument
872 ppgtt_alloc_spt_gfn( struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type, unsigned long gfn, bool guest_pde_ips) ppgtt_alloc_spt_gfn() argument
943 ppgtt_invalidate_spt_by_shadow_entry(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *e) ppgtt_invalidate_spt_by_shadow_entry() argument
983 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_invalidate_pte() local
1000 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_invalidate_spt() local
1051 vgpu_ips_enabled(struct intel_vgpu *vgpu) vgpu_ips_enabled() argument
1069 ppgtt_populate_spt_by_guest_entry( struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *we) ppgtt_populate_spt_by_guest_entry() argument
1148 split_2MB_gtt_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *se) split_2MB_gtt_entry() argument
1204 split_64KB_gtt_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *se) split_64KB_gtt_entry() argument
1235 ppgtt_populate_shadow_entry(struct intel_vgpu *vgpu, struct intel_vgpu_ppgtt_spt *spt, unsigned long index, struct intel_gvt_gtt_entry *ge) ppgtt_populate_shadow_entry() argument
1288 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_populate_spt() local
1323 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_entry_removal() local
1368 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_entry_add() local
1400 sync_oos_page(struct intel_vgpu *vgpu, struct intel_vgpu_oos_page *oos_page) sync_oos_page() argument
1443 detach_oos_page(struct intel_vgpu *vgpu, struct intel_vgpu_oos_page *oos_page) detach_oos_page() argument
1548 intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu) intel_vgpu_sync_oos_pages() argument
1574 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_write_page_table() local
1661 intel_vgpu_flush_post_shadow(struct intel_vgpu *vgpu) intel_vgpu_flush_post_shadow() argument
1692 struct intel_vgpu *vgpu = spt->vgpu; ppgtt_handle_guest_write_page_table_bytes() local
1755 struct intel_vgpu *vgpu = mm->vgpu; invalidate_ppgtt_mm() local
1785 struct intel_vgpu *vgpu = mm->vgpu; shadow_ppgtt_mm() local
1829 vgpu_alloc_mm(struct intel_vgpu *vgpu) vgpu_alloc_mm() argument
1860 intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type root_entry_type, u64 pdps[]) intel_vgpu_create_ppgtt_mm() argument
1903 intel_vgpu_create_ggtt_mm(struct intel_vgpu *vgpu) intel_vgpu_create_ggtt_mm() argument
2042 struct intel_vgpu *vgpu = mm->vgpu; ppgtt_get_next_level_entry() local
2070 struct intel_vgpu *vgpu = mm->vgpu; intel_vgpu_gma_to_gpa() local
2142 emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) emulate_ggtt_mmio_read() argument
2180 intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) intel_vgpu_emulate_ggtt_mmio_read() argument
2194 ggtt_invalidate_pte(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *entry) ggtt_invalidate_pte() argument
2205 emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) emulate_ggtt_mmio_write() argument
2323 intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) intel_vgpu_emulate_ggtt_mmio_write() argument
2352 alloc_scratch_pages(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type) alloc_scratch_pages() argument
2416 release_scratch_page_tree(struct intel_vgpu *vgpu) release_scratch_page_tree() argument
2436 create_scratch_page_tree(struct intel_vgpu *vgpu) create_scratch_page_tree() argument
2463 intel_vgpu_init_gtt(struct intel_vgpu *vgpu) intel_vgpu_init_gtt() argument
2486 intel_vgpu_destroy_all_ppgtt_mm(struct intel_vgpu *vgpu) intel_vgpu_destroy_all_ppgtt_mm() argument
2505 intel_vgpu_destroy_ggtt_mm(struct intel_vgpu *vgpu) intel_vgpu_destroy_ggtt_mm() argument
2530 intel_vgpu_clean_gtt(struct intel_vgpu *vgpu) intel_vgpu_clean_gtt() argument
2601 intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]) intel_vgpu_find_ppgtt_mm() argument
2638 intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu, enum intel_gvt_gtt_type root_entry_type, u64 pdps[]) intel_vgpu_get_ppgtt_mm() argument
2664 intel_vgpu_put_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]) intel_vgpu_put_ppgtt_mm() argument
2759 intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) intel_vgpu_invalidate_ppgtt() argument
2785 intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old) intel_vgpu_reset_ggtt() argument
2830 struct intel_vgpu *vgpu; intel_gvt_restore_ggtt() local
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H A Dsched_policy.c37 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu) in vgpu_has_pending_workload() argument
42 for_each_engine(engine, vgpu->gvt->gt, i) { in vgpu_has_pending_workload()
43 if (!list_empty(workload_q_head(vgpu, engine))) in vgpu_has_pending_workload()
55 struct intel_vgpu *vgpu; member
75 static void vgpu_update_timeslice(struct intel_vgpu *vgpu, ktime_t cur_time) in vgpu_update_timeslice() argument
80 if (!vgpu || vgpu == vgpu->gvt->idle_vgpu) in vgpu_update_timeslice()
83 vgpu_data = vgpu->sched_data; in vgpu_update_timeslice()
150 * stop dispatching workload for current vgpu in try_to_schedule_next_vgpu()
179 struct intel_vgpu *vgpu = NULL; find_busy_vgpu() local
216 struct intel_vgpu *vgpu = NULL; tbs_sched_func() local
311 tbs_sched_init_vgpu(struct intel_vgpu *vgpu) tbs_sched_init_vgpu() argument
328 tbs_sched_clean_vgpu(struct intel_vgpu *vgpu) tbs_sched_clean_vgpu() argument
341 tbs_sched_start_schedule(struct intel_vgpu *vgpu) tbs_sched_start_schedule() argument
363 tbs_sched_stop_schedule(struct intel_vgpu *vgpu) tbs_sched_stop_schedule() argument
406 intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu) intel_vgpu_init_sched_policy() argument
417 intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu) intel_vgpu_clean_sched_policy() argument
424 intel_vgpu_start_schedule(struct intel_vgpu *vgpu) intel_vgpu_start_schedule() argument
443 intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) intel_vgpu_stop_schedule() argument
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H A Dinterrupt.c54 static void update_upstream_irq(struct intel_vgpu *vgpu,
166 * @vgpu: a vGPU
178 int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu, in intel_vgpu_reg_imr_handler() argument
181 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_imr_handler()
185 trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_imr_handler()
186 (vgpu_vreg(vgpu, reg) ^ imr)); in intel_vgpu_reg_imr_handler()
188 vgpu_vreg(vgpu, reg) = imr; in intel_vgpu_reg_imr_handler()
190 ops->check_pending_irq(vgpu); in intel_vgpu_reg_imr_handler()
197 * @vgpu
208 intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu, unsigned int reg, void *p_data, unsigned int bytes) intel_vgpu_reg_master_irq_handler() argument
247 intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu, unsigned int reg, void *p_data, unsigned int bytes) intel_vgpu_reg_ier_handler() argument
286 intel_vgpu_reg_iir_handler(struct intel_vgpu *vgpu, unsigned int reg, void *p_data, unsigned int bytes) intel_vgpu_reg_iir_handler() argument
324 update_upstream_irq(struct intel_vgpu *vgpu, struct intel_gvt_irq_info *info) update_upstream_irq() argument
408 inject_virtual_interrupt(struct intel_vgpu *vgpu) inject_virtual_interrupt() argument
443 propagate_event(struct intel_gvt_irq *irq, enum intel_gvt_event_type event, struct intel_vgpu *vgpu) propagate_event() argument
466 handle_default_event_virt(struct intel_gvt_irq *irq, enum intel_gvt_event_type event, struct intel_vgpu *vgpu) handle_default_event_virt() argument
507 gen8_check_pending_irq(struct intel_vgpu *vgpu) gen8_check_pending_irq() argument
661 intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu, enum intel_gvt_event_type event) intel_vgpu_trigger_virtual_event() argument
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H A Ddmabuf.c48 struct intel_vgpu *vgpu; in vgpu_gem_get_pages() local
64 vgpu = fb_info->obj->vgpu; in vgpu_gem_get_pages()
65 if (drm_WARN_ON(&dev_priv->drm, !vgpu)) in vgpu_gem_get_pages()
82 if (intel_gvt_dma_pin_guest_page(vgpu, dma_addr)) { in vgpu_gem_get_pages()
101 intel_gvt_dma_unmap_guest_page(vgpu, dma_addr); in vgpu_gem_get_pages()
119 struct intel_vgpu *vgpu = obj->vgpu; in vgpu_gem_put_pages() local
123 intel_gvt_dma_unmap_guest_page(vgpu, in vgpu_gem_put_pages()
135 struct intel_vgpu *vgpu in dmabuf_gem_object_free() local
175 struct intel_vgpu *vgpu = obj->vgpu; vgpu_gem_release() local
253 vgpu_get_plane_info(struct drm_device *dev, struct intel_vgpu *vgpu, struct intel_vgpu_fb_info *info, int plane_id) vgpu_get_plane_info() argument
340 pick_dmabuf_by_info(struct intel_vgpu *vgpu, struct intel_vgpu_fb_info *latest_info) pick_dmabuf_by_info() argument
370 pick_dmabuf_by_num(struct intel_vgpu *vgpu, u32 id) pick_dmabuf_by_num() argument
402 intel_vgpu_query_plane(struct intel_vgpu *vgpu, void *args) intel_vgpu_query_plane() argument
500 intel_vgpu_get_dmabuf(struct intel_vgpu *vgpu, unsigned int dmabuf_id) intel_vgpu_get_dmabuf() argument
571 intel_vgpu_dmabuf_cleanup(struct intel_vgpu *vgpu) intel_vgpu_dmabuf_cleanup() argument
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