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Searched refs:mux_pll_src_cpll_gpll_p (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-rk3368.c97 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
354 COMPOSITE(0, "fclk_mcu_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
365 COMPOSITE(0, "i2s_8ch_src", mux_pll_src_cpll_gpll_p, 0,
377 COMPOSITE(0, "spdif_8ch_src", mux_pll_src_cpll_gpll_p, 0,
386 COMPOSITE(0, "i2s_2ch_src", mux_pll_src_cpll_gpll_p, 0,
402 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
474 COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
504 MUX(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
515 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
533 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3188.c200 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
285 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,
290 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,
312 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
315 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,
328 MUX(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
578 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,
583 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,
600 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
692 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3288.c196 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
359 COMPOSITE(0, "i2s_src", mux_pll_src_cpll_gpll_p, 0,
372 MUX(0, "spdif_src", mux_pll_src_cpll_gpll_p, 0,
483 COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
499 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
515 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p, 0,
518 COMPOSITE(SCLK_SPI1, "sclk_spi1", mux_pll_src_cpll_gpll_p, 0,
521 COMPOSITE(SCLK_SPI2, "sclk_spi2", mux_pll_src_cpll_gpll_p, 0,
577 COMPOSITE(SCLK_NANDC0, "sclk_nandc0", mux_pll_src_cpll_gpll_p, 0,
580 COMPOSITE(SCLK_NANDC1, "sclk_nandc1", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3399.c134 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
581 COMPOSITE(0, "clk_spdif_div", mux_pll_src_cpll_gpll_p, 0,
591 COMPOSITE(SCLK_SPDIF_REC_DPTX, "clk_spdif_rec_dptx", mux_pll_src_cpll_gpll_p, 0,
595 COMPOSITE(0, "clk_i2s0_div", mux_pll_src_cpll_gpll_p, 0,
605 COMPOSITE(0, "clk_i2s1_div", mux_pll_src_cpll_gpll_p, 0,
615 COMPOSITE(0, "clk_i2s2_div", mux_pll_src_cpll_gpll_p, 0,
642 MUX(0, "clk_uart_src", mux_pll_src_cpll_gpll_p, 0,
668 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
884 COMPOSITE(HCLK_SD, "hclk_sd", mux_pll_src_cpll_gpll_p, 0,
1129 COMPOSITE(PCLK_EDP, "pclk_edp", mux_pll_src_cpll_gpll_p,
[all...]
/kernel/linux/linux-6.6/drivers/clk/rockchip/
H A Dclk-rk3368.c97 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
356 COMPOSITE(0, "fclk_mcu_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
367 COMPOSITE(0, "i2s_8ch_src", mux_pll_src_cpll_gpll_p, 0,
379 COMPOSITE(0, "spdif_8ch_src", mux_pll_src_cpll_gpll_p, 0,
388 COMPOSITE(0, "i2s_2ch_src", mux_pll_src_cpll_gpll_p, 0,
404 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
476 COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
506 MUX(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
517 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
535 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3188.c202 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
287 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,
292 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,
314 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
317 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,
330 MUX(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
579 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,
584 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,
601 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
694 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3288.c197 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
360 COMPOSITE(0, "i2s_src", mux_pll_src_cpll_gpll_p, 0,
373 MUX(0, "spdif_src", mux_pll_src_cpll_gpll_p, 0,
484 COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
500 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
516 COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_cpll_gpll_p, 0,
519 COMPOSITE(SCLK_SPI1, "sclk_spi1", mux_pll_src_cpll_gpll_p, 0,
522 COMPOSITE(SCLK_SPI2, "sclk_spi2", mux_pll_src_cpll_gpll_p, 0,
578 COMPOSITE(SCLK_NANDC0, "sclk_nandc0", mux_pll_src_cpll_gpll_p, 0,
581 COMPOSITE(SCLK_NANDC1, "sclk_nandc1", mux_pll_src_cpll_gpll_p,
[all...]
H A Dclk-rk3399.c134 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" }; variable
583 COMPOSITE(0, "clk_spdif_div", mux_pll_src_cpll_gpll_p, 0,
593 COMPOSITE(SCLK_SPDIF_REC_DPTX, "clk_spdif_rec_dptx", mux_pll_src_cpll_gpll_p, 0,
597 COMPOSITE(0, "clk_i2s0_div", mux_pll_src_cpll_gpll_p, 0,
607 COMPOSITE(0, "clk_i2s1_div", mux_pll_src_cpll_gpll_p, 0,
617 COMPOSITE(0, "clk_i2s2_div", mux_pll_src_cpll_gpll_p, 0,
644 MUX(0, "clk_uart_src", mux_pll_src_cpll_gpll_p, 0,
670 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
886 COMPOSITE(HCLK_SD, "hclk_sd", mux_pll_src_cpll_gpll_p, 0,
1131 COMPOSITE(PCLK_EDP, "pclk_edp", mux_pll_src_cpll_gpll_p,
[all...]

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