| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 52 #define SCLK_HEVC_CORE 134 macro
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| H A D | rv1108-cru.h | 38 #define SCLK_HEVC_CORE 88 macro
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| H A D | rk3288-cru.h | 67 #define SCLK_HEVC_CORE 112 macro
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| H A D | rk3368-cru.h | 60 #define SCLK_HEVC_CORE 112 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 52 #define SCLK_HEVC_CORE 134 macro
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| H A D | rv1108-cru.h | 38 #define SCLK_HEVC_CORE 88 macro
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| H A D | rk3368-cru.h | 60 #define SCLK_HEVC_CORE 112 macro
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| H A D | rk3288-cru.h | 67 #define SCLK_HEVC_CORE 112 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 52 #define SCLK_HEVC_CORE 134 macro
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| H A D | rv1108-cru.h | 38 #define SCLK_HEVC_CORE 88 macro
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| H A D | rk3368-cru.h | 60 #define SCLK_HEVC_CORE 112 macro
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| H A D | rk3288-cru.h | 67 #define SCLK_HEVC_CORE 112 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 52 #define SCLK_HEVC_CORE 134 macro
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| H A D | rv1108-cru.h | 38 #define SCLK_HEVC_CORE 88 macro
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| H A D | rk3368-cru.h | 60 #define SCLK_HEVC_CORE 112 macro
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| H A D | rk3288-cru.h | 67 #define SCLK_HEVC_CORE 112 macro
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| H A D | clk-rk3128.c | 261 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_5plls_p, 0,
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| H A D | clk-rk3288.c | 479 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
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| H A D | clk-rk3368.c | 716 GATE(SCLK_HEVC_CORE, "sclk_hevc_core", "sclk_hevc_core_src", 0, RK3368_CLKGATE_CON(15), 2, GFLAGS),
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| H A D | clk-rv1108.c | 236 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_4plls_p, 0,
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| H A D | clk-rk3128.c | 262 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_5plls_p, 0,
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| H A D | clk-rv1108.c | 237 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_4plls_p, 0,
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| H A D | clk-rk3288.c | 480 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
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| H A D | clk-rk3368.c | 718 GATE(SCLK_HEVC_CORE, "sclk_hevc_core", "sclk_hevc_core_src", 0, RK3368_CLKGATE_CON(15), 2, GFLAGS),
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