| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt6765-mm.c | 35 GATE_MM(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_ck", 3),
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| H A D | clk-mt2701-mm.c | 58 GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12),
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| H A D | clk-mt8183-mm.c | 51 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
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| H A D | clk-mt8173-mm.c | 54 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
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| H A D | clk-mt6779-mm.c | 50 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
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| H A D | clk-mt6797-mm.c | 52 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 7),
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| H A D | clk-mt8167-mm.c | 57 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "smi_mm", 5),
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| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 84 #define CLK_MM_MDP_RSZ1 5 macro
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| H A D | mt6797-clk.h | 222 #define CLK_MM_MDP_RSZ1 8 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 84 #define CLK_MM_MDP_RSZ1 5 macro
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| H A D | mt6797-clk.h | 222 #define CLK_MM_MDP_RSZ1 8 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 84 #define CLK_MM_MDP_RSZ1 5 macro
|
| H A D | mediatek,mt6795-clk.h | 225 #define CLK_MM_MDP_RSZ1 6 macro
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| H A D | mt6797-clk.h | 222 #define CLK_MM_MDP_RSZ1 8 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6765-mm.c | 29 GATE_MM(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_ck", 3),
|
| H A D | clk-mt2701-mm.c | 46 GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12),
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| H A D | clk-mt8167-mm.c | 43 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "smi_mm", 5),
|
| H A D | clk-mt6797-mm.c | 40 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 7),
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| H A D | clk-mt6795-mm.c | 39 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
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| H A D | clk-mt6779-mm.c | 51 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
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| H A D | clk-mt2712-mm.c | 50 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
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| H A D | clk-mt8173-mm.c | 43 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 6),
|
| H A D | clk-mt8183-mm.c | 51 GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15),
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 84 #define CLK_MM_MDP_RSZ1 5 macro
|
| H A D | mediatek,mt6795-clk.h | 225 #define CLK_MM_MDP_RSZ1 6 macro
|