18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (c) 2020 MediaTek Inc.
48c2ecf20Sopenharmony_ci * Copyright (c) 2020 BayLibre, SAS
58c2ecf20Sopenharmony_ci * Author: James Liao <jamesjj.liao@mediatek.com>
68c2ecf20Sopenharmony_ci *         Fabien Parent <fparent@baylibre.com>
78c2ecf20Sopenharmony_ci */
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci#include <linux/clk-provider.h>
108c2ecf20Sopenharmony_ci#include <linux/of.h>
118c2ecf20Sopenharmony_ci#include <linux/of_address.h>
128c2ecf20Sopenharmony_ci#include <linux/of_device.h>
138c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#include "clk-mtk.h"
168c2ecf20Sopenharmony_ci#include "clk-gate.h"
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#include <dt-bindings/clock/mt8167-clk.h>
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_cistatic const struct mtk_gate_regs mm0_cg_regs = {
218c2ecf20Sopenharmony_ci	.set_ofs = 0x104,
228c2ecf20Sopenharmony_ci	.clr_ofs = 0x108,
238c2ecf20Sopenharmony_ci	.sta_ofs = 0x100,
248c2ecf20Sopenharmony_ci};
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_cistatic const struct mtk_gate_regs mm1_cg_regs = {
278c2ecf20Sopenharmony_ci	.set_ofs = 0x114,
288c2ecf20Sopenharmony_ci	.clr_ofs = 0x118,
298c2ecf20Sopenharmony_ci	.sta_ofs = 0x110,
308c2ecf20Sopenharmony_ci};
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci#define GATE_MM0(_id, _name, _parent, _shift) {		\
338c2ecf20Sopenharmony_ci		.id = _id,				\
348c2ecf20Sopenharmony_ci		.name = _name,				\
358c2ecf20Sopenharmony_ci		.parent_name = _parent,			\
368c2ecf20Sopenharmony_ci		.regs = &mm0_cg_regs,			\
378c2ecf20Sopenharmony_ci		.shift = _shift,			\
388c2ecf20Sopenharmony_ci		.ops = &mtk_clk_gate_ops_setclr,	\
398c2ecf20Sopenharmony_ci	}
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci#define GATE_MM1(_id, _name, _parent, _shift) {		\
428c2ecf20Sopenharmony_ci		.id = _id,				\
438c2ecf20Sopenharmony_ci		.name = _name,				\
448c2ecf20Sopenharmony_ci		.parent_name = _parent,			\
458c2ecf20Sopenharmony_ci		.regs = &mm1_cg_regs,			\
468c2ecf20Sopenharmony_ci		.shift = _shift,			\
478c2ecf20Sopenharmony_ci		.ops = &mtk_clk_gate_ops_setclr,	\
488c2ecf20Sopenharmony_ci	}
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_cistatic const struct mtk_gate mm_clks[] = {
518c2ecf20Sopenharmony_ci	/* MM0 */
528c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "smi_mm", 0),
538c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "smi_mm", 1),
548c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_CAM_MDP, "mm_cam_mdp", "smi_mm", 2),
558c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_RDMA, "mm_mdp_rdma", "smi_mm", 3),
568c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "smi_mm", 4),
578c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "smi_mm", 5),
588c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_TDSHP, "mm_mdp_tdshp", "smi_mm", 6),
598c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "smi_mm", 7),
608c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_MDP_WROT, "mm_mdp_wrot", "smi_mm", 8),
618c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_FAKE_ENG, "mm_fake_eng", "smi_mm", 9),
628c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "smi_mm", 10),
638c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "smi_mm", 11),
648c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "smi_mm", 12),
658c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_WDMA, "mm_disp_wdma", "smi_mm", 13),
668c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_COLOR, "mm_disp_color", "smi_mm", 14),
678c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_CCORR, "mm_disp_ccorr", "smi_mm", 15),
688c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_AAL, "mm_disp_aal", "smi_mm", 16),
698c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_GAMMA, "mm_disp_gamma", "smi_mm", 17),
708c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_DITHER, "mm_disp_dither", "smi_mm", 18),
718c2ecf20Sopenharmony_ci	GATE_MM0(CLK_MM_DISP_UFOE, "mm_disp_ufoe", "smi_mm", 19),
728c2ecf20Sopenharmony_ci	/* MM1 */
738c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DISP_PWM_MM, "mm_disp_pwm_mm", "smi_mm", 0),
748c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DISP_PWM_26M, "mm_disp_pwm_26m", "smi_mm", 1),
758c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DSI_ENGINE, "mm_dsi_engine", "smi_mm", 2),
768c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DSI_DIGITAL, "mm_dsi_digital", "dsi0_lntc_dsick", 3),
778c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DPI0_ENGINE, "mm_dpi0_engine", "smi_mm", 4),
788c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DPI0_PXL, "mm_dpi0_pxl", "rg_fdpi0", 5),
798c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_LVDS_PXL, "mm_lvds_pxl", "vpll_dpix", 14),
808c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_LVDS_CTS, "mm_lvds_cts", "lvdstx_dig_cts", 15),
818c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DPI1_ENGINE, "mm_dpi1_engine", "smi_mm", 16),
828c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_DPI1_PXL, "mm_dpi1_pxl", "rg_fdpi1", 17),
838c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_HDMI_PXL, "mm_hdmi_pxl", "rg_fdpi1", 18),
848c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_HDMI_SPDIF, "mm_hdmi_spdif", "apll12_div6", 19),
858c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_HDMI_ADSP_BCK, "mm_hdmi_adsp_b", "apll12_div4b", 20),
868c2ecf20Sopenharmony_ci	GATE_MM1(CLK_MM_HDMI_PLL, "mm_hdmi_pll", "hdmtx_dig_cts", 21),
878c2ecf20Sopenharmony_ci};
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistruct clk_mt8167_mm_driver_data {
908c2ecf20Sopenharmony_ci	const struct mtk_gate *gates_clk;
918c2ecf20Sopenharmony_ci	int gates_num;
928c2ecf20Sopenharmony_ci};
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_cistatic const struct clk_mt8167_mm_driver_data mt8167_mmsys_driver_data = {
958c2ecf20Sopenharmony_ci	.gates_clk = mm_clks,
968c2ecf20Sopenharmony_ci	.gates_num = ARRAY_SIZE(mm_clks),
978c2ecf20Sopenharmony_ci};
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_cistatic int clk_mt8167_mm_probe(struct platform_device *pdev)
1008c2ecf20Sopenharmony_ci{
1018c2ecf20Sopenharmony_ci	struct device *dev = &pdev->dev;
1028c2ecf20Sopenharmony_ci	struct device_node *node = dev->parent->of_node;
1038c2ecf20Sopenharmony_ci	const struct clk_mt8167_mm_driver_data *data;
1048c2ecf20Sopenharmony_ci	struct clk_onecell_data *clk_data;
1058c2ecf20Sopenharmony_ci	int ret;
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci	clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
1088c2ecf20Sopenharmony_ci	if (!clk_data)
1098c2ecf20Sopenharmony_ci		return -ENOMEM;
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci	data = &mt8167_mmsys_driver_data;
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_ci	ret = mtk_clk_register_gates(node, data->gates_clk, data->gates_num,
1148c2ecf20Sopenharmony_ci				     clk_data);
1158c2ecf20Sopenharmony_ci	if (ret)
1168c2ecf20Sopenharmony_ci		return ret;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci	ret = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
1198c2ecf20Sopenharmony_ci	if (ret)
1208c2ecf20Sopenharmony_ci		return ret;
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	return 0;
1238c2ecf20Sopenharmony_ci}
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_cistatic struct platform_driver clk_mt8173_mm_drv = {
1268c2ecf20Sopenharmony_ci	.driver = {
1278c2ecf20Sopenharmony_ci		.name = "clk-mt8167-mm",
1288c2ecf20Sopenharmony_ci	},
1298c2ecf20Sopenharmony_ci	.probe = clk_mt8167_mm_probe,
1308c2ecf20Sopenharmony_ci};
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_cibuiltin_platform_driver(clk_mt8173_mm_drv);
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