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/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h476 void and_(const VRegister& vd, const VRegister& vn, const VRegister& vm);
479 void bic(const VRegister& vd, const int imm8, const int left_shift = 0);
482 void bic(const VRegister& vd, const VRegister& vn, const VRegister& vm);
485 void bif(const VRegister& vd, const VRegister& vn, const VRegister& vm);
488 void bit(const VRegister& vd, const VRegister& vn, const VRegister& vm);
491 void bsl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
494 void pmul(const VRegister& vd, const VRegister& vn, const VRegister& vm);
497 void movi(const VRegister& vd, const uint64_t imm, Shift shift = LSL,
501 void mvn(const VRegister& vd, const VRegister& vn);
504 void mvni(const VRegister& vd, cons
[all...]
H A Dassembler-arm64.cc1433 void Assembler::NEON3DifferentL(const VRegister& vd, const VRegister& vn, in NEON3DifferentL() argument
1436 DCHECK((vn.Is1H() && vd.Is1S()) || (vn.Is1S() && vd.Is1D()) || in NEON3DifferentL()
1437 (vn.Is8B() && vd.Is8H()) || (vn.Is4H() && vd.Is4S()) || in NEON3DifferentL()
1438 (vn.Is2S() && vd.Is2D()) || (vn.Is16B() && vd.Is8H()) || in NEON3DifferentL()
1439 (vn.Is8H() && vd.Is4S()) || (vn.Is4S() && vd.Is2D())); in NEON3DifferentL()
1441 if (vd in NEON3DifferentL()
1450 NEON3DifferentW(const VRegister& vd, const VRegister& vn, const VRegister& vm, NEON3DifferentOp vop) NEON3DifferentW() argument
1459 NEON3DifferentHN(const VRegister& vd, const VRegister& vn, const VRegister& vm, NEON3DifferentOp vop) NEON3DifferentHN() argument
1534 NEONPerm(const VRegister& vd, const VRegister& vn, const VRegister& vm, NEONPermOp op) NEONPerm() argument
1541 trn1(const VRegister& vd, const VRegister& vn, const VRegister& vm) trn1() argument
1546 trn2(const VRegister& vd, const VRegister& vn, const VRegister& vm) trn2() argument
1551 uzp1(const VRegister& vd, const VRegister& vn, const VRegister& vm) uzp1() argument
1556 uzp2(const VRegister& vd, const VRegister& vn, const VRegister& vm) uzp2() argument
1561 zip1(const VRegister& vd, const VRegister& vn, const VRegister& vm) zip1() argument
1566 zip2(const VRegister& vd, const VRegister& vn, const VRegister& vm) zip2() argument
1571 NEONShiftImmediate(const VRegister& vd, const VRegister& vn, NEONShiftImmediateOp op, int immh_immb) NEONShiftImmediate() argument
1585 NEONShiftLeftImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftLeftImmediate() argument
1592 NEONShiftRightImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftRightImmediate() argument
1600 NEONShiftImmediateL(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateL() argument
1614 NEONShiftImmediateN(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateN() argument
1636 shl(const VRegister& vd, const VRegister& vn, int shift) shl() argument
1641 sli(const VRegister& vd, const VRegister& vn, int shift) sli() argument
1646 sqshl(const VRegister& vd, const VRegister& vn, int shift) sqshl() argument
1650 sqshlu(const VRegister& vd, const VRegister& vn, int shift) sqshlu() argument
1654 uqshl(const VRegister& vd, const VRegister& vn, int shift) uqshl() argument
1658 sshll(const VRegister& vd, const VRegister& vn, int shift) sshll() argument
1663 sshll2(const VRegister& vd, const VRegister& vn, int shift) sshll2() argument
1668 sxtl(const VRegister& vd, const VRegister& vn) sxtl() argument
1672 sxtl2(const VRegister& vd, const VRegister& vn) sxtl2() argument
1676 ushll(const VRegister& vd, const VRegister& vn, int shift) ushll() argument
1681 ushll2(const VRegister& vd, const VRegister& vn, int shift) ushll2() argument
1686 uxtl(const VRegister& vd, const VRegister& vn) uxtl() argument
1690 uxtl2(const VRegister& vd, const VRegister& vn) uxtl2() argument
1694 sri(const VRegister& vd, const VRegister& vn, int shift) sri() argument
1699 sshr(const VRegister& vd, const VRegister& vn, int shift) sshr() argument
1704 ushr(const VRegister& vd, const VRegister& vn, int shift) ushr() argument
1709 srshr(const VRegister& vd, const VRegister& vn, int shift) srshr() argument
1714 urshr(const VRegister& vd, const VRegister& vn, int shift) urshr() argument
1719 ssra(const VRegister& vd, const VRegister& vn, int shift) ssra() argument
1724 usra(const VRegister& vd, const VRegister& vn, int shift) usra() argument
1729 srsra(const VRegister& vd, const VRegister& vn, int shift) srsra() argument
1734 ursra(const VRegister& vd, const VRegister& vn, int shift) ursra() argument
1739 shrn(const VRegister& vd, const VRegister& vn, int shift) shrn() argument
1744 shrn2(const VRegister& vd, const VRegister& vn, int shift) shrn2() argument
1749 rshrn(const VRegister& vd, const VRegister& vn, int shift) rshrn() argument
1754 rshrn2(const VRegister& vd, const VRegister& vn, int shift) rshrn2() argument
1759 sqshrn(const VRegister& vd, const VRegister& vn, int shift) sqshrn() argument
1764 sqshrn2(const VRegister& vd, const VRegister& vn, int shift) sqshrn2() argument
1769 sqrshrn(const VRegister& vd, const VRegister& vn, int shift) sqrshrn() argument
1774 sqrshrn2(const VRegister& vd, const VRegister& vn, int shift) sqrshrn2() argument
1779 sqshrun(const VRegister& vd, const VRegister& vn, int shift) sqshrun() argument
1784 sqshrun2(const VRegister& vd, const VRegister& vn, int shift) sqshrun2() argument
1789 sqrshrun(const VRegister& vd, const VRegister& vn, int shift) sqrshrun() argument
1794 sqrshrun2(const VRegister& vd, const VRegister& vn, int shift) sqrshrun2() argument
1799 uqshrn(const VRegister& vd, const VRegister& vn, int shift) uqshrn() argument
1804 uqshrn2(const VRegister& vd, const VRegister& vn, int shift) uqshrn2() argument
1809 uqrshrn(const VRegister& vd, const VRegister& vn, int shift) uqrshrn() argument
1814 uqrshrn2(const VRegister& vd, const VRegister& vn, int shift) uqrshrn2() argument
1819 uaddw(const VRegister& vd, const VRegister& vn, const VRegister& vm) uaddw() argument
1825 uaddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm) uaddw2() argument
1831 saddw(const VRegister& vd, const VRegister& vn, const VRegister& vm) saddw() argument
1837 saddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm) saddw2() argument
1843 usubw(const VRegister& vd, const VRegister& vn, const VRegister& vm) usubw() argument
1849 usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm) usubw2() argument
1855 ssubw(const VRegister& vd, const VRegister& vn, const VRegister& vm) ssubw() argument
1861 ssubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm) ssubw2() argument
1878 ins(const VRegister& vd, int vd_index, const Register& rn) ins() argument
1938 cls(const VRegister& vd, const VRegister& vn) cls() argument
1944 clz(const VRegister& vd, const VRegister& vn) clz() argument
1950 cnt(const VRegister& vd, const VRegister& vn) cnt() argument
1956 rev16(const VRegister& vd, const VRegister& vn) rev16() argument
1962 rev32(const VRegister& vd, const VRegister& vn) rev32() argument
1968 rev64(const VRegister& vd, const VRegister& vn) rev64() argument
1974 ursqrte(const VRegister& vd, const VRegister& vn) ursqrte() argument
1980 urecpe(const VRegister& vd, const VRegister& vn) urecpe() argument
1986 NEONAddlp(const VRegister& vd, const VRegister& vn, NEON2RegMiscOp op) NEONAddlp() argument
1997 saddlp(const VRegister& vd, const VRegister& vn) saddlp() argument
2001 uaddlp(const VRegister& vd, const VRegister& vn) uaddlp() argument
2005 sadalp(const VRegister& vd, const VRegister& vn) sadalp() argument
2009 uadalp(const VRegister& vd, const VRegister& vn) uadalp() argument
2013 NEONAcrossLanesL(const VRegister& vd, const VRegister& vn, NEONAcrossLanesOp op) NEONAcrossLanesL() argument
2021 saddlv(const VRegister& vd, const VRegister& vn) saddlv() argument
2025 uaddlv(const VRegister& vd, const VRegister& vn) uaddlv() argument
2029 NEONAcrossLanes(const VRegister& vd, const VRegister& vn, NEONAcrossLanesOp op) NEONAcrossLanes() argument
2060 mov(const VRegister& vd, int vd_index, const Register& rn) mov() argument
2096 mov(const VRegister& vd, const VRegister& vn, int vn_index) mov() argument
2101 dup(const VRegister& vd, const Register& rn) dup() argument
2108 ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) ins() argument
2139 NEONTable(const VRegister& vd, const VRegister& vn, const VRegister& vm, NEONTableOp op) NEONTable() argument
2147 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vm) tbl() argument
2152 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) tbl() argument
2160 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) tbl() argument
2170 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) tbl() argument
2181 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm) tbx() argument
2186 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) tbx() argument
2194 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) tbx() argument
2204 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) tbx() argument
2215 mov(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) mov() argument
2614 fmov(const VRegister& vd, double imm) fmov() argument
2625 fmov(const VRegister& vd, float imm) fmov() argument
2643 fmov(const VRegister& vd, const Register& rn) fmov() argument
2649 fmov(const VRegister& vd, const VRegister& vn) fmov() argument
2654 fmov(const VRegister& vd, int index, const Register& rn) fmov() argument
2686 fnmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) fnmul() argument
2725 NEONFPConvertToInt(const VRegister& vd, const VRegister& vn, Instr op) NEONFPConvertToInt() argument
2734 fcvt(const VRegister& vd, const VRegister& vn) fcvt() argument
2750 fcvtl(const VRegister& vd, const VRegister& vn) fcvtl() argument
2756 fcvtl2(const VRegister& vd, const VRegister& vn) fcvtl2() argument
2762 fcvtn(const VRegister& vd, const VRegister& vn) fcvtn() argument
2768 fcvtn2(const VRegister& vd, const VRegister& vn) fcvtn2() argument
2774 fcvtxn(const VRegister& vd, const VRegister& vn) fcvtxn() argument
2785 fcvtxn2(const VRegister& vd, const VRegister& vn) fcvtxn2() argument
2816 scvtf(const VRegister& vd, const VRegister& vn, int fbits) scvtf() argument
2826 ucvtf(const VRegister& vd, const VRegister& vn, int fbits) ucvtf() argument
2836 scvtf(const VRegister& vd, const Register& rn, int fbits) scvtf() argument
2856 NEON3Same(const VRegister& vd, const VRegister& vn, const VRegister& vm, NEON3SameOp vop) NEON3Same() argument
2872 NEONFP3Same(const VRegister& vd, const VRegister& vn, const VRegister& vm, Instr op) NEONFP3Same() argument
2907 shll(const VRegister& vd, const VRegister& vn, int shift) shll() argument
2915 shll2(const VRegister& vd, const VRegister& vn, int shift) shll2() argument
2923 NEONFP2RegMisc(const VRegister& vd, const VRegister& vn, NEON2RegMiscOp vop, double value) NEONFP2RegMisc() argument
2940 fcmeq(const VRegister& vd, const VRegister& vn, double value) fcmeq() argument
2944 fcmge(const VRegister& vd, const VRegister& vn, double value) fcmge() argument
2948 fcmgt(const VRegister& vd, const VRegister& vn, double value) fcmgt() argument
2952 fcmle(const VRegister& vd, const VRegister& vn, double value) fcmle() argument
2956 fcmlt(const VRegister& vd, const VRegister& vn, double value) fcmlt() argument
2960 frecpx(const VRegister& vd, const VRegister& vn) frecpx() argument
2978 fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) fcvtzs() argument
2999 fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) fcvtzu() argument
3009 NEONFP2RegMisc(const VRegister& vd, const VRegister& vn, Instr op) NEONFP2RegMisc() argument
3015 NEON2RegMisc(const VRegister& vd, const VRegister& vn, NEON2RegMiscOp vop, int value) NEON2RegMisc() argument
3032 cmeq(const VRegister& vd, const VRegister& vn, int value) cmeq() argument
3037 cmge(const VRegister& vd, const VRegister& vn, int value) cmge() argument
3042 cmgt(const VRegister& vd, const VRegister& vn, int value) cmgt() argument
3047 cmle(const VRegister& vd, const VRegister& vn, int value) cmle() argument
3052 cmlt(const VRegister& vd, const VRegister& vn, int value) cmlt() argument
3164 addp(const VRegister& vd, const VRegister& vn) addp() argument
3169 faddp(const VRegister& vd, const VRegister& vn) faddp() argument
3174 fmaxp(const VRegister& vd, const VRegister& vn) fmaxp() argument
3179 fminp(const VRegister& vd, const VRegister& vn) fminp() argument
3184 fmaxnmp(const VRegister& vd, const VRegister& vn) fmaxnmp() argument
3189 fminnmp(const VRegister& vd, const VRegister& vn) fminnmp() argument
3194 orr(const VRegister& vd, const int imm8, const int left_shift) orr() argument
3198 mov(const VRegister& vd, const VRegister& vn) mov() argument
3208 bic(const VRegister& vd, const int imm8, const int left_shift) bic() argument
3212 movi(const VRegister& vd, const uint64_t imm, Shift shift, const int shift_amount) movi() argument
3239 mvn(const VRegister& vd, const VRegister& vn) mvn() argument
3249 mvni(const VRegister& vd, const int imm8, Shift shift, const int shift_amount) mvni() argument
3259 NEONFPByElement(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONFPByElement() argument
3278 NEONByElement(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONByElement() argument
3300 NEONByElementL(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, NEONByIndexedElementOp vop) NEONByElementL() argument
3384 suqadd(const VRegister& vd, const VRegister& vn) suqadd() argument
3388 usqadd(const VRegister& vd, const VRegister& vn) usqadd() argument
3392 abs(const VRegister& vd, const VRegister& vn) abs() argument
3397 sqabs(const VRegister& vd, const VRegister& vn) sqabs() argument
3401 neg(const VRegister& vd, const VRegister& vn) neg() argument
3406 sqneg(const VRegister& vd, const VRegister& vn) sqneg() argument
3410 NEONXtn(const VRegister& vd, const VRegister& vn, NEON2RegMiscOp vop) NEONXtn() argument
3427 xtn(const VRegister& vd, const VRegister& vn) xtn() argument
3432 xtn2(const VRegister& vd, const VRegister& vn) xtn2() argument
3437 sqxtn(const VRegister& vd, const VRegister& vn) sqxtn() argument
3442 sqxtn2(const VRegister& vd, const VRegister& vn) sqxtn2() argument
3447 sqxtun(const VRegister& vd, const VRegister& vn) sqxtun() argument
3452 sqxtun2(const VRegister& vd, const VRegister& vn) sqxtun2() argument
3457 uqxtn(const VRegister& vd, const VRegister& vn) uqxtn() argument
3462 uqxtn2(const VRegister& vd, const VRegister& vn) uqxtn2() argument
3468 not_(const VRegister& vd, const VRegister& vn) not_() argument
3474 rbit(const VRegister& vd, const VRegister& vn) rbit() argument
3480 ext(const VRegister& vd, const VRegister& vn, const VRegister& vm, int index) ext() argument
3488 dup(const VRegister& vd, const VRegister& vn, int vn_index) dup() argument
3796 FPDataProcessing1Source(const VRegister& vd, const VRegister& vn, FPDataProcessing1SourceOp op) FPDataProcessing1Source() argument
3820 NEONModifiedImmShiftLsl(const VRegister& vd, const int imm8, const int left_shift, NEONModifiedImmediateOp op) NEONModifiedImmShiftLsl() argument
3851 NEONModifiedImmShiftMsl(const VRegister& vd, const int imm8, const int shift_amount, NEONModifiedImmediateOp op) NEONModifiedImmShiftMsl() argument
[all...]
H A Dmacro-assembler-arm64.h181 void Mov(const VRegister& vd, int vd_index, const VRegister& vn, in Mov() argument
184 mov(vd, vd_index, vn, vn_index); in Mov()
187 void Mov(const VRegister& vd, const VRegister& vn, int index) { in Mov() argument
189 mov(vd, vn, index); in Mov()
191 void Mov(const VRegister& vd, int vd_index, const Register& rn) { in Mov() argument
193 mov(vd, vd_index, rn); in Mov()
244 void MASM(const VRegister& vd, const VRegister& vn, const VRegister& vm, \
247 ASM(vd, vn, vm, vm_index); \
329 void MASM(const VRegister& vd, const VRegister& vn) { \
331 ASM(vd, v
492 Bic(const VRegister& vd, const int imm8, const int left_shift = 0) Bic() argument
669 Orr(const VRegister& vd, const int imm8, const int left_shift = 0) Orr() argument
1023 Fcvtzs(const VRegister& vd, const VRegister& vn, int fbits = 0) Fcvtzs() argument
1035 Fcvtzu(const VRegister& vd, const VRegister& vn, int fbits = 0) Fcvtzu() argument
1133 Scvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) Scvtf() argument
1139 Ucvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) Ucvtf() argument
1160 Ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Ins() argument
1165 Ins(const VRegister& vd, int vd_index, const Register& rn) Ins() argument
1177 Dup(const VRegister& vd, const VRegister& vn, int index) Dup() argument
1181 Dup(const VRegister& vd, const Register& rn) Dup() argument
1264 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vm) Tbl() argument
1268 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) Tbl() argument
1273 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) Tbl() argument
1278 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) Tbl() argument
1283 Ext(const VRegister& vd, const VRegister& vn, const VRegister& vm, int index) Ext() argument
1324 Cmgt(const VRegister& vd, const VRegister& vn, int imm) Cmgt() argument
1328 Cmge(const VRegister& vd, const VRegister& vn, int imm) Cmge() argument
1332 Cmeq(const VRegister& vd, const VRegister& vn, int imm) Cmeq() argument
1336 Cmlt(const VRegister& vd, const VRegister& vn, int imm) Cmlt() argument
1340 Cmle(const VRegister& vd, const VRegister& vn, int imm) Cmle() argument
1570 Fcvtl(const VRegister& vd, const VRegister& vn) Fcvtl() argument
1574 Fcvtl2(const VRegister& vd, const VRegister& vn) Fcvtl2() argument
1578 Fcvtn(const VRegister& vd, const VRegister& vn) Fcvtn() argument
1582 Fcvtn2(const VRegister& vd, const VRegister& vn) Fcvtn2() argument
1586 Fcvtxn(const VRegister& vd, const VRegister& vn) Fcvtxn() argument
1590 Fcvtxn2(const VRegister& vd, const VRegister& vn) Fcvtxn2() argument
1612 Mvni(const VRegister& vd, const int imm8, Shift shift = LSL, const int shift_amount = 0) Mvni() argument
1730 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm) Tbx() argument
1734 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) Tbx() argument
1739 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) Tbx() argument
1744 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) Tbx() argument
[all...]
H A Dmacro-assembler-arm64.cc411 void TurboAssembler::Movi16bitHelper(const VRegister& vd, uint64_t imm) { in Movi16bitHelper() argument
416 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Movi16bitHelper()
418 movi(vd, byte2, LSL, 8); in Movi16bitHelper()
420 movi(vd, byte1); in Movi16bitHelper()
422 mvni(vd, ~byte2 & 0xFF, LSL, 8); in Movi16bitHelper()
424 mvni(vd, ~byte1 & 0xFF); in Movi16bitHelper()
429 dup(vd, temp); in Movi16bitHelper()
433 void TurboAssembler::Movi32bitHelper(const VRegister& vd, uint64_ argument
510 Movi64bitHelper(const VRegister& vd, uint64_t imm) Movi64bitHelper() argument
546 Movi(const VRegister& vd, uint64_t imm, Shift shift, int shift_amount) Movi() argument
567 Movi(const VRegister& vd, uint64_t hi, uint64_t lo) Movi() argument
[all...]
H A Dmacro-assembler-arm64-inl.h662 void TurboAssembler::Fmov(VRegister vd, double imm) { in Fmov() argument
665 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Fmov()
666 Fmov(vd, static_cast<float>(imm)); in Fmov()
670 DCHECK(vd.Is1D() || vd.Is2D()); in Fmov()
672 fmov(vd, imm); in Fmov()
675 if (vd.IsScalar()) { in Fmov()
677 fmov(vd, xz in Fmov()
690 Fmov(VRegister vd, float imm) Fmov() argument
[all...]
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.cc315 void Assembler::NEONTable(const VRegister& vd, in NEONTable() argument
320 VIXL_ASSERT(vd.Is16B() || vd.Is8B()); in NEONTable()
322 VIXL_ASSERT(AreSameFormat(vd, vm)); in NEONTable()
323 Emit(op | (vd.IsQ() ? NEON_Q : 0) | Rm(vm) | Rn(vn) | Rd(vd)); in NEONTable()
327 void Assembler::tbl(const VRegister& vd, in tbl() argument
331 NEONTable(vd, vn, vm, NEON_TBL_1v); in tbl()
335 void Assembler::tbl(const VRegister& vd, in tbl() argument
343 NEONTable(vd, v in tbl()
347 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) tbl() argument
360 tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) tbl() argument
374 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm) tbx() argument
382 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) tbx() argument
394 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) tbx() argument
407 tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) tbx() argument
[all...]
H A Dassembler-aarch64.h590 void tbl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
593 void tbl(const VRegister& vd,
599 void tbl(const VRegister& vd,
606 void tbl(const VRegister& vd,
614 void tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm);
617 void tbx(const VRegister& vd,
623 void tbx(const VRegister& vd,
630 void tbx(const VRegister& vd,
2225 void fmov(const VRegister& vd, double imm);
2228 void fmov(const VRegister& vd, floa
[all...]
H A Dmacro-assembler-aarch64.cc1024 void MacroAssembler::Movi16bitHelper(const VRegister& vd, uint64_t imm) { in Emit() argument
1029 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); in Emit()
1031 movi(vd, byte2, LSL, 8); in Emit()
1033 movi(vd, byte1); in Emit()
1035 mvni(vd, ~byte2 & 0xff, LSL, 8); in Emit()
1037 mvni(vd, ~byte1 & 0xff); in Emit()
1042 dup(vd, temp); in Emit()
1047 void MacroAssembler::Movi32bitHelper(const VRegister& vd, uint64_ in Emit() argument
1125 Movi64bitHelper(const VRegister& vd, uint64_t imm) Emit() argument
1162 Movi(const VRegister& vd, uint64_t imm, Shift shift, int shift_amount) Emit() argument
1187 Movi(const VRegister& vd, uint64_t hi, uint64_t lo) Emit() argument
1633 Fmov(VRegister vd, double imm) Emit() argument
1673 Fmov(VRegister vd, float imm) Emit() argument
1713 Fmov(VRegister vd, Float16 imm) Emit() argument
[all...]
H A Dmacro-assembler-aarch64.h1480 void Fadd(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fadd() argument
1483 fadd(vd, vn, vm); in Fadd()
1513 void Fcsel(const VRegister& vd, in Fcsel() argument
1520 fcsel(vd, vn, vm, cond); in Fcsel()
1522 void Fcvt(const VRegister& vd, const VRegister& vn) { in Fcvt() argument
1525 fcvt(vd, vn); in Fcvt()
1527 void Fcvtl(const VRegister& vd, const VRegister& vn) { in Fcvtl() argument
1530 fcvtl(vd, vn); in Fcvtl()
1532 void Fcvtl2(const VRegister& vd, const VRegister& vn) { in Fcvtl2() argument
1535 fcvtl2(vd, v in Fcvtl2()
1537 Fcvtn(const VRegister& vd, const VRegister& vn) Fcvtn() argument
1542 Fcvtn2(const VRegister& vd, const VRegister& vn) Fcvtn2() argument
1547 Fcvtxn(const VRegister& vd, const VRegister& vn) Fcvtxn() argument
1552 Fcvtxn2(const VRegister& vd, const VRegister& vn) Fcvtxn2() argument
1623 Fdiv(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fdiv() argument
1628 Fmax(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fmax() argument
1633 Fmaxnm(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fmaxnm() argument
1638 Fmin(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fmin() argument
1643 Fminnm(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fminnm() argument
1648 Fmov(const VRegister& vd, const VRegister& vn) Fmov() argument
1654 Fmov(const VRegister& vd, const Register& rn) Fmov() argument
1660 Fmov(const VRegister& vd, int index, const Register& rn) Fmov() argument
1688 Fmov(VRegister vd, T imm) Fmov() argument
1698 Fmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fmul() argument
1703 Fnmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fnmul() argument
1708 Fmadd(const VRegister& vd, const VRegister& vn, const VRegister& vm, const VRegister& va) Fmadd() argument
1716 Fmsub(const VRegister& vd, const VRegister& vn, const VRegister& vm, const VRegister& va) Fmsub() argument
1724 Fnmadd(const VRegister& vd, const VRegister& vn, const VRegister& vm, const VRegister& va) Fnmadd() argument
1732 Fnmsub(const VRegister& vd, const VRegister& vn, const VRegister& vm, const VRegister& va) Fnmsub() argument
1740 Fsub(const VRegister& vd, const VRegister& vn, const VRegister& vm) Fsub() argument
2431 Scvtf(const VRegister& vd, const Register& rn, int fbits = 0) Scvtf() argument
2627 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vm) Tbl() argument
2632 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) Tbl() argument
2640 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) Tbl() argument
2649 Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) Tbl() argument
2659 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm) Tbx() argument
2664 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vm) Tbx() argument
2672 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vm) Tbx() argument
2681 Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vn2, const VRegister& vn3, const VRegister& vn4, const VRegister& vm) Tbx() argument
2723 Ucvtf(const VRegister& vd, const Register& rn, int fbits = 0) Ucvtf() argument
3261 Bic(const VRegister& vd, const int imm8, const int left_shift = 0) Bic() argument
3266 Cmeq(const VRegister& vd, const VRegister& vn, int imm) Cmeq() argument
3271 Cmge(const VRegister& vd, const VRegister& vn, int imm) Cmge() argument
3276 Cmgt(const VRegister& vd, const VRegister& vn, int imm) Cmgt() argument
3281 Cmle(const VRegister& vd, const VRegister& vn, int imm) Cmle() argument
3286 Cmlt(const VRegister& vd, const VRegister& vn, int imm) Cmlt() argument
3291 Dup(const VRegister& vd, const VRegister& vn, int index) Dup() argument
3296 Dup(const VRegister& vd, const Register& rn) Dup() argument
3301 Ext(const VRegister& vd, const VRegister& vn, const VRegister& vm, int index) Ext() argument
3309 Fcadd(const VRegister& vd, const VRegister& vn, const VRegister& vm, int rot) Fcadd() argument
3317 Fcmla(const VRegister& vd, const VRegister& vn, const VRegister& vm, int vm_index, int rot) Fcmla() argument
3326 Fcmla(const VRegister& vd, const VRegister& vn, const VRegister& vm, int rot) Fcmla() argument
3334 Ins(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Ins() argument
3342 Ins(const VRegister& vd, int vd_index, const Register& rn) Ins() argument
3455 Mov(const VRegister& vd, int vd_index, const VRegister& vn, int vn_index) Mov() argument
3463 Mov(const VRegister& vd, const VRegister& vn, int index) Mov() argument
3468 Mov(const VRegister& vd, int vd_index, const Register& rn) Mov() argument
3483 Mvni(const VRegister& vd, const int imm8, Shift shift = LSL, const int shift_amount = 0) Mvni() argument
3491 Orr(const VRegister& vd, const int imm8, const int left_shift = 0) Orr() argument
3496 Scvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) Scvtf() argument
3501 Ucvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) Ucvtf() argument
3506 Fcvtzs(const VRegister& vd, const VRegister& vn, int fbits = 0) Fcvtzs() argument
3511 Fcvtzu(const VRegister& vd, const VRegister& vn, int fbits = 0) Fcvtzu() argument
3703 Andv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Andv() argument
3864 Clasta(const VRegister& vd, const PRegister& pg, const VRegister& vn, const ZRegister& zm) Clasta() argument
3884 Clastb(const VRegister& vd, const PRegister& pg, const VRegister& vn, const ZRegister& zm) Clastb() argument
4276 Eorv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Eorv() argument
4349 Fadda(const VRegister& vd, const PRegister& pg, const VRegister& vn, const ZRegister& zm) Fadda() argument
4357 Faddv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Faddv() argument
4592 Fmaxnmv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Fmaxnmv() argument
4597 Fmaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Fmaxv() argument
4629 Fminnmv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Fminnmv() argument
4634 Fminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Fminv() argument
4965 Lasta(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Lasta() argument
4975 Lastb(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Lastb() argument
5656 Orv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Orv() argument
5840 Smaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Smaxv() argument
5846 Sminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Sminv() argument
6285 Umaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Umaxv() argument
6291 Uminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) Uminv() argument
[all...]
H A Dassembler-sve-aarch64.cc550 void Assembler::fadda(const VRegister& vd, in fadda() argument
560 VIXL_ASSERT(vd.Is(vn)); in fadda()
561 VIXL_ASSERT(vd.IsScalar()); in fadda()
563 VIXL_ASSERT(AreSameLaneSize(zm, vd)); in fadda()
565 Emit(FADDA_v_p_z | SVESize(zm) | Rd(vd) | PgLow8(pg) | Rn(zm)); in fadda()
1326 void Assembler::faddv(const VRegister& vd, in faddv() argument
1334 VIXL_ASSERT(vd.IsScalar()); in faddv()
1336 VIXL_ASSERT(AreSameLaneSize(zn, vd)); in faddv()
1338 Emit(FADDV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn)); in faddv()
1341 void Assembler::fmaxnmv(const VRegister& vd, in fmaxnmv() argument
1356 fmaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) fmaxv() argument
1371 fminnmv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) fminnmv() argument
1386 fminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) fminv() argument
3255 andv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) andv() argument
3264 eorv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) eorv() argument
3289 orv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) orv() argument
3307 smaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) smaxv() argument
3316 sminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) sminv() argument
3333 umaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) umaxv() argument
3342 uminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn) uminv() argument
5692 clasta(const VRegister& vd, const PRegister& pg, const VRegister& vn, const ZRegister& zm) clasta() argument
5740 clastb(const VRegister& vd, const PRegister& pg, const VRegister& vn, const ZRegister& zm) clastb() argument
5830 lasta(const VRegister& vd, const PRegister& pg, const ZRegister& zn) lasta() argument
5855 lastb(const VRegister& vd, const PRegister& pg, const ZRegister& zn) lastb() argument
[all...]
/third_party/ffmpeg/libavfilter/
H A Daf_volumedetect.c39 VolDetectContext *vd = ctx->priv; in filter_frame() local
53 vd->histogram[pcm[i] + 0x8000]++; in filter_frame()
71 VolDetectContext *vd = ctx->priv; in print_stats() local
77 nb_samples += vd->histogram[i]; in print_stats()
88 nb_samples_shift += vd->histogram[i] >> shift; in print_stats()
89 power += (i - 0x8000) * (i - 0x8000) * (vd->histogram[i] >> shift); in print_stats()
98 while (max_volume > 0 && !vd->histogram[0x8000 + max_volume] && in print_stats()
99 !vd->histogram[0x8000 - max_volume]) in print_stats()
104 histdb[(int)logdb((i - 0x8000) * (i - 0x8000))] += vd->histogram[i]; in print_stats()
/third_party/ffmpeg/libswscale/ppc/
H A Dswscale_altivec.c162 vec_f vd; in yuv2plane1_float_altivec() local
173 vd = vec_ctf(v, 0); in yuv2plane1_float_altivec()
174 vd = vec_madd(vd, vmul, vzero); in yuv2plane1_float_altivec()
176 vec_st(vd, 0, &dest[i]); in yuv2plane1_float_altivec()
197 vec_f vd; in yuv2plane1_float_bswap_altivec() local
208 vd = vec_ctf(v, 0); in yuv2plane1_float_bswap_altivec()
209 vd = vec_madd(vd, vmul, vzero); in yuv2plane1_float_bswap_altivec()
211 vd in yuv2plane1_float_bswap_altivec()
[all...]
/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.cc214 type_sew_t<x>::type& vd = \
220 type_usew_t<x>::type& vd = \
226 type_sew_t<x>::type& vd = \
232 type_usew_t<x>::type& vd = \
238 type_sew_t<x>::type& vd = \
244 type_usew_t<x>::type& vd = \
251 type_sew_t<half_x>::type& vd = \
258 type_usew_t<half_x>::type& vd = \
264 type_sew_t<x>::type& vd = \
272 auto& vd
[all...]
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc2438 int vd, d; in vldr() local
2439 dst.split_code(&vd, &d); in vldr()
2444 vd * B12 | 0xB * B8 | ((offset / 4) & 255)); in vldr()
2456 emit(cond | 0xD * B24 | d * B22 | B20 | scratch.code() * B16 | vd * B12 | in vldr()
2538 int vd, d; in vstr() local
2539 src.split_code(&vd, &d); in vstr()
2542 emit(cond | 0xD * B24 | u * B23 | d * B22 | base.code() * B16 | vd * B12 | in vstr()
2555 emit(cond | 0xD * B24 | d * B22 | scratch.code() * B16 | vd * B12 | in vstr()
2735 int vd, d; in vmov() local
2736 dst.split_code(&vd, in vmov()
2753 int vd, d; vmov() local
2821 int vd, d; vmov() local
2844 int vd, d; vmov() local
2900 int vd, d; vmov() local
3119 int vd, d; vcvt_f64_s32() local
3135 int vd, d; vneg() local
3149 int vd, d; vneg() local
3165 int vd, d; vabs() local
3178 int vd, d; vabs() local
3196 int vd, d; vadd() local
3213 int vd, d; vadd() local
3233 int vd, d; vsub() local
3250 int vd, d; vsub() local
3270 int vd, d; vmul() local
3287 int vd, d; vmul() local
3305 int vd, d; vmla() local
3320 int vd, d; vmla() local
3338 int vd, d; vmls() local
3353 int vd, d; vmls() local
3373 int vd, d; vdiv() local
3390 int vd, d; vdiv() local
3408 int vd, d; vcmp() local
3422 int vd, d; vcmp() local
3438 int vd, d; vcmp() local
3451 int vd, d; vcmp() local
3462 int vd, d; vmaxnm() local
3478 int vd, d; vmaxnm() local
3494 int vd, d; vminnm() local
3510 int vd, d; vminnm() local
3527 int vd, d; vsel() local
3559 int vd, d; vsel() local
3592 int vd, d; vsqrt() local
3605 int vd, d; vsqrt() local
3632 int vd, d; vrinta() local
3645 int vd, d; vrinta() local
3658 int vd, d; vrintn() local
3671 int vd, d; vrintn() local
3684 int vd, d; vrintp() local
3697 int vd, d; vrintp() local
3710 int vd, d; vrintm() local
3723 int vd, d; vrintm() local
3736 int vd, d; vrintz() local
3749 int vd, d; vrintz() local
3765 int vd, d; vld1() local
3787 int vd, d; vld1s() local
3798 int vd, d; vld1r() local
3811 int vd, d; vst1() local
3827 int vd, d; vst1s() local
3838 int vd, d; vmovl() local
3855 int vd, d; vqmovn() local
3896 int vd, d; vmov() local
3939 int vd, d; vdup() local
3966 int vd, d; EncodeNeonDupOp() local
3995 int vd, d; EncodeNeonVCVT() local
4159 int vd, d; EncodeNeonUnaryOp() local
4252 int vd, d; EncodeNeonBinaryBitwiseOp() local
4376 int vd, d; EncodeNeonBinOp() local
4449 int vd, d; EncodeNeonBinOp() local
4521 int vd, d; vmlal() local
4556 int vd, d; vmull() local
4607 int vd, d; EncodeNeonShiftRegisterOp() local
4664 int vd, d; EncodeNeonShiftOp() local
4785 int vd, d; EncodeNeonPairwiseOp() local
4802 int vd, d; vpadd() local
4956 int vd, d; vext() local
5075 int vd, d; EncodeNeonVTB() local
[all...]
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.cc1146 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, in GenInstrV() argument
1150 ((vd.code() & 0x1F) << kRvvVdShift) | in GenInstrV()
1156 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, in GenInstrV() argument
1160 ((vd.code() & 0x1F) << kRvvVdShift) | in GenInstrV()
1188 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, in GenInstrV() argument
1192 ((vd.code() & 0x1F) << kRvvVdShift) | in GenInstrV()
1199 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, in GenInstrV() argument
1203 ((vd.code() & 0x1F) << kRvvVdShift) | in GenInstrV()
1219 void Assembler::GenInstrV(uint8_t funct6, VRegister vd, int8_t imm5, in GenInstrV() argument
1223 ((vd in GenInstrV()
1230 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, uint8_t umop, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
1244 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, Register rs2, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
1259 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, VRegister vs2, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
2476 vredmaxu_vs(VRegister vd, VRegister vs2, VRegister vs1, MaskType mask) vredmaxu_vs() argument
2481 vredmax_vs(VRegister vd, VRegister vs2, VRegister vs1, MaskType mask) vredmax_vs() argument
2486 vredmin_vs(VRegister vd, VRegister vs2, VRegister vs1, MaskType mask) vredmin_vs() argument
2491 vredminu_vs(VRegister vd, VRegister vs2, VRegister vs1, MaskType mask) vredminu_vs() argument
2496 vmv_vv(VRegister vd, VRegister vs1) vmv_vv() argument
2500 vmv_vx(VRegister vd, Register rs1) vmv_vx() argument
2504 vmv_vi(VRegister vd, uint8_t simm5) vmv_vi() argument
2512 vmv_sx(VRegister vd, Register rs1) vmv_sx() argument
2516 vmerge_vv(VRegister vd, VRegister vs1, VRegister vs2) vmerge_vv() argument
2520 vmerge_vx(VRegister vd, Register rs1, VRegister vs2) vmerge_vx() argument
2524 vmerge_vi(VRegister vd, uint8_t imm5, VRegister vs2) vmerge_vi() argument
2528 vadc_vv(VRegister vd, VRegister vs1, VRegister vs2) vadc_vv() argument
2532 vadc_vx(VRegister vd, Register rs1, VRegister vs2) vadc_vx() argument
2536 vadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) vadc_vi() argument
2540 vmadc_vv(VRegister vd, VRegister vs1, VRegister vs2) vmadc_vv() argument
2544 vmadc_vx(VRegister vd, Register rs1, VRegister vs2) vmadc_vx() argument
2548 vmadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) vmadc_vi() argument
2552 vrgather_vv(VRegister vd, VRegister vs2, VRegister vs1, MaskType mask) vrgather_vv() argument
2559 vrgather_vi(VRegister vd, VRegister vs2, int8_t imm5, MaskType mask) vrgather_vi() argument
2565 vrgather_vx(VRegister vd, VRegister vs2, Register rs1, MaskType mask) vrgather_vx() argument
2571 vwaddu_wx(VRegister vd, VRegister vs2, Register rs1, MaskType mask) vwaddu_wx() argument
2576 vid_v(VRegister vd, MaskType mask) vid_v() argument
2660 vfmv_vf(VRegister vd, FPURegister fs1, MaskType mask) vfmv_vf() argument
2668 vfmv_sf(VRegister vd, FPURegister fs) vfmv_sf() argument
2914 vl(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vl() argument
2919 vls(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vls() argument
2924 vlx(VRegister vd, Register rs1, VRegister vs2, VSew vsew, MaskType mask) vlx() argument
2930 vs(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vs() argument
2941 vsx(VRegister vd, Register rs1, VRegister vs2, VSew vsew, MaskType mask) vsx() argument
2946 vsu(VRegister vd, Register rs1, VRegister vs2, VSew vsew, MaskType mask) vsu() argument
2952 vlseg2(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg2() argument
2958 vlseg3(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg3() argument
2964 vlseg4(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg4() argument
2970 vlseg5(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg5() argument
2976 vlseg6(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg6() argument
2982 vlseg7(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg7() argument
2988 vlseg8(VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask) vlseg8() argument
2993 vsseg2(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg2() argument
2998 vsseg3(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg3() argument
3003 vsseg4(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg4() argument
3008 vsseg5(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg5() argument
3013 vsseg6(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg6() argument
3018 vsseg7(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg7() argument
3023 vsseg8(VRegister vd, Register rs1, uint8_t sumop, VSew vsew, MaskType mask) vsseg8() argument
3029 vlsseg2(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg2() argument
3034 vlsseg3(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg3() argument
3039 vlsseg4(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg4() argument
3044 vlsseg5(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg5() argument
3049 vlsseg6(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg6() argument
3054 vlsseg7(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg7() argument
3059 vlsseg8(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vlsseg8() argument
3064 vssseg2(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg2() argument
3069 vssseg3(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg3() argument
3074 vssseg4(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg4() argument
3079 vssseg5(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg5() argument
3084 vssseg6(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg6() argument
3089 vssseg7(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg7() argument
3094 vssseg8(VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask) vssseg8() argument
3100 vlxseg2(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg2() argument
3105 vlxseg3(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg3() argument
3110 vlxseg4(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg4() argument
3115 vlxseg5(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg5() argument
3120 vlxseg6(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg6() argument
3125 vlxseg7(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg7() argument
3130 vlxseg8(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vlxseg8() argument
3135 vsxseg2(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg2() argument
3140 vsxseg3(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg3() argument
3145 vsxseg4(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg4() argument
3150 vsxseg5(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg5() argument
3155 vsxseg6(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg6() argument
3160 vsxseg7(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg7() argument
3165 vsxseg8(VRegister vd, Register rs1, VRegister rs2, VSew vsew, MaskType mask) vsxseg8() argument
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H A Dassembler-riscv64.h667 void vl(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
669 void vls(VRegister vd, Register rs1, Register rs2, VSew vsew,
671 void vlx(VRegister vd, Register rs1, VRegister vs3, VSew vsew,
674 void vs(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
676 void vss(VRegister vd, Register rs1, Register rs2, VSew vsew,
678 void vsx(VRegister vd, Register rs1, VRegister vs3, VSew vsew,
681 void vsu(VRegister vd, Register rs1, VRegister vs3, VSew vsew,
694 VRegister vd, Register rs1, uint8_t lumop, VSew vsew, MaskType mask = NoMask
700 VRegister vd, Register rs1, Register rs2, VSew vsew, MaskType mask = NoMask
706 VRegister vd, Registe
[all...]
/third_party/ffmpeg/libavcodec/
H A Dlibvorbisdec.c30 vorbis_dsp_state vd; /**< DSP state used for analysis */ member
123 vorbis_synthesis_init(&context->vd, &context->vi); in oggvorbis_decode_init()
124 vorbis_block_init(&context->vd, &context->vb); in oggvorbis_decode_init()
183 vorbis_synthesis_blockin(&context->vd, &context->vb) ; in oggvorbis_decode_frame()
188 while((samples = vorbis_synthesis_pcmout(&context->vd, &pcm)) > 0) { in oggvorbis_decode_frame()
192 vorbis_synthesis_read(&context->vd, samples) ; in oggvorbis_decode_frame()
205 vorbis_dsp_clear(&context->vd); in oggvorbis_decode_close()
H A Dlibvorbisenc.c49 vorbis_dsp_state vd; /**< DSP state used for analysis */ member
53 int dsp_initialized; /**< vd has been initialized */
195 vorbis_analysis_wrote(&s->vd, 0); in libvorbis_encode_close()
198 vorbis_dsp_clear(&s->vd); in libvorbis_encode_close()
222 if ((ret = vorbis_analysis_init(&s->vd, &s->vi))) { in libvorbis_encode_init()
228 if ((ret = vorbis_block_init(&s->vd, &s->vb))) { in libvorbis_encode_init()
238 if ((ret = vorbis_analysis_headerout(&s->vd, &s->vc, &header, &header_comm, in libvorbis_encode_init()
301 buffer = vorbis_analysis_buffer(&s->vd, samples); in libvorbis_encode_frame()
308 if ((ret = vorbis_analysis_wrote(&s->vd, samples)) < 0) { in libvorbis_encode_frame()
316 if ((ret = vorbis_analysis_wrote(&s->vd, in libvorbis_encode_frame()
[all...]
H A Dcook.c577 int vlc, vd, tmp, result; in unpack_SQVH() local
579 vd = vd_tab[category]; in unpack_SQVH()
587 for (j = vd - 1; j >= 0; j--) { in unpack_SQVH()
589 subband_coef_index[vd * i + j] = vlc - tmp * (kmax_tab[category] + 1); in unpack_SQVH()
592 for (j = 0; j < vd; j++) { in unpack_SQVH()
593 if (subband_coef_index[i * vd + j]) { in unpack_SQVH()
595 subband_coef_sign[i * vd + j] = get_bits1(&q->gb); in unpack_SQVH()
598 subband_coef_sign[i * vd + j] = 0; in unpack_SQVH()
601 subband_coef_sign[i * vd + j] = 0; in unpack_SQVH()
/third_party/lwip/src/netif/ppp/
H A Dmultilink.c436 TDB_DATA kd, vd; local
442 vd = tdb_fetch(pppdb, kd);
443 if (vd.dptr != NULL) {
444 ret = vd.dsize == key.dsize
445 && memcmp(vd.dptr, key.dptr, vd.dsize) == 0;
446 free(vd.dptr);
/third_party/skia/src/sksl/analysis/
H A DSkSLProgramUsage.cpp44 const VarDeclaration& vd = s.as<VarDeclaration>(); variable
45 ProgramUsage::VariableCounts& counts = fUsage->fVariableCounts[&vd.var()];
48 if (vd.value()) {
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/video/
H A DvktVideoTestUtils.hpp89 VideoDevice* vd{};
101 return vd->getDeviceDriver(); in getDeviceDriver()
105 return vd->getQueueFamilyIndexDecode(); in decodeQueueFamilyIdx()
109 return vd->getQueueFamilyIndexTransfer(); in transferQueueFamilyIdx()
113 return vd->getAllocator(); in allocator()
/third_party/node/deps/v8/src/execution/arm/
H A Dsimulator-arm.cc1547 int vd; in HandleVList() local
1549 vd = instr->VFPDRegValue(precision); in HandleVList()
1562 for (int reg = vd; reg < vd + num_regs; reg++) { in HandleVList()
3179 int vd = instr->VFPDRegValue(kDoublePrecision); in DecodeTypeVFP() local
3190 set_d_register(vd, data); in DecodeTypeVFP()
3201 set_d_register_from_double(vd, dd); in DecodeTypeVFP()
3216 set_d_register_from_double(vd, dd); in DecodeTypeVFP()
3232 int fixed_value = get_sinteger_from_s_register(vd * 2); in DecodeTypeVFP()
3234 set_d_register_from_double(vd, fixed_valu in DecodeTypeVFP()
3384 int vd = instr->VFPNRegValue(kDoublePrecision); DecodeTypeVFP() local
3424 int vd = instr->VFPNRegValue(kSimd128Precision); DecodeTypeVFP() local
3836 int vd = instr->VFPDRegValue(kSinglePrecision); DecodeType6CoprocessorIns() local
3893 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeType6CoprocessorIns() local
4089 int vd = instr->VFPDRegValue(kDoublePrecision); VmovImmediate() local
4536 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4545 int vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4555 int vd = instr->VFPDRegValue(q ? kSimd128Precision : kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4565 int vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4834 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4906 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4958 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
4961 int vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local
5948 int vd = instr->VFPDRegValue(kDoublePrecision); DecodeFloatingPointDataProcessing() local
[all...]
/third_party/optimized-routines/math/test/
H A Dmathbench.c226 v_double (*vd) (v_double); member
236 #define VD(func, lo, hi) {#func, 'd', 'v', lo, hi, {.vd = func}},
300 {"__v_pow", 'd', 'v', 0.01, 11.1, {.vd = xy__v_pow}},
556 TIMEIT (run_v_thruput, f->fun.vd); in bench1()
558 TIMEIT (run_v_latency, f->fun.vd); in bench1()
/third_party/vixl/test/aarch64/
H A Dtest-simulator-aarch64.cc207 typedef void (MacroAssembler::*Test1OpNEONHelper_t)(const VRegister& vd,
209 typedef void (MacroAssembler::*Test2OpNEONHelper_t)(const VRegister& vd,
212 typedef void (MacroAssembler::*TestByElementNEONHelper_t)(const VRegister& vd,
217 const VRegister& vd, int imm1, const VRegister& vn, int imm2);
224 typedef void (MacroAssembler::*mnemonic)(const VRegister& vd,
1486 VRegister vd = VRegister(0, vd_bits); in Test1OpNEON_Helper() local
1516 __ Movi(vd.V16B(), 0); in Test1OpNEON_Helper()
1522 __ Str(vd, MemOperand(out, vd.GetSizeInBytes(), PostIndex)); in Test1OpNEON_Helper()
1690 VRegister vd in Test1OpAcrossNEON_Helper() local
1932 VRegister vd = v0.V16B(); Test2OpNEON_Helper() local
2186 VRegister vd = v0.V16B(); TestByElementNEON_Helper() local
2442 VRegister vd = VRegister(0, vd_bits); Test2OpImmNEON_Helper() local
2659 VRegister vd = VRegister(0, vd_bits); TestOpImmOpImmNEON_Helper() local
[all...]

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