Lines Matching refs:vd
550 void Assembler::fadda(const VRegister& vd,
560 VIXL_ASSERT(vd.Is(vn));
561 VIXL_ASSERT(vd.IsScalar());
563 VIXL_ASSERT(AreSameLaneSize(zm, vd));
565 Emit(FADDA_v_p_z | SVESize(zm) | Rd(vd) | PgLow8(pg) | Rn(zm));
1326 void Assembler::faddv(const VRegister& vd,
1334 VIXL_ASSERT(vd.IsScalar());
1336 VIXL_ASSERT(AreSameLaneSize(zn, vd));
1338 Emit(FADDV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
1341 void Assembler::fmaxnmv(const VRegister& vd,
1349 VIXL_ASSERT(vd.IsScalar());
1351 VIXL_ASSERT(AreSameLaneSize(zn, vd));
1353 Emit(FMAXNMV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
1356 void Assembler::fmaxv(const VRegister& vd,
1364 VIXL_ASSERT(vd.IsScalar());
1366 VIXL_ASSERT(AreSameLaneSize(zn, vd));
1368 Emit(FMAXV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
1371 void Assembler::fminnmv(const VRegister& vd,
1379 VIXL_ASSERT(vd.IsScalar());
1381 VIXL_ASSERT(AreSameLaneSize(zn, vd));
1383 Emit(FMINNMV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
1386 void Assembler::fminv(const VRegister& vd,
1394 VIXL_ASSERT(vd.IsScalar());
1396 VIXL_ASSERT(AreSameLaneSize(zn, vd));
1398 Emit(FMINV_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3255 void Assembler::andv(const VRegister& vd,
3259 VIXL_ASSERT(vd.IsScalar());
3261 Emit(ANDV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3264 void Assembler::eorv(const VRegister& vd,
3268 VIXL_ASSERT(vd.IsScalar());
3270 Emit(EORV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3289 void Assembler::orv(const VRegister& vd,
3293 VIXL_ASSERT(vd.IsScalar());
3295 Emit(ORV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3307 void Assembler::smaxv(const VRegister& vd,
3311 VIXL_ASSERT(vd.IsScalar());
3313 Emit(SMAXV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3316 void Assembler::sminv(const VRegister& vd,
3320 VIXL_ASSERT(vd.IsScalar());
3322 Emit(SMINV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3333 void Assembler::umaxv(const VRegister& vd,
3337 VIXL_ASSERT(vd.IsScalar());
3339 Emit(UMAXV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
3342 void Assembler::uminv(const VRegister& vd,
3346 VIXL_ASSERT(vd.IsScalar());
3348 Emit(UMINV_r_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
5692 void Assembler::clasta(const VRegister& vd,
5702 VIXL_ASSERT(vd.Is(vn));
5703 VIXL_ASSERT(vd.IsScalar());
5704 VIXL_ASSERT(AreSameLaneSize(vd, zm));
5706 Emit(CLASTA_v_p_z | SVESize(zm) | Rd(vd) | PgLow8(pg) | Rn(zm));
5740 void Assembler::clastb(const VRegister& vd,
5750 VIXL_ASSERT(vd.Is(vn));
5751 VIXL_ASSERT(vd.IsScalar());
5752 VIXL_ASSERT(AreSameLaneSize(vd, zm));
5754 Emit(CLASTB_v_p_z | SVESize(zm) | Rd(vd) | PgLow8(pg) | Rn(zm));
5830 void Assembler::lasta(const VRegister& vd,
5838 VIXL_ASSERT(vd.IsScalar());
5840 Emit(LASTA_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));
5855 void Assembler::lastb(const VRegister& vd,
5863 VIXL_ASSERT(vd.IsScalar());
5865 Emit(LASTB_v_p_z | SVESize(zn) | Rd(vd) | PgLow8(pg) | Rn(zn));