Lines Matching refs:vd
1146 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd,
1150 ((vd.code() & 0x1F) << kRvvVdShift) |
1156 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd,
1160 ((vd.code() & 0x1F) << kRvvVdShift) |
1188 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd,
1192 ((vd.code() & 0x1F) << kRvvVdShift) |
1199 void Assembler::GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd,
1203 ((vd.code() & 0x1F) << kRvvVdShift) |
1219 void Assembler::GenInstrV(uint8_t funct6, VRegister vd, int8_t imm5,
1223 ((vd.code() & 0x1F) << kRvvVdShift) |
1230 void Assembler::GenInstrV(Opcode opcode, uint8_t width, VRegister vd,
1234 Instr instr = opcode | ((vd.code() << kRvvVdShift) & kRvvVdMask) |
1244 void Assembler::GenInstrV(Opcode opcode, uint8_t width, VRegister vd,
1248 Instr instr = opcode | ((vd.code() << kRvvVdShift) & kRvvVdMask) |
1259 void Assembler::GenInstrV(Opcode opcode, uint8_t width, VRegister vd,
1263 Instr instr = opcode | ((vd.code() << kRvvVdShift) & kRvvVdMask) |
2476 void Assembler::vredmaxu_vs(VRegister vd, VRegister vs2, VRegister vs1,
2478 GenInstrV(VREDMAXU_FUNCT6, OP_MVV, vd, vs1, vs2, mask);
2481 void Assembler::vredmax_vs(VRegister vd, VRegister vs2, VRegister vs1,
2483 GenInstrV(VREDMAX_FUNCT6, OP_MVV, vd, vs1, vs2, mask);
2486 void Assembler::vredmin_vs(VRegister vd, VRegister vs2, VRegister vs1,
2488 GenInstrV(VREDMIN_FUNCT6, OP_MVV, vd, vs1, vs2, mask);
2491 void Assembler::vredminu_vs(VRegister vd, VRegister vs2, VRegister vs1,
2493 GenInstrV(VREDMINU_FUNCT6, OP_MVV, vd, vs1, vs2, mask);
2496 void Assembler::vmv_vv(VRegister vd, VRegister vs1) {
2497 GenInstrV(VMV_FUNCT6, OP_IVV, vd, vs1, v0, NoMask);
2500 void Assembler::vmv_vx(VRegister vd, Register rs1) {
2501 GenInstrV(VMV_FUNCT6, OP_IVX, vd, rs1, v0, NoMask);
2504 void Assembler::vmv_vi(VRegister vd, uint8_t simm5) {
2505 GenInstrV(VMV_FUNCT6, vd, simm5, v0, NoMask);
2512 void Assembler::vmv_sx(VRegister vd, Register rs1) {
2513 GenInstrV(VRXUNARY0_FUNCT6, OP_MVX, vd, rs1, v0, NoMask);
2516 void Assembler::vmerge_vv(VRegister vd, VRegister vs1, VRegister vs2) {
2517 GenInstrV(VMV_FUNCT6, OP_IVV, vd, vs1, vs2, Mask);
2520 void Assembler::vmerge_vx(VRegister vd, Register rs1, VRegister vs2) {
2521 GenInstrV(VMV_FUNCT6, OP_IVX, vd, rs1, vs2, Mask);
2524 void Assembler::vmerge_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2525 GenInstrV(VMV_FUNCT6, vd, imm5, vs2, Mask);
2528 void Assembler::vadc_vv(VRegister vd, VRegister vs1, VRegister vs2) {
2529 GenInstrV(VADC_FUNCT6, OP_IVV, vd, vs1, vs2, Mask);
2532 void Assembler::vadc_vx(VRegister vd, Register rs1, VRegister vs2) {
2533 GenInstrV(VADC_FUNCT6, OP_IVX, vd, rs1, vs2, Mask);
2536 void Assembler::vadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2537 GenInstrV(VADC_FUNCT6, vd, imm5, vs2, Mask);
2540 void Assembler::vmadc_vv(VRegister vd, VRegister vs1, VRegister vs2) {
2541 GenInstrV(VMADC_FUNCT6, OP_IVV, vd, vs1, vs2, Mask);
2544 void Assembler::vmadc_vx(VRegister vd, Register rs1, VRegister vs2) {
2545 GenInstrV(VMADC_FUNCT6, OP_IVX, vd, rs1, vs2, Mask);
2548 void Assembler::vmadc_vi(VRegister vd, uint8_t imm5, VRegister vs2) {
2549 GenInstrV(VMADC_FUNCT6, vd, imm5, vs2, Mask);
2552 void Assembler::vrgather_vv(VRegister vd, VRegister vs2, VRegister vs1,
2554 DCHECK_NE(vd, vs1);
2555 DCHECK_NE(vd, vs2);
2556 GenInstrV(VRGATHER_FUNCT6, OP_IVV, vd, vs1, vs2, mask);
2559 void Assembler::vrgather_vi(VRegister vd, VRegister vs2, int8_t imm5,
2561 DCHECK_NE(vd, vs2);
2562 GenInstrV(VRGATHER_FUNCT6, vd, imm5, vs2, mask);
2565 void Assembler::vrgather_vx(VRegister vd, VRegister vs2, Register rs1,
2567 DCHECK_NE(vd, vs2);
2568 GenInstrV(VRGATHER_FUNCT6, OP_IVX, vd, rs1, vs2, mask);
2571 void Assembler::vwaddu_wx(VRegister vd, VRegister vs2, Register rs1,
2573 GenInstrV(VWADDUW_FUNCT6, OP_MVX, vd, rs1, vs2, mask);
2576 void Assembler::vid_v(VRegister vd, MaskType mask) {
2577 GenInstrV(VMUNARY0_FUNCT6, OP_MVV, vd, VID_V, v0, mask);
2581 void Assembler::name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
2583 GenInstrV(funct6, OP_IVV, vd, vs1, vs2, mask); \
2587 void Assembler::name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
2589 GenInstrV(funct6, OP_FVV, vd, vs1, vs2, mask); \
2593 void Assembler::name##_wv(VRegister vd, VRegister vs2, VRegister vs1, \
2595 GenInstrV(funct6, OP_FVV, vd, vs1, vs2, mask); \
2599 void Assembler::name##_vs(VRegister vd, VRegister vs2, VRegister vs1, \
2601 GenInstrV(funct6, OP_FVV, vd, vs1, vs2, mask); \
2605 void Assembler::name##_vx(VRegister vd, VRegister vs2, Register rs1, \
2607 GenInstrV(funct6, OP_IVX, vd, rs1, vs2, mask); \
2611 void Assembler::name##_vi(VRegister vd, VRegister vs2, int8_t imm5, \
2613 GenInstrV(funct6, vd, imm5, vs2, mask); \
2617 void Assembler::name##_vv(VRegister vd, VRegister vs2, VRegister vs1, \
2619 GenInstrV(funct6, OP_MVV, vd, vs1, vs2, mask); \
2622 // void GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, Register rs1,
2625 void Assembler::name##_vx(VRegister vd, VRegister vs2, Register rs1, \
2627 GenInstrV(funct6, OP_MVX, vd, rs1, vs2, mask); \
2631 void Assembler::name##_vf(VRegister vd, VRegister vs2, FPURegister fs1, \
2633 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2637 void Assembler::name##_wf(VRegister vd, VRegister vs2, FPURegister fs1, \
2639 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2643 void Assembler::name##_vv(VRegister vd, VRegister vs1, VRegister vs2, \
2645 GenInstrV(funct6, OP_FVV, vd, vs1, vs2, mask); \
2649 void Assembler::name##_vf(VRegister vd, FPURegister fs1, VRegister vs2, \
2651 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2656 void Assembler::name(VRegister vd, VRegister vs2, MaskType mask) { \
2657 GenInstrV(VXUNARY0_FUNCT6, OP_MVV, vd, vs1, vs2, mask); \
2660 void Assembler::vfmv_vf(VRegister vd, FPURegister fs1, MaskType mask) {
2661 GenInstrV(VMV_FUNCT6, OP_FVF, vd, fs1, v0, mask);
2668 void Assembler::vfmv_sf(VRegister vd, FPURegister fs) {
2669 GenInstrV(VRFUNARY0_FUNCT6, OP_FVF, vd, fs, v0, NoMask);
2914 void Assembler::vl(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2917 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b000);
2919 void Assembler::vls(VRegister vd, Register rs1, Register rs2, VSew vsew,
2922 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b000);
2924 void Assembler::vlx(VRegister vd, Register rs1, VRegister vs2, VSew vsew,
2927 GenInstrV(LOAD_FP, width, vd, rs1, vs2, mask, 0b11, 0, 0);
2930 void Assembler::vs(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
2933 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b000);
2941 void Assembler::vsx(VRegister vd, Register rs1, VRegister vs2, VSew vsew,
2944 GenInstrV(STORE_FP, width, vd, rs1, vs2, mask, 0b11, 0, 0b000);
2946 void Assembler::vsu(VRegister vd, Register rs1, VRegister vs2, VSew vsew,
2949 GenInstrV(STORE_FP, width, vd, rs1, vs2, mask, 0b01, 0, 0b000);
2952 void Assembler::vlseg2(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2955 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b001);
2958 void Assembler::vlseg3(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2961 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b010);
2964 void Assembler::vlseg4(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2967 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b011);
2970 void Assembler::vlseg5(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2973 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b100);
2976 void Assembler::vlseg6(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2979 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b101);
2982 void Assembler::vlseg7(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2985 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b110);
2988 void Assembler::vlseg8(VRegister vd, Register rs1, uint8_t lumop, VSew vsew,
2991 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b111);
2993 void Assembler::vsseg2(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
2996 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b001);
2998 void Assembler::vsseg3(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3001 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b010);
3003 void Assembler::vsseg4(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3006 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b011);
3008 void Assembler::vsseg5(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3011 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b100);
3013 void Assembler::vsseg6(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3016 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b101);
3018 void Assembler::vsseg7(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3021 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b110);
3023 void Assembler::vsseg8(VRegister vd, Register rs1, uint8_t sumop, VSew vsew,
3026 GenInstrV(STORE_FP, width, vd, rs1, sumop, mask, 0b00, 0, 0b111);
3029 void Assembler::vlsseg2(VRegister vd, Register rs1, Register rs2, VSew vsew,
3032 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b001);
3034 void Assembler::vlsseg3(VRegister vd, Register rs1, Register rs2, VSew vsew,
3037 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b010);
3039 void Assembler::vlsseg4(VRegister vd, Register rs1, Register rs2, VSew vsew,
3042 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b011);
3044 void Assembler::vlsseg5(VRegister vd, Register rs1, Register rs2, VSew vsew,
3047 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b100);
3049 void Assembler::vlsseg6(VRegister vd, Register rs1, Register rs2, VSew vsew,
3052 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b101);
3054 void Assembler::vlsseg7(VRegister vd, Register rs1, Register rs2, VSew vsew,
3057 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b110);
3059 void Assembler::vlsseg8(VRegister vd, Register rs1, Register rs2, VSew vsew,
3062 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b111);
3064 void Assembler::vssseg2(VRegister vd, Register rs1, Register rs2, VSew vsew,
3067 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b001);
3069 void Assembler::vssseg3(VRegister vd, Register rs1, Register rs2, VSew vsew,
3072 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b010);
3074 void Assembler::vssseg4(VRegister vd, Register rs1, Register rs2, VSew vsew,
3077 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b011);
3079 void Assembler::vssseg5(VRegister vd, Register rs1, Register rs2, VSew vsew,
3082 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b100);
3084 void Assembler::vssseg6(VRegister vd, Register rs1, Register rs2, VSew vsew,
3087 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b101);
3089 void Assembler::vssseg7(VRegister vd, Register rs1, Register rs2, VSew vsew,
3092 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b110);
3094 void Assembler::vssseg8(VRegister vd, Register rs1, Register rs2, VSew vsew,
3097 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b10, 0, 0b111);
3100 void Assembler::vlxseg2(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3103 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b001);
3105 void Assembler::vlxseg3(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3108 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b010);
3110 void Assembler::vlxseg4(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3113 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b011);
3115 void Assembler::vlxseg5(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3118 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b100);
3120 void Assembler::vlxseg6(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3123 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b101);
3125 void Assembler::vlxseg7(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3128 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b110);
3130 void Assembler::vlxseg8(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3133 GenInstrV(LOAD_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b111);
3135 void Assembler::vsxseg2(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3138 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b001);
3140 void Assembler::vsxseg3(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3143 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b010);
3145 void Assembler::vsxseg4(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3148 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b011);
3150 void Assembler::vsxseg5(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3153 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b100);
3155 void Assembler::vsxseg6(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3158 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b101);
3160 void Assembler::vsxseg7(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3163 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b110);
3165 void Assembler::vsxseg8(VRegister vd, Register rs1, VRegister rs2, VSew vsew,
3168 GenInstrV(STORE_FP, width, vd, rs1, rs2, mask, 0b11, 0, 0b111);