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Help
Searched
refs:SLEEPCNT
(Results
1 - 10
of
10
) sorted by relevance
/third_party/cmsis/CMSIS/Core/Include/
H
A
D
core_cm4.h
907
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
992
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
993
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_sc300.h
825
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
910
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
911
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm3.h
842
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
927
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
928
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm23.h
617
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
H
A
D
core_cm35p.h
1139
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1231
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1232
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm33.h
1139
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1231
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1232
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm7.h
1126
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1211
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1212
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_starmc1.h
1188
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1328
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1329
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm85.h
1243
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1351
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1352
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
H
A
D
core_cm55.h
1243
__IOM uint32_t
SLEEPCNT
; /*!< Offset: 0x010 (R/W) Sleep Count Register */
member
1351
#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT
SLEEPCNT
:
SLEEPCNT
Position */
1352
#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT
SLEEPCNT
:
SLEEPCNT
Mask */
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