Searched refs:MPU (Results 1 - 14 of 14) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/m-profile/
H A D	armv7m_mpu.h	20 * CMSIS-Core(M) MPU API for Armv7-M MPU 32 #define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes 33 #define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes 34 #define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes 35 #define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes 36 #define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes 37 #define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte 38 #define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes 39 #define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Regio [all...]
H A D	armv8m_mpu.h	20 * CMSIS-Core(M) MPU API for Armv8-M and Armv8.1-M MPU 180 * Struct for a single MPU Region 188 \brief Read MPU Type Register 189 \return Number of MPU regions 193 return ((MPU->TYPE) >> 8); in ARM_MPU_TYPE() 196 /** Enable the MPU. 202 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in ARM_MPU_Enable() 210 /** Disable the MPU. 218 MPU in ARM_MPU_Disable() [all...]
/third_party/cmsis/CMSIS/Core/Include/
H A D	core_sc000.h	194 - Core MPU Register 533 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 534 \brief Type definitions for the Memory Protection Unit (MPU) 539 \brief Structure type to access the Memory Protection Unit (MPU). 543 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 544 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 545 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 546 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 547 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 552 /** \brief MPU Typ 677 #define MPU global() macro [all...]
H A D	core_cm0plus.h	194 - Core MPU Register 517 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 518 \brief Type definitions for the Memory Protection Unit (MPU) 523 \brief Structure type to access the Memory Protection Unit (MPU). 527 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 528 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 529 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 530 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 531 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 536 /** \brief MPU Typ 660 #define MPU global() macro [all...]
H A D	core_cm4.h	254 - Core MPU Register 1202 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1203 \brief Type definitions for the Memory Protection Unit (MPU) 1208 \brief Structure type to access the Memory Protection Unit (MPU). 1212 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1213 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1214 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1215 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1216 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 1217 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia 1570 #define MPU global() macro [all...]
H A D	core_sc300.h	195 - Core MPU Register 1120 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1121 \brief Type definitions for the Memory Protection Unit (MPU) 1126 \brief Structure type to access the Memory Protection Unit (MPU). 1130 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1131 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1132 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1133 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1134 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 1135 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia 1377 #define MPU global() macro [all...]
H A D	core_cm3.h	195 - Core MPU Register 1137 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1138 \brief Type definitions for the Memory Protection Unit (MPU) 1143 \brief Structure type to access the Memory Protection Unit (MPU). 1147 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1148 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1149 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1150 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1151 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 1152 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia 1394 #define MPU global() macro [all...]
H A D	core_cm23.h	216 - Core MPU Register 847 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 848 \brief Type definitions for the Memory Protection Unit (MPU) 853 \brief Structure type to access the Memory Protection Unit (MPU). 857 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 858 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 859 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 860 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 861 __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ 866 __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memor 1247 #define MPU global() macro [all...]
H A D	core_cm35p.h	319 - Core MPU Register 1441 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1442 \brief Type definitions for the Memory Protection Unit (MPU) 1447 \brief Structure type to access the Memory Protection Unit (MPU). 1451 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1452 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1453 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1454 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1455 __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ 1456 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Regio 2060 #define MPU global() macro [all...]
H A D	core_cm33.h	319 - Core MPU Register 1441 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1442 \brief Type definitions for the Memory Protection Unit (MPU) 1447 \brief Structure type to access the Memory Protection Unit (MPU). 1451 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1452 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1453 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1454 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1455 __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ 1456 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Regio 2060 #define MPU global() macro [all...]
H A D	core_cm7.h	269 - Core MPU Register 1421 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1422 \brief Type definitions for the Memory Protection Unit (MPU) 1427 \brief Structure type to access the Memory Protection Unit (MPU). 1431 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1432 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1433 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1434 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1435 __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ 1436 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alia 1789 #define MPU global() macro [all...]
H A D	core_starmc1.h	330 - Core MPU Register 1538 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 1539 \brief Type definitions for the Memory Protection Unit (MPU) 1544 \brief Structure type to access the Memory Protection Unit (MPU). 1548 __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ 1549 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ 1550 __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ 1551 __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ 1552 __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ 1553 __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Regio 2157 #define MPU global() macro [all...]
H A D	core_cm85.h	329 - Core MPU Register 1836 __IOM uint32_t STLIDMPUSR; /*!< Offset: 0x010 ( /W) MPU Sample Register */ 1837 __IM uint32_t STLIMPUOR; /*!< Offset: 0x014 (R/ ) MPU Region Hit Register */ 1838 __IM uint32_t STLD0MPUOR; /*!< Offset: 0x018 (R/ ) MPU Memory Attributes Register 0 */ 1839 __IM uint32_t STLD1MPUOR; /*!< Offset: 0x01C (R/ ) MPU Memory Attributes Register 1 */ 1840 __IM uint32_t STLD2MPUOR; /*!< Offset: 0x020 (R/ ) MPU Memory Attributes Register 2 */ 1841 __IM uint32_t STLD3MPUOR; /*!< Offset: 0x024 (R/ ) MPU Memory Attributes Register 3 */ 1872 /** \brief STL MPU Sample Register Definitions */ 1882 /** \brief STL MPU Region Hit Register Definitions */ 1889 /** \brief STL MPU Memor 3588 #define MPU global() macro [all...]
H A D	core_cm55.h	329 - Core MPU Register 1842 __IOM uint32_t STLIDMPUSR; /*!< Offset: 0x010 ( /W) MPU Sample Register */ 1843 __IM uint32_t STLIMPUOR; /*!< Offset: 0x014 (R/ ) MPU Region Hit Register */ 1844 __IM uint32_t STLD0MPUOR; /*!< Offset: 0x018 (R/ ) MPU Memory Attributes Register 0 */ 1845 __IM uint32_t STLD1MPUOR; /*!< Offset: 0x01C (R/ ) MPU Memory Attributes Register 1 */ 1875 /** \brief STL MPU Sample Register Definitions */ 1885 /** \brief STL MPU Region Hit Register Definitions */ 1892 /** \brief STL MPU Memory Attributes Register 0 Definitions */ 1899 /** \brief STL MPU Memory Attributes Register 1 Definitions */ 2893 \defgroup CMSIS_MPU Memory Protection Unit (MPU) 3564 #define MPU global() macro [all...]

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Indexes created Thu Nov 07 10:32:03 CST 2024