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Searched refs:writel_relaxed (Results 1 - 25 of 1350) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
H A Dmeson_venc.c1046 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); in meson_venc_hdmi_mode_set()
1047 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); in meson_venc_hdmi_mode_set()
1054 writel_relaxed(ENCI_CFILT_CMPT_SEL_HIGH | 0x10, in meson_venc_hdmi_mode_set()
1056 writel_relaxed(ENCI_CFILT_CMPT_CR_DLY(2) | in meson_venc_hdmi_mode_set()
1061 writel_relaxed(0, priv->io_base + _REG(VENC_DVI_SETTING)); in meson_venc_hdmi_mode_set()
1064 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE)); in meson_venc_hdmi_mode_set()
1065 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE_ADV)); in meson_venc_hdmi_mode_set()
1068 writel_relaxed(vmode->enci.hso_begin, in meson_venc_hdmi_mode_set()
1070 writel_relaxed(vmode->enci.hso_end, in meson_venc_hdmi_mode_set()
1074 writel_relaxed(vmod in meson_venc_hdmi_mode_set()
[all...]
H A Dmeson_crtc.c107 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable()
110 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable()
113 writel_relaxed(crtc_state->mode.hdisplay << 16 | in meson_g12a_crtc_atomic_enable()
251 writel_relaxed(priv->viu.osd1_blk2_cfg4, in meson_crtc_g12a_enable_osd1_afbc()
257 writel_relaxed(priv->viu.osd1_blk1_cfg4, in meson_crtc_g12a_enable_osd1_afbc()
271 writel_relaxed(priv->viu.osd_blend_din0_scope_h, in meson_g12a_crtc_enable_osd1()
274 writel_relaxed(priv->viu.osd_blend_din0_scope_v, in meson_g12a_crtc_enable_osd1()
277 writel_relaxed(priv->viu.osb_blend0_size, in meson_g12a_crtc_enable_osd1()
280 writel_relaxed(priv->viu.osb_blend1_size, in meson_g12a_crtc_enable_osd1()
302 writel_relaxed(VD_BLEND_PREBLD_SRC_VD in meson_g12a_crtc_enable_vd1()
[all...]
H A Dmeson_vpp.c59 writel_relaxed(is_horizontal ? VPP_SCALE_HORIZONTAL_COEF : 0, in meson_vpp_write_scaling_filter_coefs()
62 writel_relaxed(coefs[i], in meson_vpp_write_scaling_filter_coefs()
84 writel_relaxed(is_horizontal ? VPP_SCALE_HORIZONTAL_COEF : 0, in meson_vpp_write_vd_scaling_filter_coefs()
87 writel_relaxed(coefs[i], in meson_vpp_write_vd_scaling_filter_coefs()
95 writel_relaxed(0x108080, priv->io_base + _REG(VPP_DUMMY_DATA1)); in meson_vpp_init()
99 writel_relaxed(VPP_PPS_DUMMY_DATA_MODE, in meson_vpp_init()
101 writel_relaxed(0x1020080, in meson_vpp_init()
103 writel_relaxed(0x42020, in meson_vpp_init()
106 writel_relaxed(0xf, priv->io_base + _REG(DOLBY_PATH_CTRL)); in meson_vpp_init()
110 writel_relaxed(VPP_OFIFO_SIZE_DEFAUL in meson_vpp_init()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
H A Dmeson_crtc.c107 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable()
110 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable()
113 writel_relaxed(crtc_state->mode.hdisplay << 16 | in meson_g12a_crtc_atomic_enable()
251 writel_relaxed(priv->viu.osd1_blk2_cfg4, in meson_crtc_g12a_enable_osd1_afbc()
257 writel_relaxed(priv->viu.osd1_blk1_cfg4, in meson_crtc_g12a_enable_osd1_afbc()
271 writel_relaxed(priv->viu.osd_blend_din0_scope_h, in meson_g12a_crtc_enable_osd1()
274 writel_relaxed(priv->viu.osd_blend_din0_scope_v, in meson_g12a_crtc_enable_osd1()
277 writel_relaxed(priv->viu.osb_blend0_size, in meson_g12a_crtc_enable_osd1()
280 writel_relaxed(priv->viu.osb_blend1_size, in meson_g12a_crtc_enable_osd1()
302 writel_relaxed(VD_BLEND_PREBLD_SRC_VD in meson_g12a_crtc_enable_vd1()
[all...]
H A Dmeson_venc.c1048 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); in meson_venc_hdmi_mode_set()
1049 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); in meson_venc_hdmi_mode_set()
1056 writel_relaxed(ENCI_CFILT_CMPT_SEL_HIGH | 0x10, in meson_venc_hdmi_mode_set()
1058 writel_relaxed(ENCI_CFILT_CMPT_CR_DLY(2) | in meson_venc_hdmi_mode_set()
1063 writel_relaxed(0, priv->io_base + _REG(VENC_DVI_SETTING)); in meson_venc_hdmi_mode_set()
1066 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE)); in meson_venc_hdmi_mode_set()
1067 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE_ADV)); in meson_venc_hdmi_mode_set()
1070 writel_relaxed(vmode->enci.hso_begin, in meson_venc_hdmi_mode_set()
1072 writel_relaxed(vmode->enci.hso_end, in meson_venc_hdmi_mode_set()
1076 writel_relaxed(vmod in meson_venc_hdmi_mode_set()
[all...]
H A Dmeson_vpp.c59 writel_relaxed(is_horizontal ? VPP_SCALE_HORIZONTAL_COEF : 0, in meson_vpp_write_scaling_filter_coefs()
62 writel_relaxed(coefs[i], in meson_vpp_write_scaling_filter_coefs()
84 writel_relaxed(is_horizontal ? VPP_SCALE_HORIZONTAL_COEF : 0, in meson_vpp_write_vd_scaling_filter_coefs()
87 writel_relaxed(coefs[i], in meson_vpp_write_vd_scaling_filter_coefs()
95 writel_relaxed(0x108080, priv->io_base + _REG(VPP_DUMMY_DATA1)); in meson_vpp_init()
99 writel_relaxed(VPP_PPS_DUMMY_DATA_MODE, in meson_vpp_init()
101 writel_relaxed(0x1020080, in meson_vpp_init()
103 writel_relaxed(0x42020, in meson_vpp_init()
106 writel_relaxed(0xf, priv->io_base + _REG(DOLBY_PATH_CTRL)); in meson_vpp_init()
110 writel_relaxed(VPP_OFIFO_SIZE_DEFAUL in meson_vpp_init()
[all...]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
H A Dphy-qcom-apq8064-sata.c91 writel_relaxed(0x01, base + SATA_PHY_SER_CTRL); in qcom_apq8064_sata_phy_init()
92 writel_relaxed(0xB1, base + SATA_PHY_POW_DWN_CTRL0); in qcom_apq8064_sata_phy_init()
97 writel_relaxed(0x01, base + SATA_PHY_POW_DWN_CTRL0); in qcom_apq8064_sata_phy_init()
98 writel_relaxed(0x3E, base + SATA_PHY_POW_DWN_CTRL1); in qcom_apq8064_sata_phy_init()
99 writel_relaxed(0x01, base + SATA_PHY_RX_IMCAL0); in qcom_apq8064_sata_phy_init()
100 writel_relaxed(0x01, base + SATA_PHY_TX_IMCAL0); in qcom_apq8064_sata_phy_init()
101 writel_relaxed(0x02, base + SATA_PHY_TX_IMCAL2); in qcom_apq8064_sata_phy_init()
104 writel_relaxed(0x04, base + UNIPHY_PLL_REFCLK_CFG); in qcom_apq8064_sata_phy_init()
105 writel_relaxed(0x00, base + UNIPHY_PLL_PWRGEN_CFG); in qcom_apq8064_sata_phy_init()
107 writel_relaxed( in qcom_apq8064_sata_phy_init()
[all...]
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
H A Dphy-qcom-apq8064-sata.c91 writel_relaxed(0x01, base + SATA_PHY_SER_CTRL); in qcom_apq8064_sata_phy_init()
92 writel_relaxed(0xB1, base + SATA_PHY_POW_DWN_CTRL0); in qcom_apq8064_sata_phy_init()
97 writel_relaxed(0x01, base + SATA_PHY_POW_DWN_CTRL0); in qcom_apq8064_sata_phy_init()
98 writel_relaxed(0x3E, base + SATA_PHY_POW_DWN_CTRL1); in qcom_apq8064_sata_phy_init()
99 writel_relaxed(0x01, base + SATA_PHY_RX_IMCAL0); in qcom_apq8064_sata_phy_init()
100 writel_relaxed(0x01, base + SATA_PHY_TX_IMCAL0); in qcom_apq8064_sata_phy_init()
101 writel_relaxed(0x02, base + SATA_PHY_TX_IMCAL2); in qcom_apq8064_sata_phy_init()
104 writel_relaxed(0x04, base + UNIPHY_PLL_REFCLK_CFG); in qcom_apq8064_sata_phy_init()
105 writel_relaxed(0x00, base + UNIPHY_PLL_PWRGEN_CFG); in qcom_apq8064_sata_phy_init()
107 writel_relaxed( in qcom_apq8064_sata_phy_init()
[all...]
/kernel/linux/linux-5.10/drivers/media/platform/qcom/camss/
H A Dcamss-csiphy-3ph-1-0.c74 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
76 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
89 writel_relaxed(val, csiphy->base + in csiphy_isr()
93 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(10)); in csiphy_isr()
94 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(10)); in csiphy_isr()
97 writel_relaxed(0x0, csiphy->base + in csiphy_isr()
152 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5)); in csiphy_lanes_enable()
155 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(6)); in csiphy_lanes_enable()
165 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_lanes_enable()
168 writel_relaxed(va in csiphy_lanes_enable()
[all...]
H A Dcamss-vfe-4-7.c263 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
270 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
286 writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0); in vfe_global_reset()
288 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
293 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request()
299 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
397 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
406 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
409 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
411 writel_relaxed( in vfe_wm_line_based()
[all...]
H A Dcamss-csiphy-2ph-1-0.c44 writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset()
46 writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset()
96 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable()
98 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable()
103 writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_PWR_CFG); in csiphy_lanes_enable()
106 writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_lanes_enable()
114 writel_relaxed(0x10, csiphy->base + in csiphy_lanes_enable()
116 writel_relaxed(settle_cnt, csiphy->base + in csiphy_lanes_enable()
118 writel_relaxed(0x3f, csiphy->base + in csiphy_lanes_enable()
120 writel_relaxed( in csiphy_lanes_enable()
[all...]
/kernel/linux/linux-5.10/drivers/clocksource/
H A Dtimer-gx6605s.c30 writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS); in gx6605s_timer_interrupt()
31 writel_relaxed(0, base + TIMER_INI); in gx6605s_timer_interrupt()
43 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_oneshot()
46 writel_relaxed(GX6605S_CONFIG_EN | GX6605S_CONFIG_IRQ_EN, in gx6605s_timer_set_oneshot()
58 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_next_event()
61 writel_relaxed(ULONG_MAX - delta, base + TIMER_INI); in gx6605s_timer_set_next_event()
62 writel_relaxed(GX6605S_CONTRL_START, base + TIMER_CONTRL); in gx6605s_timer_set_next_event()
71 writel_relaxed(0, base + TIMER_CONTRL); in gx6605s_timer_shutdown()
72 writel_relaxed(0, base + TIMER_CONFIG); in gx6605s_timer_shutdown()
105 writel_relaxed( in gx6605s_clkevt_init()
[all...]
H A Dtimer-lpc32xx.c79 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
80 writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_next_event()
81 writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
92 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_shutdown()
106 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_oneshot()
109 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R | in lpc32xx_clkevt_oneshot()
120 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R, in lpc32xx_clkevt_periodic()
127 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_periodic()
128 writel_relaxed(ddata->ticks_per_jiffy, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_periodic()
129 writel_relaxed(LPC32XX_TIMER_TCR_CE in lpc32xx_clkevt_periodic()
[all...]
H A Dtimer-atlas7.c58 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) & ~0x7, in sirfsoc_timer_count_disable()
65 writel_relaxed(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) | 0x3, in sirfsoc_timer_count_enable()
76 writel_relaxed(BIT(cpu), sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS); in sirfsoc_timer_interrupt()
91 writel_relaxed((readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_CTRL) | in sirfsoc_timer_read()
108 writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_0 + in sirfsoc_timer_set_next_event()
110 writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 + in sirfsoc_timer_set_next_event()
139 writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]); in sirfsoc_clocksource_resume()
141 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], in sirfsoc_clocksource_resume()
143 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], in sirfsoc_clocksource_resume()
146 writel_relaxed(readl_relaxe in sirfsoc_clocksource_resume()
[all...]
/kernel/linux/linux-6.6/drivers/clocksource/
H A Dtimer-gx6605s.c30 writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS); in gx6605s_timer_interrupt()
31 writel_relaxed(0, base + TIMER_INI); in gx6605s_timer_interrupt()
43 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_oneshot()
46 writel_relaxed(GX6605S_CONFIG_EN | GX6605S_CONFIG_IRQ_EN, in gx6605s_timer_set_oneshot()
58 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_next_event()
61 writel_relaxed(ULONG_MAX - delta, base + TIMER_INI); in gx6605s_timer_set_next_event()
62 writel_relaxed(GX6605S_CONTRL_START, base + TIMER_CONTRL); in gx6605s_timer_set_next_event()
71 writel_relaxed(0, base + TIMER_CONTRL); in gx6605s_timer_shutdown()
72 writel_relaxed(0, base + TIMER_CONFIG); in gx6605s_timer_shutdown()
105 writel_relaxed( in gx6605s_clkevt_init()
[all...]
H A Dtimer-lpc32xx.c75 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
76 writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_next_event()
77 writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
88 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_shutdown()
102 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_oneshot()
105 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R | in lpc32xx_clkevt_oneshot()
116 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R, in lpc32xx_clkevt_periodic()
123 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_periodic()
124 writel_relaxed(ddata->ticks_per_jiffy, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_periodic()
125 writel_relaxed(LPC32XX_TIMER_TCR_CE in lpc32xx_clkevt_periodic()
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/qcom/camss/
H A Dcamss-vfe-4-8.c263 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
270 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
286 writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0); in vfe_global_reset()
290 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
295 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request()
301 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
385 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
394 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
397 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
399 writel_relaxed( in vfe_wm_line_based()
[all...]
H A Dcamss-vfe-4-7.c280 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
287 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
303 writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0); in vfe_global_reset()
307 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
312 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request()
318 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
412 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
421 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
424 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
426 writel_relaxed( in vfe_wm_line_based()
[all...]
H A Dcamss-csiphy-2ph-1-0.c58 writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset()
60 writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset()
108 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable()
110 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable()
115 writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_PWR_CFG); in csiphy_lanes_enable()
118 writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_lanes_enable()
126 writel_relaxed(0x10, csiphy->base + in csiphy_lanes_enable()
128 writel_relaxed(settle_cnt, csiphy->base + in csiphy_lanes_enable()
130 writel_relaxed(0x3f, csiphy->base + in csiphy_lanes_enable()
132 writel_relaxed( in csiphy_lanes_enable()
[all...]
H A Dcamss-csid-gen2.c374 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG0); in __csid_configure_stream()
378 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG1); in __csid_configure_stream()
380 writel_relaxed(0x12345678, csid->base + CSID_TPG_LFSR_SEED); in __csid_configure_stream()
384 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_0(0)); in __csid_configure_stream()
387 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_1(0)); in __csid_configure_stream()
392 writel_relaxed(val, csid->base + CSID_TPG_DT_n_CFG_2(0)); in __csid_configure_stream()
394 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BARS_CFG); in __csid_configure_stream()
396 writel_relaxed(0, csid->base + CSID_TPG_COLOR_BOX_CFG); in __csid_configure_stream()
407 writel_relaxed(val, csid->base + CSID_RDI_CFG0(vc)); in __csid_configure_stream()
411 writel_relaxed(va in __csid_configure_stream()
[all...]
/kernel/linux/linux-5.10/drivers/crypto/ux500/cryp/
H A Dcryp.c147 writel_relaxed(cr_for_kse, &device_data->base->cr); in cryp_set_configuration()
218 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values()
220 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values()
224 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values()
226 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values()
230 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values()
232 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values()
236 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values()
238 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values()
265 writel_relaxed(init_vector_valu in cryp_configure_init_vector()
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-qcom/
H A Dplatsmp.c69 writel_relaxed(0, base + VDD_SC1_ARRAY_CLAMP_GFS_CTL); in scss_release_secondary()
70 writel_relaxed(0, base + SCSS_CPU1CORE_RESET); in scss_release_secondary()
71 writel_relaxed(3, base + SCSS_DBG_STATUS_CORE_PWRDUP); in scss_release_secondary()
114 writel_relaxed(0xA4, saw_reg + APCS_SAW2_VCTL); in kpssv1_release_secondary()
120 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary()
122 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary()
127 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary()
132 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary()
137 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary()
142 writel_relaxed(va in kpssv1_release_secondary()
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-hisi/
H A Dhotplug.c83 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620()
88 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN); in set_cpu_hi3620()
93 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
96 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620()
100 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620()
107 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
112 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
117 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
120 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREDIS); in set_cpu_hi3620()
124 writel_relaxed(CPU2_ISO_CTR in set_cpu_hi3620()
[all...]
/kernel/linux/linux-6.6/arch/arm/mach-hisi/
H A Dhotplug.c82 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620()
87 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN); in set_cpu_hi3620()
92 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
95 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620()
99 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620()
106 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
111 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
116 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
119 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREDIS); in set_cpu_hi3620()
123 writel_relaxed(CPU2_ISO_CTR in set_cpu_hi3620()
[all...]
/kernel/linux/linux-5.10/drivers/perf/
H A Dqcom_l3_pmu.c203 writel_relaxed(gang, l3pmu->regs + L3_M_BC_GANG); in qcom_l3_cache__64bit_counter_start()
207 writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx + 1)); in qcom_l3_cache__64bit_counter_start()
208 writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx)); in qcom_l3_cache__64bit_counter_start()
214 writel_relaxed(EVSEL(0), l3pmu->regs + L3_HML3_PM_EVTYPE(idx + 1)); in qcom_l3_cache__64bit_counter_start()
215 writel_relaxed(EVSEL(evsel), l3pmu->regs + L3_HML3_PM_EVTYPE(idx)); in qcom_l3_cache__64bit_counter_start()
218 writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(idx + 1)); in qcom_l3_cache__64bit_counter_start()
219 writel_relaxed(PMCNTENSET(idx + 1), l3pmu->regs + L3_M_BC_CNTENSET); in qcom_l3_cache__64bit_counter_start()
220 writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(idx)); in qcom_l3_cache__64bit_counter_start()
221 writel_relaxed(PMCNTENSET(idx), l3pmu->regs + L3_M_BC_CNTENSET); in qcom_l3_cache__64bit_counter_start()
232 writel_relaxed(PMCNTENCL in qcom_l3_cache__64bit_counter_stop()
[all...]

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