/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_pll.c | 77 * @fb_div: resulting feedback divider 85 unsigned *fb_div, unsigned *ref_div) in amdgpu_pll_get_fb_ref_div() 92 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div() 95 if (*fb_div > fb_div_max) { in amdgpu_pll_get_fb_ref_div() 96 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div() 97 *fb_div = fb_div_max; in amdgpu_pll_get_fb_ref_div() 125 unsigned fb_div_min, fb_div_max, fb_div; in amdgpu_pll_compute() local 202 ref_div_max, &fb_div, &ref_div); in amdgpu_pll_compute() 203 diff = abs(target_clock - (pll->reference_freq * fb_div) / in amdgpu_pll_compute() 217 &fb_div, in amdgpu_pll_compute() 83 amdgpu_pll_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) amdgpu_pll_get_fb_ref_div() argument [all...] |
H A D | atombios_crtc.c | 583 u32 fb_div, in amdgpu_atombios_crtc_program_pll() 610 args.v1.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 620 args.v2.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 630 args.v3.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 647 args.v5.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 677 args.v6.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 826 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in amdgpu_atombios_crtc_set_pll() local 855 &fb_div, &frac_fb_div, &ref_div, &post_div); in amdgpu_atombios_crtc_set_pll() 862 ref_div, fb_div, frac_fb_div, post_div, in amdgpu_atombios_crtc_set_pll() 868 u32 amount = (((fb_div * 1 in amdgpu_atombios_crtc_set_pll() 576 amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct amdgpu_atom_ss *ss) amdgpu_atombios_crtc_program_pll() argument [all...] |
H A D | amdgpu_atombios.h | 41 u32 fb_div; member 66 u32 fb_div; member
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H A D | atombios_crtc.h | 49 u32 fb_div,
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H A D | si.c | 1615 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in si_calc_upll_dividers() local 1618 do_div(fb_div, ref_freq); in si_calc_upll_dividers() 1621 if (fb_div > fb_mask) in si_calc_upll_dividers() 1624 fb_div &= fb_mask; in si_calc_upll_dividers() 1643 *optimal_fb_div = fb_div; in si_calc_upll_dividers() 1661 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in si_set_uvd_clocks() local 1679 &fb_div, &vclk_div, &dclk_div); in si_set_uvd_clocks() 1708 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks() 1713 if (fb_div < 307200) in si_set_uvd_clocks() 1784 unsigned fb_div in si_set_vce_clocks() local [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_pll.c | 78 * @fb_div: resulting feedback divider 87 unsigned int *fb_div, unsigned int *ref_div) in amdgpu_pll_get_fb_ref_div() 98 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div() 101 if (*fb_div > fb_div_max) { in amdgpu_pll_get_fb_ref_div() 102 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div() 103 *fb_div = fb_div_max; in amdgpu_pll_get_fb_ref_div() 134 unsigned fb_div_min, fb_div_max, fb_div; in amdgpu_pll_compute() local 211 ref_div_max, &fb_div, &ref_div); in amdgpu_pll_compute() 212 diff = abs(target_clock - (pll->reference_freq * fb_div) / in amdgpu_pll_compute() 226 &fb_div, in amdgpu_pll_compute() 84 amdgpu_pll_get_fb_ref_div(struct amdgpu_device *adev, unsigned int nom, unsigned int den, unsigned int post_div, unsigned int fb_div_max, unsigned int ref_div_max, unsigned int *fb_div, unsigned int *ref_div) amdgpu_pll_get_fb_ref_div() argument [all...] |
H A D | atombios_crtc.c | 582 u32 fb_div, in amdgpu_atombios_crtc_program_pll() 609 args.v1.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 619 args.v2.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 629 args.v3.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 646 args.v5.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 676 args.v6.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 825 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in amdgpu_atombios_crtc_set_pll() local 854 &fb_div, &frac_fb_div, &ref_div, &post_div); in amdgpu_atombios_crtc_set_pll() 861 ref_div, fb_div, frac_fb_div, post_div, in amdgpu_atombios_crtc_set_pll() 867 u32 amount = (((fb_div * 1 in amdgpu_atombios_crtc_set_pll() 575 amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct amdgpu_atom_ss *ss) amdgpu_atombios_crtc_program_pll() argument [all...] |
H A D | amdgpu_atombios.h | 41 u32 fb_div; member 66 u32 fb_div; member
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H A D | atombios_crtc.h | 49 u32 fb_div,
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H A D | si.c | 1731 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in si_calc_upll_dividers() local 1734 do_div(fb_div, ref_freq); in si_calc_upll_dividers() 1737 if (fb_div > fb_mask) in si_calc_upll_dividers() 1740 fb_div &= fb_mask; in si_calc_upll_dividers() 1759 *optimal_fb_div = fb_div; in si_calc_upll_dividers() 1777 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in si_set_uvd_clocks() local 1795 &fb_div, &vclk_div, &dclk_div); in si_set_uvd_clocks() 1824 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks() 1829 if (fb_div < 307200) in si_set_uvd_clocks() 1900 unsigned fb_div in si_set_vce_clocks() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | radeon_clocks.c | 43 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local 45 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock() 46 fb_div = (fb_div >> RADEON_SPLL_FB_DIV_SHIFT) & RADEON_SPLL_FB_DIV_MASK; in radeon_legacy_get_engine_clock() 47 fb_div <<= 1; in radeon_legacy_get_engine_clock() 48 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock() 56 sclk = fb_div / ref_div; in radeon_legacy_get_engine_clock() 73 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local 75 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock() 76 fb_div in radeon_legacy_get_memory_clock() 351 calc_eng_mem_clock(struct radeon_device *rdev, uint32_t req_clock, int *fb_div, int *post_div) calc_eng_mem_clock() argument 394 int fb_div, post_div; radeon_legacy_set_engine_clock() local [all...] |
H A D | radeon_display.c | 926 * @fb_div: resulting feedback divider 934 unsigned *fb_div, unsigned *ref_div) in avivo_get_fb_ref_div() 941 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div() 944 if (*fb_div > fb_div_max) { in avivo_get_fb_ref_div() 945 *ref_div = (*ref_div * fb_div_max)/(*fb_div); in avivo_get_fb_ref_div() 946 *fb_div = fb_div_max; in avivo_get_fb_ref_div() 974 unsigned fb_div_min, fb_div_max, fb_div; in radeon_compute_pll_avivo() local 1054 ref_div_max, &fb_div, &ref_div); in radeon_compute_pll_avivo() 1055 diff = abs(target_clock - (pll->reference_freq * fb_div) / in radeon_compute_pll_avivo() 1069 &fb_div, in radeon_compute_pll_avivo() 932 avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) avivo_get_fb_ref_div() argument [all...] |
H A D | rs780_dpm.c | 88 r600_engine_clock_entry_set_feedback_divider(rdev, 0, dividers.fb_div); in rs780_initialize_dpm_power_state() 406 static void rs780_force_fbdiv(struct radeon_device *rdev, u32 fb_div) in rs780_force_fbdiv() argument 415 WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(fb_div), in rs780_force_fbdiv() 417 WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(fb_div), in rs780_force_fbdiv() 460 rs780_force_fbdiv(rdev, max_dividers.fb_div); in rs780_set_engine_clock_scaling() 462 if (max_dividers.fb_div > min_dividers.fb_div) { in rs780_set_engine_clock_scaling() 464 MIN_FEEDBACK_DIV(min_dividers.fb_div) | in rs780_set_engine_clock_scaling() 465 MAX_FEEDBACK_DIV(max_dividers.fb_div), in rs780_set_engine_clock_scaling() 1049 rs780_force_fbdiv(rdev, dividers.fb_div); in rs780_dpm_force_performance_level() [all...] |
H A D | radeon_uvd.c | 978 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in radeon_uvd_calc_upll_dividers() local 981 do_div(fb_div, ref_freq); in radeon_uvd_calc_upll_dividers() 984 if (fb_div > fb_mask) in radeon_uvd_calc_upll_dividers() 987 fb_div &= fb_mask; in radeon_uvd_calc_upll_dividers() 1006 *optimal_fb_div = fb_div; in radeon_uvd_calc_upll_dividers()
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H A D | atombios_crtc.c | 829 u32 fb_div, in atombios_crtc_program_pll() 856 args.v1.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 866 args.v2.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 876 args.v3.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 893 args.v5.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 922 args.v6.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 1071 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in atombios_crtc_set_pll() local 1103 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll() 1106 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll() 1109 &fb_div, in atombios_crtc_set_pll() 822 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) atombios_crtc_program_pll() argument [all...] |
H A D | rv730_dpm.c | 159 mpll_func_cntl_3 |= MPLL_FB_DIV(dividers.fb_div); in rv730_populate_mclk_value() 173 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value()
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H A D | radeon_legacy_crtc.c | 267 uint16_t fb_div) in radeon_compute_pll_gain() 274 vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div; in radeon_compute_pll_gain() 266 radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div, uint16_t fb_div) radeon_compute_pll_gain() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | radeon_clocks.c | 43 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local 45 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock() 46 fb_div = (fb_div >> RADEON_SPLL_FB_DIV_SHIFT) & RADEON_SPLL_FB_DIV_MASK; in radeon_legacy_get_engine_clock() 47 fb_div <<= 1; in radeon_legacy_get_engine_clock() 48 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock() 56 sclk = fb_div / ref_div; in radeon_legacy_get_engine_clock() 73 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local 75 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock() 76 fb_div in radeon_legacy_get_memory_clock() 351 calc_eng_mem_clock(struct radeon_device *rdev, uint32_t req_clock, int *fb_div, int *post_div) calc_eng_mem_clock() argument 394 int fb_div, post_div; radeon_legacy_set_engine_clock() local [all...] |
H A D | radeon_display.c | 924 * @fb_div: resulting feedback divider 932 unsigned *fb_div, unsigned *ref_div) in avivo_get_fb_ref_div() 939 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div() 942 if (*fb_div > fb_div_max) { in avivo_get_fb_ref_div() 943 *ref_div = (*ref_div * fb_div_max)/(*fb_div); in avivo_get_fb_ref_div() 944 *fb_div = fb_div_max; in avivo_get_fb_ref_div() 973 unsigned fb_div_min, fb_div_max, fb_div; in radeon_compute_pll_avivo() local 1053 ref_div_max, &fb_div, &ref_div); in radeon_compute_pll_avivo() 1054 diff = abs(target_clock - (pll->reference_freq * fb_div) / in radeon_compute_pll_avivo() 1068 &fb_div, in radeon_compute_pll_avivo() 930 avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) avivo_get_fb_ref_div() argument [all...] |
H A D | rs780_dpm.c | 88 r600_engine_clock_entry_set_feedback_divider(rdev, 0, dividers.fb_div); in rs780_initialize_dpm_power_state() 405 static void rs780_force_fbdiv(struct radeon_device *rdev, u32 fb_div) in rs780_force_fbdiv() argument 414 WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(fb_div), in rs780_force_fbdiv() 416 WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(fb_div), in rs780_force_fbdiv() 459 rs780_force_fbdiv(rdev, max_dividers.fb_div); in rs780_set_engine_clock_scaling() 461 if (max_dividers.fb_div > min_dividers.fb_div) { in rs780_set_engine_clock_scaling() 463 MIN_FEEDBACK_DIV(min_dividers.fb_div) | in rs780_set_engine_clock_scaling() 464 MAX_FEEDBACK_DIV(max_dividers.fb_div), in rs780_set_engine_clock_scaling() 1048 rs780_force_fbdiv(rdev, dividers.fb_div); in rs780_dpm_force_performance_level() [all...] |
H A D | radeon_uvd.c | 968 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in radeon_uvd_calc_upll_dividers() local 971 do_div(fb_div, ref_freq); in radeon_uvd_calc_upll_dividers() 974 if (fb_div > fb_mask) in radeon_uvd_calc_upll_dividers() 977 fb_div &= fb_mask; in radeon_uvd_calc_upll_dividers() 996 *optimal_fb_div = fb_div; in radeon_uvd_calc_upll_dividers()
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H A D | atombios_crtc.c | 822 u32 fb_div, in atombios_crtc_program_pll() 849 args.v1.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 859 args.v2.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 869 args.v3.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 886 args.v5.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 915 args.v6.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 1062 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in atombios_crtc_set_pll() local 1094 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll() 1097 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll() 1100 &fb_div, in atombios_crtc_set_pll() 815 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) atombios_crtc_program_pll() argument [all...] |
H A D | rv730_dpm.c | 157 mpll_func_cntl_3 |= MPLL_FB_DIV(dividers.fb_div); in rv730_populate_mclk_value() 171 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clock_source.c | 653 struct fixed31_32 fb_div; in calculate_ss() local 673 fb_div = dc_fixpt_from_fraction( in calculate_ss() 675 fb_div = dc_fixpt_add_int(fb_div, pll_settings->feedback_divider); in calculate_ss() 681 fb_div, dc_fixpt_from_fraction(ss_data->percentage, in calculate_ss()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clock_source.c | 650 struct fixed31_32 fb_div; in calculate_ss() local 670 fb_div = dc_fixpt_from_fraction( in calculate_ss() 672 fb_div = dc_fixpt_add_int(fb_div, pll_settings->feedback_divider); in calculate_ss() 678 fb_div, dc_fixpt_from_fraction(ss_data->percentage, in calculate_ss()
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