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Searched refs:cgu (Results 1 - 25 of 28) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clk/ingenic/
H A Dcgu.c23 #include "cgu.h"
30 return &clk->cgu->clock_info[clk->idx]; in to_clk_info()
35 * @cgu: reference to the CGU whose registers should be read
39 * caller must hold cgu->lock.
44 ingenic_cgu_gate_get(struct ingenic_cgu *cgu, in ingenic_cgu_gate_get() argument
47 return !!(readl(cgu->base + info->reg) & BIT(info->bit)) in ingenic_cgu_gate_get()
53 * @cgu: reference to the CGU whose registers should be modified
59 * The caller must hold cgu->lock.
62 ingenic_cgu_gate_set(struct ingenic_cgu *cgu, in ingenic_cgu_gate_set() argument
65 u32 clkgr = readl(cgu in ingenic_cgu_gate_set()
84 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_recalc_rate() local
165 ingenic_pll_check_stable(struct ingenic_cgu *cgu, const struct ingenic_cgu_pll_info *pll_info) ingenic_pll_check_stable() argument
180 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_set_rate() local
220 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_enable() local
249 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_disable() local
267 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_is_enabled() local
295 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_get_parent() local
321 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_set_parent() local
369 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_recalc_rate() local
460 ingenic_clk_check_stable(struct ingenic_cgu *cgu, const struct ingenic_cgu_clk_info *clk_info) ingenic_clk_check_stable() argument
476 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_set_rate() local
528 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_enable() local
548 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_disable() local
563 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_is_enabled() local
589 ingenic_register_clock(struct ingenic_cgu *cgu, unsigned idx) ingenic_register_clock() argument
736 struct ingenic_cgu *cgu; ingenic_cgu_new() local
762 ingenic_cgu_register_clocks(struct ingenic_cgu *cgu) ingenic_cgu_register_clocks() argument
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H A Djz4780-cgu.c16 #include <dt-bindings/clock/jz4780-cgu.h>
18 #include "cgu.h"
103 static struct ingenic_cgu *cgu; variable
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
173 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
180 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
186 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_enable()
187 void __iomem *reg_usbpcr = cgu in jz4780_otg_phy_enable()
226 struct ingenic_cgu *cgu = ingenic_clk->cgu; jz4780_core1_enable() local
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H A Dx1000-cgu.c12 #include <dt-bindings/clock/x1000-cgu.h>
14 #include "cgu.h"
61 static struct ingenic_cgu *cgu; variable
69 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_recalc_rate()
121 spin_lock_irqsave(&cgu->lock, flags); in x1000_otg_phy_set_rate()
123 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
126 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
128 spin_unlock_irqrestore(&cgu->lock, flags); in x1000_otg_phy_set_rate()
134 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1000_usb_phy_enable()
135 void __iomem *reg_usbpcr = cgu in x1000_usb_phy_enable()
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H A Dx1830-cgu.c12 #include <dt-bindings/clock/x1830-cgu.h>
14 #include "cgu.h"
55 static struct ingenic_cgu *cgu; variable
59 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_enable()
60 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_enable()
69 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_disable()
70 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_disable()
78 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_is_enabled()
79 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_is_enabled()
442 cgu in x1830_cgu_init()
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H A Djz4770-cgu.c13 #include <dt-bindings/clock/jz4770-cgu.h>
15 #include "cgu.h"
49 static struct ingenic_cgu *cgu; variable
53 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_enable()
54 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_enable()
63 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_disable()
64 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_disable()
72 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_is_enabled()
73 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_is_enabled()
439 cgu in jz4770_cgu_init()
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H A Djz4740-cgu.c14 #include <dt-bindings/clock/jz4740-cgu.h>
16 #include "cgu.h"
48 static struct ingenic_cgu *cgu; variable
248 cgu = ingenic_cgu_new(jz4740_cgu_clocks, in jz4740_cgu_init()
250 if (!cgu) { in jz4740_cgu_init()
255 retval = ingenic_cgu_register_clocks(cgu); in jz4740_cgu_init()
259 ingenic_cgu_register_syscore_ops(cgu); in jz4740_cgu_init()
261 CLK_OF_DECLARE_DRIVER(jz4740_cgu, "ingenic,jz4740-cgu", jz4740_cgu_init);
H A Djz4725b-cgu.c13 #include <dt-bindings/clock/jz4725b-cgu.h>
15 #include "cgu.h"
33 static struct ingenic_cgu *cgu; variable
250 cgu = ingenic_cgu_new(jz4725b_cgu_clocks, in jz4725b_cgu_init()
252 if (!cgu) { in jz4725b_cgu_init()
257 retval = ingenic_cgu_register_clocks(cgu); in jz4725b_cgu_init()
261 ingenic_cgu_register_syscore_ops(cgu); in jz4725b_cgu_init()
263 CLK_OF_DECLARE_DRIVER(jz4725b_cgu, "ingenic,jz4725b-cgu", jz4725b_cgu_init);
H A Dpm.c6 #include "cgu.h"
39 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu) in ingenic_cgu_register_syscore_ops() argument
42 ingenic_cgu_base = cgu->base; in ingenic_cgu_register_syscore_ops()
H A Dcgu.h197 * @cgu: a pointer to the CGU data
198 * @idx: the index of this clock in cgu->clock_info
202 struct ingenic_cgu *cgu; member
224 * @cgu: pointer to cgu data
230 int ingenic_cgu_register_clocks(struct ingenic_cgu *cgu);
H A Dpm.h10 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu);
/kernel/linux/linux-6.6/drivers/clk/ingenic/
H A Dcgu.c23 #include "cgu.h"
30 return &clk->cgu->clock_info[clk->idx]; in to_clk_info()
35 * @cgu: reference to the CGU whose registers should be read
39 * caller must hold cgu->lock.
44 ingenic_cgu_gate_get(struct ingenic_cgu *cgu, in ingenic_cgu_gate_get() argument
47 return !!(readl(cgu->base + info->reg) & BIT(info->bit)) in ingenic_cgu_gate_get()
53 * @cgu: reference to the CGU whose registers should be modified
59 * The caller must hold cgu->lock.
62 ingenic_cgu_gate_set(struct ingenic_cgu *cgu, in ingenic_cgu_gate_set() argument
65 u32 clkgr = readl(cgu in ingenic_cgu_gate_set()
84 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_recalc_rate() local
187 ingenic_pll_check_stable(struct ingenic_cgu *cgu, const struct ingenic_cgu_pll_info *pll_info) ingenic_pll_check_stable() argument
205 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_set_rate() local
250 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_enable() local
284 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_disable() local
305 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_pll_is_enabled() local
336 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_get_parent() local
362 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_set_parent() local
410 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_recalc_rate() local
513 ingenic_clk_check_stable(struct ingenic_cgu *cgu, const struct ingenic_cgu_clk_info *clk_info) ingenic_clk_check_stable() argument
529 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_set_rate() local
581 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_enable() local
601 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_disable() local
616 struct ingenic_cgu *cgu = ingenic_clk->cgu; ingenic_clk_is_enabled() local
642 ingenic_register_clock(struct ingenic_cgu *cgu, unsigned idx) ingenic_register_clock() argument
789 struct ingenic_cgu *cgu; ingenic_cgu_new() local
815 ingenic_cgu_register_clocks(struct ingenic_cgu *cgu) ingenic_cgu_register_clocks() argument
[all...]
H A Djz4780-cgu.c16 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
18 #include "cgu.h"
103 static struct ingenic_cgu *cgu; variable
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
173 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
180 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
186 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_enable()
187 void __iomem *reg_usbpcr = cgu in jz4780_otg_phy_enable()
226 struct ingenic_cgu *cgu = ingenic_clk->cgu; jz4780_core1_enable() local
[all...]
H A Dx1000-cgu.c13 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
15 #include "cgu.h"
62 static struct ingenic_cgu *cgu; variable
70 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_recalc_rate()
122 spin_lock_irqsave(&cgu->lock, flags); in x1000_otg_phy_set_rate()
124 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
127 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in x1000_otg_phy_set_rate()
129 spin_unlock_irqrestore(&cgu->lock, flags); in x1000_otg_phy_set_rate()
135 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1000_usb_phy_enable()
136 void __iomem *reg_usbpcr = cgu in x1000_usb_phy_enable()
[all...]
H A Dx1830-cgu.c12 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
14 #include "cgu.h"
55 static struct ingenic_cgu *cgu; variable
59 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_enable()
60 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_enable()
69 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_disable()
70 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_disable()
78 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_is_enabled()
79 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_is_enabled()
453 cgu in x1830_cgu_init()
[all...]
H A Djz4770-cgu.c13 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
15 #include "cgu.h"
49 static struct ingenic_cgu *cgu; variable
53 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_enable()
54 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_enable()
63 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_disable()
64 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_disable()
72 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_is_enabled()
73 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_is_enabled()
448 cgu in jz4770_cgu_init()
[all...]
H A Djz4740-cgu.c14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
16 #include "cgu.h"
48 static struct ingenic_cgu *cgu; variable
258 cgu = ingenic_cgu_new(jz4740_cgu_clocks, in jz4740_cgu_init()
260 if (!cgu) { in jz4740_cgu_init()
265 retval = ingenic_cgu_register_clocks(cgu); in jz4740_cgu_init()
269 ingenic_cgu_register_syscore_ops(cgu); in jz4740_cgu_init()
271 CLK_OF_DECLARE_DRIVER(jz4740_cgu, "ingenic,jz4740-cgu", jz4740_cgu_init);
H A Djz4725b-cgu.c13 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
15 #include "cgu.h"
33 static struct ingenic_cgu *cgu; variable
260 cgu = ingenic_cgu_new(jz4725b_cgu_clocks, in jz4725b_cgu_init()
262 if (!cgu) { in jz4725b_cgu_init()
267 retval = ingenic_cgu_register_clocks(cgu); in jz4725b_cgu_init()
271 ingenic_cgu_register_syscore_ops(cgu); in jz4725b_cgu_init()
273 CLK_OF_DECLARE_DRIVER(jz4725b_cgu, "ingenic,jz4725b-cgu", jz4725b_cgu_init);
H A Djz4755-cgu.c14 #include <dt-bindings/clock/ingenic,jz4755-cgu.h>
16 #include "cgu.h"
30 static struct ingenic_cgu *cgu; variable
329 cgu = ingenic_cgu_new(jz4755_cgu_clocks, in jz4755_cgu_init()
331 if (!cgu) { in jz4755_cgu_init()
336 retval = ingenic_cgu_register_clocks(cgu); in jz4755_cgu_init()
340 ingenic_cgu_register_syscore_ops(cgu); in jz4755_cgu_init()
346 CLK_OF_DECLARE_DRIVER(jz4755_cgu, "ingenic,jz4755-cgu", jz4755_cgu_init);
H A Djz4760-cgu.c15 #include <dt-bindings/clock/ingenic,jz4760-cgu.h>
17 #include "cgu.h"
425 struct ingenic_cgu *cgu; in jz4760_cgu_init() local
428 cgu = ingenic_cgu_new(jz4760_cgu_clocks, in jz4760_cgu_init()
430 if (!cgu) { in jz4760_cgu_init()
435 retval = ingenic_cgu_register_clocks(cgu); in jz4760_cgu_init()
439 ingenic_cgu_register_syscore_ops(cgu); in jz4760_cgu_init()
443 CLK_OF_DECLARE_DRIVER(jz4760_cgu, "ingenic,jz4760-cgu", jz4760_cgu_init);
446 CLK_OF_DECLARE_DRIVER(jz4760b_cgu, "ingenic,jz4760b-cgu", jz4760_cgu_init);
H A Dpm.c6 #include "cgu.h"
39 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu) in ingenic_cgu_register_syscore_ops() argument
42 ingenic_cgu_base = cgu->base; in ingenic_cgu_register_syscore_ops()
H A Dcgu.h211 * @cgu: a pointer to the CGU data
212 * @idx: the index of this clock in cgu->clock_info
216 struct ingenic_cgu *cgu; member
238 * @cgu: pointer to cgu data
244 int ingenic_cgu_register_clocks(struct ingenic_cgu *cgu);
H A Dpm.h10 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu);
/kernel/linux/linux-6.6/arch/mips/generic/
H A Dboard-ingenic.c72 void __iomem *cgu; in ingenic_force_12M_ext() local
94 cgu = ioremap(INGENIC_CGU_BASE, 0x4); in ingenic_force_12M_ext()
95 if (!cgu) in ingenic_force_12M_ext()
98 cpccr = ioread32(cgu); in ingenic_force_12M_ext()
103 iowrite32(cpccr, cgu); in ingenic_force_12M_ext()
105 iounmap(cgu); in ingenic_force_12M_ext()
/kernel/linux/linux-5.10/drivers/clk/x86/
H A DMakefile6 obj-$(CONFIG_CLK_LGM_CGU) += clk-cgu.o clk-cgu-pll.o clk-lgm.o
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/ice/
H A Dice_sbq_cmd.h53 cgu = 0x06 enumerator

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