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Searched refs:bypass (Results 1 - 25 of 198) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_clk.c52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers() argument
58 bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
59 if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) in rv1_dump_clk_registers()
60 bypass->dcfclk_bypass = 0; in rv1_dump_clk_registers()
69 bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
70 if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) in rv1_dump_clk_registers()
71 bypass->dispclk_pypass = 0; in rv1_dump_clk_registers()
75 bypass in rv1_dump_clk_registers()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_clk.c52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers() argument
58 bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
59 if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) in rv1_dump_clk_registers()
60 bypass->dcfclk_bypass = 0; in rv1_dump_clk_registers()
69 bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
70 if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) in rv1_dump_clk_registers()
71 bypass->dispclk_pypass = 0; in rv1_dump_clk_registers()
75 bypass in rv1_dump_clk_registers()
[all...]
/kernel/linux/linux-6.6/drivers/usb/misc/
H A Dusb3503.c49 struct gpio_desc *bypass; member
113 int rst, bypass, conn; in usb3503_switch_mode() local
119 bypass = 0; in usb3503_switch_mode()
124 bypass = 1; in usb3503_switch_mode()
130 bypass = 1; in usb3503_switch_mode()
143 if (hub->bypass) in usb3503_switch_mode()
144 gpiod_set_value_cansleep(hub->bypass, bypass); in usb3503_switch_mode()
261 hub->bypass = devm_gpiod_get_optional(dev, "bypass", GPIOD_OUT_HIG in usb3503_probe()
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/kernel/linux/linux-5.10/drivers/regulator/
H A Danatop-regulator.c30 bool bypass; member
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) in anatop_regmap_core_get_voltage_sel()
113 WARN_ON(!anatop_reg->bypass); in anatop_regmap_get_bypass()
115 WARN_ON(anatop_reg->bypass); in anatop_regmap_get_bypass()
117 *enable = anatop_reg->bypass; in anatop_regmap_get_bypass()
126 if (enable == anatop_reg->bypass) in anatop_regmap_set_bypass()
130 anatop_reg->bypass = enable; in anatop_regmap_set_bypass()
270 sreg->bypass in anatop_regulator_probe()
[all...]
/kernel/linux/linux-6.6/drivers/regulator/
H A Danatop-regulator.c30 bool bypass; member
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) in anatop_regmap_core_get_voltage_sel()
113 WARN_ON(!anatop_reg->bypass); in anatop_regmap_get_bypass()
115 WARN_ON(anatop_reg->bypass); in anatop_regmap_get_bypass()
117 *enable = anatop_reg->bypass; in anatop_regmap_get_bypass()
126 if (enable == anatop_reg->bypass) in anatop_regmap_set_bypass()
130 anatop_reg->bypass = enable; in anatop_regmap_set_bypass()
270 sreg->bypass in anatop_regulator_probe()
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/kernel/linux/linux-6.6/include/trace/events/
H A Dbcache.h124 TP_PROTO(struct bio *bio, bool hit, bool bypass),
125 TP_ARGS(bio, hit, bypass),
133 __field(bool, bypass )
142 __entry->bypass = bypass;
145 TP_printk("%d,%d %s %llu + %u hit %u bypass %u",
148 __entry->nr_sector, __entry->cache_hit, __entry->bypass)
153 bool writeback, bool bypass),
154 TP_ARGS(c, inode, bio, writeback, bypass),
163 __field(bool, bypass )
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/kernel/linux/linux-5.10/arch/arm/mach-omap2/
H A Dsram.h13 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
26 int bypass);
39 int bypass);
H A Dclkt2xxx_dpllcore.c113 u32 bypass = 0; in omap2_reprogram_dpllcore() local
161 bypass = 1; in omap2_reprogram_dpllcore()
168 bypass); in omap2_reprogram_dpllcore()
H A Dsram.c159 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
161 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) in omap2_set_prcm() argument
164 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); in omap2_set_prcm()
H A Dclkt2xxx_virt_prcm_set.c98 u32 cur_rate, done_rate, bypass = 0; in omap2_select_table_rate() local
133 bypass = 1; in omap2_select_table_rate()
151 bypass); in omap2_select_table_rate()
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
H A Dsram.h12 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
25 int bypass);
38 int bypass);
H A Dclkt2xxx_virt_prcm_set.c100 u32 cur_rate, done_rate, bypass = 0; in omap2_select_table_rate() local
135 bypass = 1; in omap2_select_table_rate()
153 bypass); in omap2_select_table_rate()
H A Dclkt2xxx_dpllcore.c114 u32 bypass = 0; in omap2_reprogram_dpllcore() local
162 bypass = 1; in omap2_reprogram_dpllcore()
169 bypass); in omap2_reprogram_dpllcore()
/kernel/linux/linux-5.10/include/trace/events/
H A Dbcache.h124 TP_PROTO(struct bio *bio, bool hit, bool bypass),
125 TP_ARGS(bio, hit, bypass),
133 __field(bool, bypass )
142 __entry->bypass = bypass;
145 TP_printk("%d,%d %s %llu + %u hit %u bypass %u",
148 __entry->nr_sector, __entry->cache_hit, __entry->bypass)
153 bool writeback, bool bypass),
154 TP_ARGS(c, inode, bio, writeback, bypass),
163 __field(bool, bypass )
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/kernel/linux/linux-5.10/drivers/clk/at91/
H A Dsckc.c122 bool bypass, in at91_clk_register_slow_osc()
148 if (bypass) in at91_clk_register_slow_osc()
374 bool bypass; in at91sam9x5_sckc_register() local
394 bypass = of_property_read_bool(child, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
398 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
405 xtal_name, 1200000, bypass, bits); in at91sam9x5_sckc_register()
468 bool bypass; in of_sam9x60_sckc_setup() local
484 bypass in of_sam9x60_sckc_setup()
118 at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const char *parent_name, unsigned long startup, bool bypass, const struct clk_slow_bits *bits) at91_clk_register_slow_osc() argument
[all...]
H A Dat91rm9200.c84 bool bypass; in at91rm9200_pmc_setup() local
107 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup()
110 bypass); in at91rm9200_pmc_setup()
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-sscg-pll.c75 int bypass; member
146 temp_setup->bypass = PLL_BYPASS1; in clk_sscg_divq_lookup()
220 temp_setup->bypass = PLL_BYPASS_NONE; in clk_sscg_divf1_lookup()
280 setup->bypass = PLL_BYPASS2; in clk_sscg_pll_find_setup()
365 /* set bypass here too since the parent might be the same */ in clk_sscg_pll_set_rate()
368 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass); in clk_sscg_pll_set_rate()
405 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass); in clk_sscg_pll_set_parent()
416 int bypass) in __clk_sscg_pll_determine_rate()
427 switch (bypass) { in __clk_sscg_pll_determine_rate()
443 rate, bypass); in __clk_sscg_pll_determine_rate()
411 __clk_sscg_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, uint64_t min, uint64_t max, uint64_t rate, int bypass) __clk_sscg_pll_determine_rate() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-sscg-pll.c75 int bypass; member
146 temp_setup->bypass = PLL_BYPASS1; in clk_sscg_divq_lookup()
220 temp_setup->bypass = PLL_BYPASS_NONE; in clk_sscg_divf1_lookup()
280 setup->bypass = PLL_BYPASS2; in clk_sscg_pll_find_setup()
365 /* set bypass here too since the parent might be the same */ in clk_sscg_pll_set_rate()
368 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass); in clk_sscg_pll_set_rate()
405 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass); in clk_sscg_pll_set_parent()
416 int bypass) in __clk_sscg_pll_determine_rate()
427 switch (bypass) { in __clk_sscg_pll_determine_rate()
443 rate, bypass); in __clk_sscg_pll_determine_rate()
411 __clk_sscg_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, uint64_t min, uint64_t max, uint64_t rate, int bypass) __clk_sscg_pll_determine_rate() argument
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-hw.c122 bool *bypass) in mxc_isi_channel_set_scaling()
165 *bypass = in_size->height == out_size->height && in mxc_isi_channel_set_scaling()
211 bool *bypass) in mxc_isi_channel_set_csc()
256 *bypass = !cscen; in mxc_isi_channel_set_csc()
306 bool bypass) in mxc_isi_channel_set_control()
318 * If no scaling or color space conversion is needed, bypass the in mxc_isi_channel_set_control()
321 if (bypass) in mxc_isi_channel_set_control()
540 mxc_isi_pipe_irq_t irq_handler, bool bypass) in mxc_isi_channel_acquire()
555 * when the channel isn't in bypass mode. in mxc_isi_channel_acquire()
558 | (!bypass in mxc_isi_channel_acquire()
118 mxc_isi_channel_set_scaling(struct mxc_isi_pipe *pipe, enum mxc_isi_encoding encoding, const struct v4l2_area *in_size, const struct v4l2_area *out_size, bool *bypass) mxc_isi_channel_set_scaling() argument
208 mxc_isi_channel_set_csc(struct mxc_isi_pipe *pipe, enum mxc_isi_encoding in_encoding, enum mxc_isi_encoding out_encoding, bool *bypass) mxc_isi_channel_set_csc() argument
304 mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe, enum mxc_isi_input_id input, bool bypass) mxc_isi_channel_set_control() argument
539 mxc_isi_channel_acquire(struct mxc_isi_pipe *pipe, mxc_isi_pipe_irq_t irq_handler, bool bypass) mxc_isi_channel_acquire() argument
592 mxc_isi_channel_chain(struct mxc_isi_pipe *pipe, bool bypass) mxc_isi_channel_chain() argument
[all...]
/kernel/linux/linux-5.10/drivers/md/bcache/
H A Dstats.c189 bool hit, bool bypass) in mark_cache_stats()
191 if (!bypass) in mark_cache_stats()
204 bool hit, bool bypass) in bch_mark_cache_accounting()
208 mark_cache_stats(&dc->accounting.collector, hit, bypass); in bch_mark_cache_accounting()
209 mark_cache_stats(&c->accounting.collector, hit, bypass); in bch_mark_cache_accounting()
188 mark_cache_stats(struct cache_stat_collector *stats, bool hit, bool bypass) mark_cache_stats() argument
203 bch_mark_cache_accounting(struct cache_set *c, struct bcache_device *d, bool hit, bool bypass) bch_mark_cache_accounting() argument
/kernel/linux/linux-6.6/drivers/md/bcache/
H A Dstats.c184 bool hit, bool bypass) in mark_cache_stats()
186 if (!bypass) in mark_cache_stats()
199 bool hit, bool bypass) in bch_mark_cache_accounting()
203 mark_cache_stats(&dc->accounting.collector, hit, bypass); in bch_mark_cache_accounting()
204 mark_cache_stats(&c->accounting.collector, hit, bypass); in bch_mark_cache_accounting()
183 mark_cache_stats(struct cache_stat_collector *stats, bool hit, bool bypass) mark_cache_stats() argument
198 bch_mark_cache_accounting(struct cache_set *c, struct bcache_device *d, bool hit, bool bypass) bch_mark_cache_accounting() argument
/kernel/linux/linux-5.10/drivers/clk/socfpga/
H A Dclk-pll.c16 /* Clock bypass bits */
44 unsigned long bypass; in clk_pll_recalc_rate() local
47 bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); in clk_pll_recalc_rate()
48 if (bypass & MAINPLL_BYPASS) in clk_pll_recalc_rate()
/kernel/linux/linux-6.6/drivers/clk/socfpga/
H A Dclk-pll.c16 /* Clock bypass bits */
44 unsigned long bypass; in clk_pll_recalc_rate() local
47 bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); in clk_pll_recalc_rate()
48 if (bypass & MAINPLL_BYPASS) in clk_pll_recalc_rate()
/kernel/linux/linux-6.6/drivers/clk/at91/
H A Dsckc.c122 bool bypass, in at91_clk_register_slow_osc()
148 if (bypass) in at91_clk_register_slow_osc()
378 bool bypass; in at91sam9x5_sckc_register() local
398 bypass = of_property_read_bool(child, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
402 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
411 &parent_data, 1200000, bypass, bits); in at91sam9x5_sckc_register()
479 bool bypass; in of_sam9x60_sckc_setup() local
496 bypass in of_sam9x60_sckc_setup()
118 at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const struct clk_parent_data *parent_data, unsigned long startup, bool bypass, const struct clk_slow_bits *bits) at91_clk_register_slow_osc() argument
[all...]
/kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-jtag.c66 jtgc.s.bypass = 0x3; in cvmx_helper_qlm_jtag_init()
68 jtgc.s.bypass = 0xf; in cvmx_helper_qlm_jtag_init()

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