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Searched refs:aud_intbus_parents (Results 1 - 25 of 30) sorted by relevance

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/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c46 static const char * const aud_intbus_parents[] = { variable
479 TOP_MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt7622.c153 static const char * const aud_intbus_parents[] = { variable
428 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8173-topckgen.c228 static const char * const aud_intbus_parents[] = { variable
563 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8135.c165 static const char * const aud_intbus_parents[] = { variable
361 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt6797.c225 static const char * const aud_intbus_parents[] = { variable
354 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt2712.c302 static const char * const aud_intbus_parents[] = { variable
674 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt7629.c199 static const char * const aud_intbus_parents[] = { variable
500 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8516.c135 static const char * const aud_intbus_parents[] __initconst = {
379 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8186-topckgen.c165 static const char * const aud_intbus_parents[] = { variable
544 aud_intbus_parents, 0x0080, 0x0084, 0x0088, 0, 2, 7, 0x0004, 16),
H A Dclk-mt8167.c187 static const char * const aud_intbus_parents[] = { variable
550 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt6765.c269 static const char * const aud_intbus_parents[] = { variable
423 aud_intbus_parents, CLK_CFG_4, CLK_CFG_4_SET,
H A Dclk-mt2701.c243 static const char * const aud_intbus_parents[] = { variable
520 MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8365.c211 static const char * const aud_intbus_parents[] = { variable
454 aud_intbus_parents, 0x080, 0x084, 0x088, 0, 2, 7,
H A Dclk-mt8188-topckgen.c439 static const char * const aud_intbus_parents[] = { variable
1030 aud_intbus_parents, 0x074, 0x078, 0x07C, 24, 4, 31, 0x04, 31),
H A Dclk-mt8183.c304 static const char * const aud_intbus_parents[] = { variable
508 aud_intbus_parents, 0x90, 0x94, 0x98, 8, 2, 15, 0x004, 21),
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt8516.c133 static const char * const aud_intbus_parents[] __initconst = {
377 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt6797.c226 static const char * const aud_intbus_parents[] = { variable
355 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt7622.c231 static const char * const aud_intbus_parents[] = { variable
557 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt7629.c224 static const char * const aud_intbus_parents[] = { variable
525 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8135.c163 static const char * const aud_intbus_parents[] __initconst = {
359 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt2701.c244 static const char * const aud_intbus_parents[] = { variable
521 MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8167.c186 static const char * const aud_intbus_parents[] __initconst = {
549 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8183.c378 static const char * const aud_intbus_parents[] = { variable
594 aud_intbus_parents, 0x90,
H A Dclk-mt8173.c326 static const char * const aud_intbus_parents[] __initconst = {
565 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0080, 24, 3, 31),
H A Dclk-mt6779.c396 static const char * const aud_intbus_parents[] = { variable
701 aud_intbus_parents, 0x80, 0x84, 0x88,

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