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Searched refs:R5 (Results 1 - 25 of 81) sorted by relevance

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/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_dispatch.S55 LDR R5, =OS_NVIC_PENDSV_PRI
56 STR R5, [R4]
73 MOV LR, R5
123 LDR R5, =g_losTask
124 LDR R6, [R5]
127 LDR R0, [R5, #4]
128 STR R0, [R5]
/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
H A Dprt_dispatch.S101 LDR R5, =OS_NVIC_PENDSV_PRI
102 STR R5, [R4]
134 LDR R5, [R1]
142 MOV R0, R5
276 LDR R5, =g_runningTask
277 LDR R6, [R5]
291 STR R7, [R5]
298 @task switch hook,dot not change R5 R6 R7
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
H A Dlos_dispatch.S67 LDR R5, =OS_NVIC_PENDSV_PRI
68 STR R5, [R4]
89 MOV LR, R5
98 MOV LR, R5
152 LDR R5, =g_losTask
153 LDR R6, [R5]
156 LDR R0, [R5, #4]
157 STR R0, [R5]
/kernel/liteos_m/arch/arm/cortex-m4/iar/
H A Dlos_dispatch.S67 LDR R5, =OS_NVIC_PENDSV_PRI
68 STR R5, [R4]
89 MOV LR, R5
98 MOV LR, R5
154 LDR R5, =g_losTask
155 LDR R6, [R5]
158 LDR R0, [R5, #4]
159 STR R0, [R5]
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
H A Dlos_dispatch.S67 LDR R5, =OS_NVIC_PENDSV_PRI
68 STR R5, [R4]
89 MOV LR, R5
98 MOV LR, R5
152 LDR R5, =g_losTask
153 LDR R6, [R5]
156 LDR R0, [R5, #4]
157 STR R0, [R5]
/kernel/liteos_m/arch/arm/cortex-m7/iar/
H A Dlos_dispatch.S67 LDR R5, =OS_NVIC_PENDSV_PRI
68 STR R5, [R4]
89 MOV LR, R5
98 MOV LR, R5
154 LDR R5, =g_losTask
155 LDR R6, [R5]
158 LDR R0, [R5, #4]
159 STR R0, [R5]
/kernel/liteos_m/arch/arm/arm9/gcc/
H A Dlos_exc.S65 STMFD SP!, {R0-R5}
71 STMFD SP!, {R0-R5}
79 STMFD SP!, {R0-R5}
87 STMFD SP!, {R0-R5}
/kernel/linux/linux-5.10/drivers/tty/serial/
H A Dpmac_zilog.c142 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); in pmz_load_zsregs()
172 /* Rewrite R3/R5, this time without enables masked. */ in pmz_load_zsregs()
174 write_zsreg(uap, R5, regs[R5]); in pmz_load_zsregs()
564 uap->curregs[R5] |= set_bits; in pmz_set_mctrl()
565 uap->curregs[R5] &= ~clear_bits; in pmz_set_mctrl()
567 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_set_mctrl()
569 set_bits, clear_bits, uap->curregs[R5]); in pmz_set_mctrl()
[all...]
H A Dip22zilog.c188 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
219 /* Rewrite R3/R5, this time without enables masked. */ in __load_zsregs()
221 write_zsreg(channel, R5, regs[R5]); in __load_zsregs()
561 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
562 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
563 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
671 new_reg = (up->curregs[R5] | set_bit in ip22zilog_break_ctl()
[all...]
H A Dsunzilog.c207 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
252 /* Rewrite R3/R5, this time without enables masked. */ in __load_zsregs()
254 write_zsreg(channel, R5, regs[R5]); in __load_zsregs()
661 up->curregs[R5] |= set_bits; in sunzilog_set_mctrl()
662 up->curregs[R5] &= ~clear_bits; in sunzilog_set_mctrl()
663 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_set_mctrl()
771 new_reg = (up->curregs[R5] | set_bit in sunzilog_break_ctl()
[all...]
/kernel/linux/linux-6.6/drivers/tty/serial/
H A Dpmac_zilog.c135 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); in pmz_load_zsregs()
165 /* Rewrite R3/R5, this time without enables masked. */ in pmz_load_zsregs()
167 write_zsreg(uap, R5, regs[R5]); in pmz_load_zsregs()
553 uap->curregs[R5] |= set_bits; in pmz_set_mctrl()
554 uap->curregs[R5] &= ~clear_bits; in pmz_set_mctrl()
556 write_zsreg(uap, R5, uap->curregs[R5]); in pmz_set_mctrl()
558 set_bits, clear_bits, uap->curregs[R5]); in pmz_set_mctrl()
[all...]
H A Dip22zilog.c188 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
219 /* Rewrite R3/R5, this time without enables masked. */ in __load_zsregs()
221 write_zsreg(channel, R5, regs[R5]); in __load_zsregs()
560 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
561 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
562 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
669 new_reg = (up->curregs[R5] | set_bit in ip22zilog_break_ctl()
[all...]
H A Dsunzilog.c207 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
252 /* Rewrite R3/R5, this time without enables masked. */ in __load_zsregs()
254 write_zsreg(channel, R5, regs[R5]); in __load_zsregs()
660 up->curregs[R5] |= set_bits; in sunzilog_set_mctrl()
661 up->curregs[R5] &= ~clear_bits; in sunzilog_set_mctrl()
662 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_set_mctrl()
769 new_reg = (up->curregs[R5] | set_bit in sunzilog_break_ctl()
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_dispatch.S179 LDR R5, =g_losTask
180 LDR R6, [R5] /* Get the stackPointer handler of the current task. */
187 LDR R0, [R5, #4]
188 STR R0, [R5]
225 LDR R5, =OS_NVIC_PENDSV_PRI
226 STR R5, [R4]
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_dispatch.S165 LDR R5, =g_losTask
166 LDR R6, [R5] /* Get the stackPointer handler of the current task. */
173 LDR R0, [R5, #4]
174 STR R0, [R5]
206 LDR R5, =OS_NVIC_PENDSV_PRI
207 STR R5, [R4]
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_dispatch.S179 LDR R5, =g_losTask
180 LDR R6, [R5] /* Get the stackPointer handler of the current task. */
187 LDR R0, [R5, #4]
188 STR R0, [R5]
225 LDR R5, =OS_NVIC_PENDSV_PRI
226 STR R5, [R4]
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_dispatch.S165 LDR R5, =g_losTask
166 LDR R6, [R5] /* Get the stackPointer handler of the current task. */
173 LDR R0, [R5, #4]
174 STR R0, [R5]
206 LDR R5, =OS_NVIC_PENDSV_PRI
207 STR R5, [R4]
/kernel/linux/linux-5.10/lib/
H A Dtest_bpf.c44 #define R5 BPF_REG_5 macro
1184 BPF_ALU64_IMM(BPF_MOV, R5, 5),
1194 BPF_ALU64_IMM(BPF_ADD, R5, 20),
1204 BPF_ALU64_IMM(BPF_SUB, R5, 10),
1214 BPF_ALU64_REG(BPF_ADD, R0, R5),
1226 BPF_ALU64_REG(BPF_ADD, R1, R5),
1238 BPF_ALU64_REG(BPF_ADD, R2, R5),
1250 BPF_ALU64_REG(BPF_ADD, R3, R5),
1262 BPF_ALU64_REG(BPF_ADD, R4, R5),
1269 BPF_ALU64_REG(BPF_ADD, R5, R
[all...]
/kernel/linux/linux-5.10/tools/perf/arch/arm/tests/
H A Dregs_load.S9 #define R5 0x28 define
46 str r5, [r0, #R5]
/kernel/linux/linux-6.6/tools/perf/arch/arm/tests/
H A Dregs_load.S9 #define R5 0x28 define
46 str r5, [r0, #R5]
/kernel/linux/linux-5.10/tools/perf/arch/powerpc/tests/
H A Dregs_load.S10 #define R5 5 * 8 define
49 std 5, R5(3)
/kernel/linux/linux-6.6/tools/perf/arch/powerpc/tests/
H A Dregs_load.S10 #define R5 5 * 8 define
49 std 5, R5(3)
/kernel/linux/linux-6.6/lib/
H A Dtest_bpf.c44 #define R5 BPF_REG_5 macro
1623 i += __bpf_ld_imm64(&insns[i], R5, keep); in __bpf_emit_atomic64()
1635 insns[i++] = BPF_JMP_REG(BPF_JEQ, R0, R5, 1); in __bpf_emit_atomic64()
1670 i += __bpf_ld_imm64(&insns[i], R5, keep); in __bpf_emit_atomic32()
1682 insns[i++] = BPF_JMP_REG(BPF_JEQ, R0, R5, 1); in __bpf_emit_atomic32()
3783 BPF_ALU64_IMM(BPF_MOV, R5, 5),
3793 BPF_ALU64_IMM(BPF_ADD, R5, 20),
3803 BPF_ALU64_IMM(BPF_SUB, R5, 10),
3813 BPF_ALU64_REG(BPF_ADD, R0, R5),
3825 BPF_ALU64_REG(BPF_ADD, R1, R5),
[all...]
/kernel/linux/linux-5.10/arch/s390/crypto/
H A Dcrc32le-vx.S42 * R5 = [(x64 mod P'(x) << 32)]' << 1
66 .octa 0x163cd6124 # R5
74 .octa 0x0dd45aab8 # R5
221 * in V1 with R5 and XOR the result with the remaining bits in V1.
228 * The vector register with CONST_R5 contains the R5 constant in the
235 VGFMAG %v1,CONST_R5,%v1,%v2 /* V1 = (V1 * R5) XOR V2 */
/kernel/linux/linux-6.6/arch/s390/crypto/
H A Dcrc32le-vx.S42 * R5 = [(x64 mod P'(x) << 32)]' << 1
66 .octa 0x163cd6124 # R5
75 .octa 0x0dd45aab8 # R5
223 * in V1 with R5 and XOR the result with the remaining bits in V1.
230 * The vector register with CONST_R5 contains the R5 constant in the
237 VGFMAG %v1,CONST_R5,%v1,%v2 /* V1 = (V1 * R5) XOR V2 */

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