Home
last modified time | relevance | path

Searched refs:regs (Results 1 - 25 of 429) sorted by relevance

12345678910>>...18

/device/soc/rockchip/common/vendor/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c21 static char *mode_name(const struct pt_regs *regs) in mode_name() argument
23 if (compat_user_mode(regs)) { in mode_name()
26 switch (processor_mode(regs)) { in mode_name()
43 void fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs) in fiq_debugger_dump_pc() argument
45 output->printf(output, " pc %016lx cpsr %08lx mode %s\n", regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
48 void fiq_debugger_dump_regs_aarch32(struct fiq_debugger_output *output, const struct pt_regs *regs) in fiq_debugger_dump_regs_aarch32() argument
50 output->printf(output, " r0 %08x r1 %08x r2 %08x r3 %08x\n", regs->compat_usr(0), regs in fiq_debugger_dump_regs_aarch32()
63 fiq_debugger_dump_regs_aarch64(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch64() argument
88 fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs() argument
104 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument
151 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument
[all...]
H A Dfiq_debugger_arm.c45 void fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs) in fiq_debugger_dump_pc() argument
47 output->printf(output, " pc %08x cpsr %08x mode %s\n", regs->ARM_pc, regs->ARM_cpsr, mode_name(regs->ARM_cpsr)); in fiq_debugger_dump_pc()
50 void fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs) in fiq_debugger_dump_regs() argument
52 output->printf(output, " r0 %08x r1 %08x r2 %08x r3 %08x\n", regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, in fiq_debugger_dump_regs()
53 regs->ARM_r3); in fiq_debugger_dump_regs()
54 output->printf(output, " r4 %08x r5 %08x r6 %08x r7 %08x\n", regs in fiq_debugger_dump_regs()
89 get_mode_regs(struct mode_regs *regs) get_mode_regs() argument
143 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument
217 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c21 static char *mode_name(const struct pt_regs *regs) in mode_name() argument
23 if (compat_user_mode(regs)) { in mode_name()
26 switch (processor_mode(regs)) { in mode_name()
38 const struct pt_regs *regs) in fiq_debugger_dump_pc()
41 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
45 const struct pt_regs *regs) in fiq_debugger_dump_regs_aarch32()
48 regs->compat_usr(0), regs in fiq_debugger_dump_regs_aarch32()
37 fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_pc() argument
44 fiq_debugger_dump_regs_aarch32(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch32() argument
63 fiq_debugger_dump_regs_aarch64(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch64() argument
103 fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs() argument
118 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument
175 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument
[all...]
/third_party/backends/backend/
H A Drts8891.c1100 sanei_rts88xx_get_lamp_status (dev->devnum, dev->regs); in sane_start()
1101 if ((dev->regs[0x8e] & 0x60) != 0x60) in sane_start()
1104 dev->regs[0x8e]); in sane_start()
1129 rts8891_wait_for_home (dev, dev->regs); in sane_start()
1133 rts8891_set_default_regs (dev->regs); in sane_start()
1168 dev->regs[LAMP_BRIGHT_REG] = 0xA7; in sane_start()
1170 dev->regs + LAMP_BRIGHT_REG); in sane_start()
1271 dev->regs[LAMP_BRIGHT_REG] = 0xA7; in sane_start()
1273 dev->regs + LAMP_BRIGHT_REG); in sane_start()
1316 sanei_rts88xx_set_offset (dev->regs, de in sane_start()
5450 setup_shading_calibration(struct Rts8891_Device *dev, int mode, int *light, int *status1, SANE_Byte * regs) setup_shading_calibration() argument
6515 SANE_Byte regs[RTS8891_MAX_REGISTERS]; move_to_scan_area() local
6552 setup_scan_registers(struct Rts8891_Session *session, SANE_Byte *status1, SANE_Byte *status2, SANE_Byte *regs) setup_scan_registers() argument
7660 SANE_Byte regs[244]; park_head() local
[all...]
H A Dplustek-usbscan.c157 u_char *regs = dev->usbDev.a_bRegs; in usb_SetAsicDpiX() local
174 regs[0x09] = 0; in usb_SetAsicDpiX()
179 regs[0x09] = 1; in usb_SetAsicDpiX()
184 regs[0x09] = 2; in usb_SetAsicDpiX()
189 regs[0x09] = 3; in usb_SetAsicDpiX()
194 regs[0x09] = 4; in usb_SetAsicDpiX()
199 regs[0x09] = 5; in usb_SetAsicDpiX()
204 regs[0x09] = 6; in usb_SetAsicDpiX()
209 regs[0x09] = 7; in usb_SetAsicDpiX()
213 if( regs[ in usb_SetAsicDpiX()
286 u_char *regs = dev->usbDev.a_bRegs; usb_SetColorAndBits() local
385 u_char *regs = dev->usbDev.a_bRegs; usb_GetScanRect() local
515 u_char *regs = dev->usbDev.a_bRegs; usb_PresetStepSize() local
540 u_char *regs = dev->usbDev.a_bRegs; usb_GetDPD() local
590 u_char *regs = dev->usbDev.a_bRegs; usb_GetMCLKDiv() local
664 u_char *regs = dev->usbDev.a_bRegs; usb_GetMCLKDivider() local
763 u_char *regs = dev->usbDev.a_bRegs; usb_GetStepSize() local
814 u_char *regs = dev->usbDev.a_bRegs; usb_GetLineLength() local
917 u_char *regs = dev->usbDev.a_bRegs; usb_GetMotorParam() local
1066 u_char *regs = dev->usbDev.a_bRegs; usb_GetPauseLimit() local
1157 u_char *regs = dev->usbDev.a_bRegs; usb_SetScanParameters() local
1334 u_char *regs = dev->usbDev.a_bRegs; usb_ScanBegin() local
1450 u_char *regs = dev->usbDev.a_bRegs; usb_IsDataAvailableInDRAM() local
1496 u_char *regs = dev->usbDev.a_bRegs; usb_ScanReadImage() local
[all...]
H A Drts8891_low.c79 rts8891_write_all (SANE_Int devnum, SANE_Byte * regs, SANE_Int count) in rts8891_write_all() argument
93 sprintf (message + 5 * i, "0x%02x ", regs[i]); in rts8891_write_all()
107 local_regs[j] = regs[i]; in rts8891_write_all()
136 buffer[i + 4] = regs[0xb4 + i]; in rts8891_write_all()
205 rts8891_simple_scan (SANE_Int devnum, SANE_Byte * regs, int regcount, in rts8891_simple_scan() argument
212 rts8891_write_all (devnum, regs, regcount); in rts8891_simple_scan()
414 rts8891_move (struct Rts8891_Device *device, SANE_Byte * regs, in rts8891_move() argument
425 rts8891_set_default_regs (regs); in rts8891_move()
438 regs[0x32] = 0x80; in rts8891_move()
439 regs[ in rts8891_move()
545 rts8891_wait_for_home(struct Rts8891_Device *device, SANE_Byte * regs) rts8891_wait_for_home() argument
596 rts8891_park(struct Rts8891_Device *device, SANE_Byte *regs, SANE_Bool wait) rts8891_park() argument
[all...]
H A Dhp3500.c1445 unsigned char regs[2]; in rt_set_sram_page() local
1447 regs[0] = page; in rt_set_sram_page()
1448 regs[1] = page >> 8; in rt_set_sram_page()
1450 return rt_set_register_immediate (0x91, 2, regs); in rt_set_sram_page()
1574 rt_set_direction_forwards (unsigned char *regs) in rt_set_direction_forwards() argument
1576 regs[0xc6] |= 0x08; in rt_set_direction_forwards()
1581 rt_set_direction_rewind (unsigned char *regs) in rt_set_direction_rewind() argument
1583 regs[0xc6] &= 0xf7; in rt_set_direction_rewind()
1588 rt_set_stop_when_rewound (unsigned char *regs, int stop) in rt_set_stop_when_rewound() argument
1591 regs[ in rt_set_stop_when_rewound()
1675 rt_set_value_lsbfirst(unsigned char *regs, int firstreg, int totalregs, unsigned value) rt_set_value_lsbfirst() argument
1701 rt_set_ccd_shift_clock_multiplier(unsigned char *regs, unsigned value) rt_set_ccd_shift_clock_multiplier() argument
1707 rt_set_ccd_clock_reset_interval(unsigned char *regs, unsigned value) rt_set_ccd_clock_reset_interval() argument
1713 rt_set_ccd_clamp_clock_multiplier(unsigned char *regs, unsigned value) rt_set_ccd_clamp_clock_multiplier() argument
1719 rt_set_movement_pattern(unsigned char *regs, unsigned value) rt_set_movement_pattern() argument
1725 rt_set_motor_movement_clock_multiplier(unsigned char *regs, unsigned value) rt_set_motor_movement_clock_multiplier() argument
1732 rt_set_motor_type(unsigned char *regs, unsigned value) rt_set_motor_type() argument
1739 rt_set_noscan_distance(unsigned char *regs, unsigned value) rt_set_noscan_distance() argument
1746 rt_set_total_distance(unsigned char *regs, unsigned value) rt_set_total_distance() argument
1753 rt_set_scanline_start(unsigned char *regs, unsigned value) rt_set_scanline_start() argument
1759 rt_set_scanline_end(unsigned char *regs, unsigned value) rt_set_scanline_end() argument
1765 rt_set_basic_calibration(unsigned char *regs, int redoffset1, int redoffset2, int redgain, int greenoffset1, int greenoffset2, int greengain, int blueoffset1, int blueoffset2, int bluegain) rt_set_basic_calibration() argument
1787 rt_set_calibration_addresses(unsigned char *regs, unsigned redaddr, unsigned greenaddr, unsigned blueaddr, unsigned endaddr, unsigned width) rt_set_calibration_addresses() argument
1824 rt_set_lamp_duty_cycle(unsigned char *regs, int enable, int frequency, int offduty) rt_set_lamp_duty_cycle() argument
1839 rt_set_data_feed_on(unsigned char *regs) rt_set_data_feed_on() argument
1846 rt_set_data_feed_off(unsigned char *regs) rt_set_data_feed_off() argument
1853 rt_enable_ccd(unsigned char *regs, int enable) rt_enable_ccd() argument
1863 rt_set_cdss(unsigned char *regs, int val1, int val2) rt_set_cdss() argument
1871 rt_set_cdsc(unsigned char *regs, int val1, int val2) rt_set_cdsc() argument
1879 rt_update_after_setting_cdss2(unsigned char *regs) rt_update_after_setting_cdss2() argument
1899 rt_set_cph0s(unsigned char *regs, int on) rt_set_cph0s() argument
1909 rt_set_cvtr_lm(unsigned char *regs, int val1, int val2, int val3) rt_set_cvtr_lm() argument
1918 rt_set_cvtr_mpt(unsigned char *regs, int val1, int val2, int val3) rt_set_cvtr_mpt() argument
1926 rt_set_cvtr_wparams(unsigned char *regs, unsigned fpw, unsigned bpw, unsigned w) rt_set_cvtr_wparams() argument
1934 rt_enable_movement(unsigned char *regs, int enable) rt_enable_movement() argument
1944 rt_set_scan_frequency(unsigned char *regs, int frequency) rt_set_scan_frequency() argument
1951 rt_set_merge_channels(unsigned char *regs, int on) rt_set_merge_channels() argument
1960 rt_set_channel(unsigned char *regs, int channel) rt_set_channel() argument
1967 rt_set_single_channel_scanning(unsigned char *regs, int on) rt_set_single_channel_scanning() argument
1977 rt_set_colour_mode(unsigned char *regs, int on) rt_set_colour_mode() argument
1987 rt_set_horizontal_resolution(unsigned char *regs, int resolution) rt_set_horizontal_resolution() argument
2000 rt_set_last_sram_page(unsigned char *regs, int pagenum) rt_set_last_sram_page() argument
2007 rt_set_step_size(unsigned char *regs, int stepsize) rt_set_step_size() argument
2017 char regs[255]; rt_set_all_registers() local
2030 rt_adjust_misc_registers(unsigned char *regs) rt_adjust_misc_registers() argument
2066 unsigned char regs[13]; rt_nvram_init_command() local
2446 unsigned char regs[255]; rts8801_rewind() local
2546 dump_registers(unsigned char const *regs) dump_registers() argument
2994 unsigned char regs[256]; rts8801_fullscan() local
[all...]
H A Du12-hw.c80 dev->regs.RD_ScanControl &= (~_SCAN_LAMPS_ON); in u12hw_SelectLampSource()
83 dev->regs.RD_ScanControl |= _SCAN_TPALAMP_ON; in u12hw_SelectLampSource()
85 dev->regs.RD_ScanControl |= _SCAN_NORMALLAMP_ON; in u12hw_SelectLampSource()
107 DBG( _DBG_INFO, " * %u regs * %u (intermediate)\n", in u12hw_ProgramCCD()
122 dev->regs.RD_MotorDriverType |= _BUTTON_DISABLE; in u12hw_ButtonSetup()
207 dev->regs.RD_MotorDriverType |= _MOTORR_STRONG;
214 dev->regs.RD_MotorDriverType |= _MOTORR_WEAK;
231 dev->regs.RD_MotorDriverType =
233 dev->regs.RD_MotorDriverType |=
237 dev->MotorPower = dev->regs
[all...]
H A Drts88xx_lib.c74 sanei_rts88xx_is_color (SANE_Byte * regs) in sanei_rts88xx_is_color() argument
76 if ((regs[0x2f] & 0x11) == 0x11) in sanei_rts88xx_is_color()
82 sanei_rts88xx_set_gray_scan (SANE_Byte * regs) in sanei_rts88xx_set_gray_scan() argument
84 regs[0x2f] = (regs[0x2f] & 0x0f) | 0x20; in sanei_rts88xx_set_gray_scan()
88 sanei_rts88xx_set_color_scan (SANE_Byte * regs) in sanei_rts88xx_set_color_scan() argument
90 regs[0x2f] = (regs[0x2f] & 0x0f) | 0x10; in sanei_rts88xx_set_color_scan()
94 sanei_rts88xx_set_offset (SANE_Byte * regs, SANE_Byte red, SANE_Byte green, in sanei_rts88xx_set_offset() argument
98 regs[ in sanei_rts88xx_set_offset()
109 sanei_rts88xx_set_gain(SANE_Byte * regs, SANE_Byte red, SANE_Byte green, SANE_Byte blue) sanei_rts88xx_set_gain() argument
118 sanei_rts88xx_set_scan_frequency(SANE_Byte * regs, int frequency) sanei_rts88xx_set_scan_frequency() argument
301 sanei_rts88xx_get_status(SANE_Int devnum, SANE_Byte * regs) sanei_rts88xx_get_status() argument
314 sanei_rts88xx_set_status(SANE_Int devnum, SANE_Byte * regs, SANE_Byte reg10, SANE_Byte reg11) sanei_rts88xx_set_status() argument
332 sanei_rts88xx_get_lamp_status(SANE_Int devnum, SANE_Byte * regs) sanei_rts88xx_get_lamp_status() argument
341 sanei_rts88xx_reset_lamp(SANE_Int devnum, SANE_Byte * regs) sanei_rts88xx_reset_lamp() argument
406 sanei_rts88xx_get_lcd(SANE_Int devnum, SANE_Byte * regs) sanei_rts88xx_get_lcd() argument
503 SANE_Byte regs[2]; sanei_rts88xx_set_mem() local
577 SANE_Byte regs[2]; sanei_rts88xx_get_mem() local
705 sanei_rts88xx_set_scan_area(SANE_Byte * regs, SANE_Int ystart, SANE_Int yend, SANE_Int xstart, SANE_Int xend) sanei_rts88xx_set_scan_area() argument
[all...]
H A Dplustek-usbhw.c352 u_char *regs = dev->usbDev.a_bRegs; in usb_WaitPos() local
363 ffs = regs[0x48] * 256 + regs[0x49]; in usb_WaitPos()
459 u_char *regs = dev->usbDev.a_bRegs; in usb_ModuleMove() local
523 usbio_WriteReg( dev->fd, 0x58, regs[0x58]); in usb_ModuleMove()
549 regs[0x48] = (u_char)(wFastFeedStepSize >> 8); in usb_ModuleMove()
550 regs[0x49] = (u_char)(wFastFeedStepSize & 0xFF); in usb_ModuleMove()
553 regs[0x4a] = _HIBYTE(_LOWORD(dwStep)); in usb_ModuleMove()
554 regs[0x4b] = _LOBYTE(_LOWORD(dwStep)); in usb_ModuleMove()
556 regs[ in usb_ModuleMove()
676 u_char *regs = dev->usbDev.a_bRegs; usb_ModuleToHome() local
852 u_char *regs = dev->usbDev.a_bRegs; usb_MotorSelect() local
898 u_char *regs = dev->usbDev.a_bRegs; usb_AdjustLamps() local
1061 u_char *regs = dev->usbDev.a_bRegs; usb_GetLampStatus() local
1145 u_char *regs = dev->usbDev.a_bRegs; usb_switchLampX() local
1224 u_char *regs = dev->usbDev.a_bRegs; usb_FillLampRegs() local
1253 u_char *regs = dev->usbDev.a_bRegs; usb_LampOn() local
1388 u_char *regs = dev->usbDev.a_bRegs; usb_ResetRegisters() local
[all...]
H A Du12-shading.c75 SANE_Byte reg, regs[20]; in u12shading_DownloadShadingTable() local
86 (SANE_Byte)(dev->regs.RD_ScanControl | _SCAN_12BITMODE)); in u12shading_DownloadShadingTable()
90 regs[0] = REG_MODECONTROL; in u12shading_DownloadShadingTable()
91 regs[1] = _ModeScan; in u12shading_DownloadShadingTable()
94 dev->regs.RD_RedDarkOff = dev->shade.DarkOffset.Colors.Red; in u12shading_DownloadShadingTable()
95 dev->regs.RD_GreenDarkOff = dev->shade.DarkOffset.Colors.Green; in u12shading_DownloadShadingTable()
96 dev->regs.RD_BlueDarkOff = dev->shade.DarkOffset.Colors.Blue; in u12shading_DownloadShadingTable()
98 val = (SANE_Byte*)&dev->regs.RD_RedDarkOff; in u12shading_DownloadShadingTable()
99 rb = &regs[2]; in u12shading_DownloadShadingTable()
108 u12io_DataToRegs( dev, regs, in u12shading_DownloadShadingTable()
469 u12shading_FillToDAC( U12_Device *dev, RGBByteDef *regs, ColorByte *data ) u12shading_FillToDAC() argument
762 SANE_Byte addr, regs[6]; u12shading_DownloadMapTable() local
[all...]
H A Dplustek-usbshading.c296 u_char *regs = dev->usbDev.a_bRegs; in usb_SetDarkShading() local
298 regs[0x03] = 0; in usb_SetDarkShading()
300 regs[0x03] |= 4; in usb_SetDarkShading()
303 regs[0x03] |= 8; in usb_SetDarkShading()
305 if( usbio_WriteReg( dev->fd, 0x03, regs[0x03] )) { in usb_SetDarkShading()
308 regs[0x04] = 0; in usb_SetDarkShading()
309 regs[0x05] = 0; in usb_SetDarkShading()
311 res = sanei_lm983x_write( dev->fd, 0x04, &regs[0x04], 2, SANE_TRUE ); in usb_SetDarkShading()
334 u_char *regs = dev->usbDev.a_bRegs; in usb_SetWhiteShading() local
336 regs[ in usb_SetWhiteShading()
786 u_char *regs = dev->usbDev.a_bRegs; usb_AdjustGain() local
1258 u_char *regs = dev->usbDev.a_bRegs; usb_AdjustOffset() local
1577 u_char *regs = dev->usbDev.a_bRegs; usb_AdjustDarkShading() local
2234 u_char *regs = dev->usbDev.a_bRegs; usb_PrepareCalibration() local
2309 u_char *regs = dev->usbDev.a_bRegs; usb_SpeedTest() local
2394 u_char *regs = dev->usbDev.a_bRegs; usb_AutoWarmup() local
2594 u_char *regs = dev->usbDev.a_bRegs; global() local
3054 u_char *regs = dev->usbDev.a_bRegs; global() local
[all...]
H A Dplustek-usbcalfile.c299 u_char *regs = dev->usbDev.a_bRegs; in usb_RestoreCalData() local
301 regs[0x3b] = (u_char)cal->red_gain; in usb_RestoreCalData()
302 regs[0x3c] = (u_char)cal->green_gain; in usb_RestoreCalData()
303 regs[0x3d] = (u_char)cal->blue_gain; in usb_RestoreCalData()
304 regs[0x38] = (u_char)cal->red_offs; in usb_RestoreCalData()
305 regs[0x39] = (u_char)cal->green_offs; in usb_RestoreCalData()
306 regs[0x3a] = (u_char)cal->blue_offs; in usb_RestoreCalData()
308 regs[0x2a] = _HIBYTE((u_short)cal->light.green_pwm_duty); in usb_RestoreCalData()
309 regs[0x2b] = _LOBYTE((u_short)cal->light.green_pwm_duty); in usb_RestoreCalData()
311 regs[ in usb_RestoreCalData()
455 u_char *regs = dev->usbDev.a_bRegs; usb_PrepCalData() local
[all...]
/third_party/libunwind/libunwind/src/aarch64/
H A DGresume.c43 unsigned long regs[24]; in aarch64_local_resume() local
44 regs[0] = uc->uc_mcontext.regs[0]; in aarch64_local_resume()
45 regs[1] = uc->uc_mcontext.regs[1]; in aarch64_local_resume()
46 regs[2] = uc->uc_mcontext.regs[2]; in aarch64_local_resume()
47 regs[3] = uc->uc_mcontext.regs[3]; in aarch64_local_resume()
48 regs[ in aarch64_local_resume()
[all...]
/third_party/libunwind/libunwind/src/arm/
H A DGresume.c43 unsigned long regs[10]; in arm_local_resume() local
44 regs[0] = uc->regs[4]; in arm_local_resume()
45 regs[1] = uc->regs[5]; in arm_local_resume()
46 regs[2] = uc->regs[6]; in arm_local_resume()
47 regs[3] = uc->regs[7]; in arm_local_resume()
48 regs[ in arm_local_resume()
[all...]
/third_party/mesa3d/src/util/
H A Dregister_allocate.c94 struct ra_regs *regs; in ra_alloc_reg_set() local
96 regs = rzalloc(mem_ctx, struct ra_regs); in ra_alloc_reg_set()
97 regs->count = count; in ra_alloc_reg_set()
98 regs->regs = rzalloc_array(regs, struct ra_reg, count); in ra_alloc_reg_set()
101 regs->regs[i].conflicts = rzalloc_array(regs->regs, BITSET_WOR in ra_alloc_reg_set()
125 ra_set_allocate_round_robin(struct ra_regs *regs) ra_set_allocate_round_robin() argument
131 ra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2) ra_add_conflict_list() argument
142 ra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2) ra_add_reg_conflict() argument
159 ra_add_transitive_reg_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg) ra_add_transitive_reg_conflict() argument
178 ra_add_transitive_reg_pair_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg0, unsigned int reg1) ra_add_transitive_reg_pair_conflict() argument
203 ra_make_reg_conflicts_transitive(struct ra_regs *regs, unsigned int r) ra_make_reg_conflicts_transitive() argument
217 ra_alloc_reg_class(struct ra_regs *regs) ra_alloc_reg_class() argument
244 ra_alloc_contig_reg_class(struct ra_regs *regs, int contig_len) ra_alloc_contig_reg_class() argument
255 ra_get_class_from_index(struct ra_regs *regs, unsigned int class) ra_get_class_from_index() argument
292 ra_set_finalize(struct ra_regs *regs, unsigned int **q_values) ra_set_finalize() argument
397 ra_set_serialize(const struct ra_regs *regs, struct blob *blob) ra_set_serialize() argument
433 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, reg_count, false); ra_set_deserialize() local
581 ra_alloc_interference_graph(struct ra_regs *regs, unsigned int count) ra_alloc_interference_graph() argument
856 ra_compute_available_regs(struct ra_graph *g, unsigned int n, BITSET_WORD *regs) ra_compute_available_regs() argument
[all...]
H A Dregister_allocate.h55 void ra_set_allocate_round_robin(struct ra_regs *regs);
56 struct ra_class *ra_alloc_reg_class(struct ra_regs *regs);
57 struct ra_class *ra_alloc_contig_reg_class(struct ra_regs *regs, int contig_len);
59 void ra_add_reg_conflict(struct ra_regs *regs,
61 void ra_add_transitive_reg_conflict(struct ra_regs *regs,
65 ra_add_transitive_reg_pair_conflict(struct ra_regs *regs,
68 void ra_make_reg_conflicts_transitive(struct ra_regs *regs, unsigned int reg);
70 struct ra_class *ra_get_class_from_index(struct ra_regs *regs, unsigned int c);
71 void ra_set_num_conflicts(struct ra_regs *regs, unsigned int class_a,
73 void ra_set_finalize(struct ra_regs *regs, unsigne
[all...]
/third_party/mesa3d/src/panfrost/bifrost/
H A Dbi_pack.c72 bi_assign_slot_read(bi_registers *regs, bi_index src) in bi_assign_slot_read() argument
80 if (regs->slot[i] == src.value && regs->enabled[i]) in bi_assign_slot_read()
84 if (regs->slot[2] == src.value && regs->slot23.slot2 == BIFROST_OP_READ) in bi_assign_slot_read()
90 if (!regs->enabled[i]) { in bi_assign_slot_read()
91 regs->slot[i] = src.value; in bi_assign_slot_read()
92 regs->enabled[i] = true; in bi_assign_slot_read()
97 if (!regs->slot23.slot3) { in bi_assign_slot_read()
98 regs in bi_assign_slot_read()
187 bi_pack_registers(bi_registers regs) bi_pack_registers() argument
279 bi_flip_slots(bi_registers *regs) bi_flip_slots() argument
290 bi_get_src_slot(bi_registers *regs, unsigned reg) bi_get_src_slot() argument
303 bi_get_src_new(bi_instr *ins, bi_registers *regs, unsigned s) bi_get_src_new() argument
[all...]
/third_party/mesa3d/src/util/tests/
H A Dregister_allocate_test.cpp51 thumb_checks(struct ra_regs *regs, unsigned reg32_base, unsigned reg64_base) in thumb_checks() argument
53 struct ra_class *reg32low = ra_get_class_from_index(regs, 0); in thumb_checks()
54 struct ra_class *reg64low = ra_get_class_from_index(regs, 1); in thumb_checks()
55 struct ra_class *reg96 = ra_get_class_from_index(regs, 2); in thumb_checks()
71 /* These individual regs should conflict with themselves, but nothing else from their class */ in thumb_checks()
90 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 100, true); in TEST_F() local
97 struct ra_class *reg32low = ra_alloc_reg_class(regs); in TEST_F()
101 ra_add_transitive_reg_conflict(regs, i, vreg); in TEST_F()
106 struct ra_class *reg64low = ra_alloc_reg_class(regs); in TEST_F()
110 ra_add_transitive_reg_conflict(regs, in TEST_F()
130 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); TEST_F() local
154 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); TEST_F() local
175 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, base_regs, true); TEST_F() local
[all...]
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_pack.h55 const struct fd_reg_pair regs[] = {__VA_ARGS__}; \
56 /* NOTE: allow regs[0].reg==0, this happens in OUT_PKT() */ \
57 if (i < ARRAY_SIZE(regs) && (i == 0 || regs[i].reg > 0)) { \
58 __assert_eq(regs[0].reg + i, regs[i].reg); \
59 if (regs[i].bo) { \
62 OUT_RELOC(ring, regs[i].bo, regs[i].bo_offset, regs[
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/thermal/
H A Drockchip_thermal.c169 * @regs: the base address of tsadc controller
190 void __iomem *regs; member
534 * @regs: the base address of tsadc controller
549 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) in rk_tsadcv2_initialize() argument
552 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON); in rk_tsadcv2_initialize()
554 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON); in rk_tsadcv2_initialize()
557 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); in rk_tsadcv2_initialize()
558 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, regs + TSADCV2_HIGHT_INT_DEBOUNCE); in rk_tsadcv2_initialize()
559 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, regs + TSADCV2_AUTO_PERIOD_HT); in rk_tsadcv2_initialize()
560 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, regs in rk_tsadcv2_initialize()
583 rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv3_initialize() argument
618 rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv4_initialize() argument
624 rk_tsadcv5_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv5_initialize() argument
644 rk_tsadcv6_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv6_initialize() argument
653 rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv7_initialize() argument
677 rk_tsadcv2_irq_ack(void __iomem *regs) rk_tsadcv2_irq_ack() argument
685 rk_tsadcv3_irq_ack(void __iomem *regs) rk_tsadcv3_irq_ack() argument
693 rk_tsadcv2_control(void __iomem *regs, bool enable) rk_tsadcv2_control() argument
716 rk_tsadcv3_control(void __iomem *regs, bool enable) rk_tsadcv3_control() argument
730 rk_tsadcv2_get_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int *temp) rk_tsadcv2_get_temp() argument
739 rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_alarm_temp() argument
772 rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_tshut_temp() argument
791 rk_tsadcv2_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv2_tshut_mode() argument
807 rk_tsadcv3_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv3_tshut_mode() argument
[all...]
/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv_job_render.c296 struct rogue_fwif_ta_regs_cswitch *regs = in pvr_srv_render_ctx_fw_static_state_init() local
301 regs->vdm_context_state_base_addr = ws_static_state->vdm_ctx_state_base_addr; in pvr_srv_render_ctx_fw_static_state_init()
302 regs->ta_context_state_base_addr = ws_static_state->geom_ctx_state_base_addr; in pvr_srv_render_ctx_fw_static_state_init()
304 STATIC_ASSERT(ARRAY_SIZE(regs->ta_state) == in pvr_srv_render_ctx_fw_static_state_init()
307 regs->ta_state[i].vdm_context_store_task0 = in pvr_srv_render_ctx_fw_static_state_init()
309 regs->ta_state[i].vdm_context_store_task1 = in pvr_srv_render_ctx_fw_static_state_init()
311 regs->ta_state[i].vdm_context_store_task2 = in pvr_srv_render_ctx_fw_static_state_init()
314 regs->ta_state[i].vdm_context_resume_task0 = in pvr_srv_render_ctx_fw_static_state_init()
316 regs->ta_state[i].vdm_context_resume_task1 = in pvr_srv_render_ctx_fw_static_state_init()
318 regs in pvr_srv_render_ctx_fw_static_state_init()
[all...]
/third_party/backends/backend/genesys/
H A Dtables_gpo.cpp35 gpo.regs = { in genesys_init_gpo_tables()
46 gpo.regs = { in genesys_init_gpo_tables()
57 gpo.regs = { in genesys_init_gpo_tables()
68 gpo.regs = { in genesys_init_gpo_tables()
79 gpo.regs = { in genesys_init_gpo_tables()
90 gpo.regs = { in genesys_init_gpo_tables()
101 gpo.regs = { in genesys_init_gpo_tables()
112 gpo.regs = { in genesys_init_gpo_tables()
124 gpo.regs = { in genesys_init_gpo_tables()
135 gpo.regs in genesys_init_gpo_tables()
[all...]
/device/soc/rockchip/common/vendor/drivers/phy/
H A Dphy-rockchip-naneng-edp.c67 void __iomem *regs; member
92 writel(EDP_PHY_TX_AMP(lane, val), edpphy->regs + EDP_PHY_GRF_CON4); in rockchip_edp_phy_set_voltages()
95 writel(EDP_PHY_TX_AMP_SCALE(lane, val), edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_voltages()
98 writel(EDP_PHY_TX_EMP(lane, val), edpphy->regs + EDP_PHY_GRF_CON3); in rockchip_edp_phy_set_voltages()
109 writel(EDP_PHY_TX_IDLE(0xf) | EDP_PHY_TX_PD(0xf), edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate()
111 writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_rate()
112 writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate()
116 writel(EDP_PHY_PLL_DIV(0x4380), edpphy->regs + EDP_PHY_GRF_CON1); in rockchip_edp_phy_set_rate()
117 writel(EDP_PHY_TX_RTERM(0x1) | EDP_PHY_RATE(0x1) | EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2); in rockchip_edp_phy_set_rate()
118 writel(EDP_PHY_PLL_CTL_H(0x0800), edpphy->regs in rockchip_edp_phy_set_rate()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-edp.c71 void __iomem *regs; member
98 edpphy->regs + EDP_PHY_GRF_CON4); in rockchip_edp_phy_set_voltages()
102 edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_voltages()
106 edpphy->regs + EDP_PHY_GRF_CON3); in rockchip_edp_phy_set_voltages()
119 edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate()
121 writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_rate()
122 writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate()
127 edpphy->regs + EDP_PHY_GRF_CON1); in rockchip_edp_phy_set_rate()
129 EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2); in rockchip_edp_phy_set_rate()
131 edpphy->regs in rockchip_edp_phy_set_rate()
[all...]

Completed in 20 milliseconds

12345678910>>...18